Changeset 81625 in vbox for trunk/src/VBox/Devices/VMMDev/VMMDevTesting.cpp
- Timestamp:
- Nov 1, 2019 8:47:17 PM (6 years ago)
- svn:sync-xref-src-repo-rev:
- 134382
- File:
-
- 1 edited
-
trunk/src/VBox/Devices/VMMDev/VMMDevTesting.cpp (modified) (28 diffs)
Legend:
- Unmodified
- Added
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trunk/src/VBox/Devices/VMMDev/VMMDevTesting.cpp
r81571 r81625 48 48 49 49 /** 50 * @callback_method_impl{FNIOMMMIO WRITE}51 */ 52 PDMBOTHCBDECL(int) vmmdevTestingMmioWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void const *pv, unsigned cb)50 * @callback_method_impl{FNIOMMMIONEWWRITE} 51 */ 52 static DECLCALLBACK(VBOXSTRICTRC) vmmdevTestingMmioWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS off, void const *pv, unsigned cb) 53 53 { 54 54 RT_NOREF_PV(pvUser); 55 55 56 switch ( GCPhysAddr)56 switch (off) 57 57 { 58 case VMMDEV_TESTING_MMIO_ NOP_R3:58 case VMMDEV_TESTING_MMIO_OFF_NOP_R3: 59 59 #ifndef IN_RING3 60 60 return VINF_IOM_R3_MMIO_WRITE; 61 61 #endif 62 case VMMDEV_TESTING_MMIO_ NOP:62 case VMMDEV_TESTING_MMIO_OFF_NOP: 63 63 return VINF_SUCCESS; 64 64 … … 68 68 * Readback register (64 bytes wide). 69 69 */ 70 uint32_t off = GCPhysAddr - VMMDEV_TESTING_MMIO_BASE;71 70 if ( ( off >= VMMDEV_TESTING_MMIO_OFF_READBACK 72 71 && off + cb <= VMMDEV_TESTING_MMIO_OFF_READBACK + VMMDEV_TESTING_READBACK_SIZE) … … 77 76 ) 78 77 { 79 PVMMDEV pThis = PDM INS_2_DATA(pDevIns, PVMMDEV);78 PVMMDEV pThis = PDMDEVINS_2_DATA(pDevIns, PVMMDEV); 80 79 off &= VMMDEV_TESTING_READBACK_SIZE - 1; 81 80 switch (cb) … … 101 100 * Odd NOP accesses. 102 101 */ 103 case VMMDEV_TESTING_MMIO_ NOP_R3 + 1:104 case VMMDEV_TESTING_MMIO_ NOP_R3 + 2:105 case VMMDEV_TESTING_MMIO_ NOP_R3 + 3:106 case VMMDEV_TESTING_MMIO_ NOP_R3 + 4:107 case VMMDEV_TESTING_MMIO_ NOP_R3 + 5:108 case VMMDEV_TESTING_MMIO_ NOP_R3 + 6:109 case VMMDEV_TESTING_MMIO_ NOP_R3 + 7:102 case VMMDEV_TESTING_MMIO_OFF_NOP_R3 + 1: 103 case VMMDEV_TESTING_MMIO_OFF_NOP_R3 + 2: 104 case VMMDEV_TESTING_MMIO_OFF_NOP_R3 + 3: 105 case VMMDEV_TESTING_MMIO_OFF_NOP_R3 + 4: 106 case VMMDEV_TESTING_MMIO_OFF_NOP_R3 + 5: 107 case VMMDEV_TESTING_MMIO_OFF_NOP_R3 + 6: 108 case VMMDEV_TESTING_MMIO_OFF_NOP_R3 + 7: 110 109 #ifndef IN_RING3 111 110 return VINF_IOM_R3_MMIO_WRITE; 112 111 #endif 113 case VMMDEV_TESTING_MMIO_ NOP + 1:114 case VMMDEV_TESTING_MMIO_ NOP + 2:115 case VMMDEV_TESTING_MMIO_ NOP + 3:116 case VMMDEV_TESTING_MMIO_ NOP + 4:117 case VMMDEV_TESTING_MMIO_ NOP + 5:118 case VMMDEV_TESTING_MMIO_ NOP + 6:119 case VMMDEV_TESTING_MMIO_ NOP + 7:112 case VMMDEV_TESTING_MMIO_OFF_NOP + 1: 113 case VMMDEV_TESTING_MMIO_OFF_NOP + 2: 114 case VMMDEV_TESTING_MMIO_OFF_NOP + 3: 115 case VMMDEV_TESTING_MMIO_OFF_NOP + 4: 116 case VMMDEV_TESTING_MMIO_OFF_NOP + 5: 117 case VMMDEV_TESTING_MMIO_OFF_NOP + 6: 118 case VMMDEV_TESTING_MMIO_OFF_NOP + 7: 120 119 return VINF_SUCCESS; 121 120 } … … 125 124 126 125 /** 127 * @callback_method_impl{FNIOMMMIO READ}128 */ 129 PDMBOTHCBDECL(int) vmmdevTestingMmioRead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb)126 * @callback_method_impl{FNIOMMMIONEWREAD} 127 */ 128 static DECLCALLBACK(VBOXSTRICTRC) vmmdevTestingMmioRead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS off, void *pv, unsigned cb) 130 129 { 131 130 RT_NOREF_PV(pvUser); 132 131 133 switch ( GCPhysAddr)132 switch (off) 134 133 { 135 case VMMDEV_TESTING_MMIO_ NOP_R3:134 case VMMDEV_TESTING_MMIO_OFF_NOP_R3: 136 135 #ifndef IN_RING3 137 136 return VINF_IOM_R3_MMIO_READ; 138 137 #endif 139 138 /* fall thru. */ 140 case VMMDEV_TESTING_MMIO_ NOP:139 case VMMDEV_TESTING_MMIO_OFF_NOP: 141 140 switch (cb) 142 141 { … … 165 164 * Readback register (64 bytes wide). 166 165 */ 167 uint32_t off = GCPhysAddr - VMMDEV_TESTING_MMIO_BASE;168 166 if ( ( off >= VMMDEV_TESTING_MMIO_OFF_READBACK 169 167 && off + cb <= VMMDEV_TESTING_MMIO_OFF_READBACK + 64) … … 174 172 ) 175 173 { 176 PVMMDEV pThis = PDM INS_2_DATA(pDevIns, PVMMDEV);174 PVMMDEV pThis = PDMDEVINS_2_DATA(pDevIns, PVMMDEV); 177 175 off &= 0x3f; 178 176 switch (cb) … … 197 195 * Odd NOP accesses (for 16-bit code mainly). 198 196 */ 199 case VMMDEV_TESTING_MMIO_ NOP_R3 + 1:200 case VMMDEV_TESTING_MMIO_ NOP_R3 + 2:201 case VMMDEV_TESTING_MMIO_ NOP_R3 + 3:202 case VMMDEV_TESTING_MMIO_ NOP_R3 + 4:203 case VMMDEV_TESTING_MMIO_ NOP_R3 + 5:204 case VMMDEV_TESTING_MMIO_ NOP_R3 + 6:205 case VMMDEV_TESTING_MMIO_ NOP_R3 + 7:197 case VMMDEV_TESTING_MMIO_OFF_NOP_R3 + 1: 198 case VMMDEV_TESTING_MMIO_OFF_NOP_R3 + 2: 199 case VMMDEV_TESTING_MMIO_OFF_NOP_R3 + 3: 200 case VMMDEV_TESTING_MMIO_OFF_NOP_R3 + 4: 201 case VMMDEV_TESTING_MMIO_OFF_NOP_R3 + 5: 202 case VMMDEV_TESTING_MMIO_OFF_NOP_R3 + 6: 203 case VMMDEV_TESTING_MMIO_OFF_NOP_R3 + 7: 206 204 #ifndef IN_RING3 207 205 return VINF_IOM_R3_MMIO_READ; 208 206 #endif 209 case VMMDEV_TESTING_MMIO_ NOP + 1:210 case VMMDEV_TESTING_MMIO_ NOP + 2:211 case VMMDEV_TESTING_MMIO_ NOP + 3:212 case VMMDEV_TESTING_MMIO_ NOP + 4:213 case VMMDEV_TESTING_MMIO_ NOP + 5:214 case VMMDEV_TESTING_MMIO_ NOP + 6:215 case VMMDEV_TESTING_MMIO_ NOP + 7:207 case VMMDEV_TESTING_MMIO_OFF_NOP + 1: 208 case VMMDEV_TESTING_MMIO_OFF_NOP + 2: 209 case VMMDEV_TESTING_MMIO_OFF_NOP + 3: 210 case VMMDEV_TESTING_MMIO_OFF_NOP + 4: 211 case VMMDEV_TESTING_MMIO_OFF_NOP + 5: 212 case VMMDEV_TESTING_MMIO_OFF_NOP + 6: 213 case VMMDEV_TESTING_MMIO_OFF_NOP + 7: 216 214 { 217 215 static uint8_t const s_abNopValue[8] = … … 228 226 229 227 memset(pv, 0xff, cb); 230 memcpy(pv, &s_abNopValue[ GCPhysAddr & 7], RT_MIN(8 - (GCPhysAddr& 7), cb));228 memcpy(pv, &s_abNopValue[off & 7], RT_MIN(8 - (off & 7), cb)); 231 229 return VINF_SUCCESS; 232 230 } … … 291 289 292 290 /** 293 * @callback_method_impl{FNIOMIOPORTOUT} 294 */ 295 PDMBOTHCBDECL(int) vmmdevTestingIoWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t u32, unsigned cb) 291 * @callback_method_impl{FNIOMIOPORTNEWOUT} 292 */ 293 static DECLCALLBACK(VBOXSTRICTRC) 294 vmmdevTestingIoWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb) 296 295 { 297 PVMMDEV pThis = PDMINS_2_DATA(pDevIns, PVMMDEV); 296 PVMMDEV pThis = PDMDEVINS_2_DATA(pDevIns, PVMMDEV); 297 #ifdef IN_RING3 298 PVMMDEVCC pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PVMMDEVCC); 299 #endif 298 300 RT_NOREF_PV(pvUser); 299 301 300 switch ( uPort)302 switch (offPort) 301 303 { 302 304 /* 303 305 * The NOP I/O ports are used for performance measurements. 304 306 */ 305 case VMMDEV_TESTING_IOPORT_NOP :307 case VMMDEV_TESTING_IOPORT_NOP - VMMDEV_TESTING_IOPORT_BASE: 306 308 switch (cb) 307 309 { … … 316 318 return VINF_SUCCESS; 317 319 318 case VMMDEV_TESTING_IOPORT_NOP_R3 :320 case VMMDEV_TESTING_IOPORT_NOP_R3 - VMMDEV_TESTING_IOPORT_BASE: 319 321 switch (cb) 320 322 { … … 333 335 334 336 /* The timestamp I/O ports are read-only. */ 335 case VMMDEV_TESTING_IOPORT_TS_LOW :336 case VMMDEV_TESTING_IOPORT_TS_HIGH :337 case VMMDEV_TESTING_IOPORT_TS_LOW - VMMDEV_TESTING_IOPORT_BASE: 338 case VMMDEV_TESTING_IOPORT_TS_HIGH - VMMDEV_TESTING_IOPORT_BASE: 337 339 break; 338 340 … … 341 343 * (We have to allow WORD writes for 286, 186 and 8086 execution modes.) 342 344 */ 343 case VMMDEV_TESTING_IOPORT_CMD :345 case VMMDEV_TESTING_IOPORT_CMD - VMMDEV_TESTING_IOPORT_BASE: 344 346 if (cb == 2) 345 347 { … … 359 361 * The data port. Used of providing data for a command. 360 362 */ 361 case VMMDEV_TESTING_IOPORT_DATA :363 case VMMDEV_TESTING_IOPORT_DATA - VMMDEV_TESTING_IOPORT_BASE: 362 364 { 363 365 uint32_t uCmd = pThis->u32TestingCmd; … … 386 388 case VMMDEV_TESTING_CMD_INIT: 387 389 VMMDEV_TESTING_OUTPUT(("testing: INIT '%s'\n", pThis->TestingData.String.sz)); 388 if (pThis ->hTestingTest != NIL_RTTEST)390 if (pThisCC->hTestingTest != NIL_RTTEST) 389 391 { 390 RTTestChangeName(pThis ->hTestingTest, pThis->TestingData.String.sz);391 RTTestBanner(pThis ->hTestingTest);392 RTTestChangeName(pThisCC->hTestingTest, pThis->TestingData.String.sz); 393 RTTestBanner(pThisCC->hTestingTest); 392 394 } 393 395 break; 394 396 case VMMDEV_TESTING_CMD_SUB_NEW: 395 397 VMMDEV_TESTING_OUTPUT(("testing: SUB_NEW '%s'\n", pThis->TestingData.String.sz)); 396 if (pThis ->hTestingTest != NIL_RTTEST)397 RTTestSub(pThis ->hTestingTest, pThis->TestingData.String.sz);398 if (pThisCC->hTestingTest != NIL_RTTEST) 399 RTTestSub(pThisCC->hTestingTest, pThis->TestingData.String.sz); 398 400 break; 399 401 case VMMDEV_TESTING_CMD_FAILED: 400 if (pThis ->hTestingTest != NIL_RTTEST)401 RTTestFailed(pThis ->hTestingTest, "%s", pThis->TestingData.String.sz);402 if (pThisCC->hTestingTest != NIL_RTTEST) 403 RTTestFailed(pThisCC->hTestingTest, "%s", pThis->TestingData.String.sz); 402 404 VMMDEV_TESTING_OUTPUT(("testing: FAILED '%s'\n", pThis->TestingData.String.sz)); 403 405 break; 404 406 case VMMDEV_TESTING_CMD_SKIPPED: 405 if (pThis ->hTestingTest != NIL_RTTEST)407 if (pThisCC->hTestingTest != NIL_RTTEST) 406 408 { 407 409 if (off) 408 RTTestSkipped(pThis ->hTestingTest, "%s", pThis->TestingData.String.sz);410 RTTestSkipped(pThisCC->hTestingTest, "%s", pThis->TestingData.String.sz); 409 411 else 410 RTTestSkipped(pThis ->hTestingTest, NULL);412 RTTestSkipped(pThisCC->hTestingTest, NULL); 411 413 } 412 414 VMMDEV_TESTING_OUTPUT(("testing: SKIPPED '%s'\n", pThis->TestingData.String.sz)); 413 415 break; 414 416 case VMMDEV_TESTING_CMD_PRINT: 415 if (pThis ->hTestingTest != NIL_RTTEST && off)416 RTTestPrintf(pThis ->hTestingTest, RTTESTLVL_ALWAYS, "%s", pThis->TestingData.String.sz);417 if (pThisCC->hTestingTest != NIL_RTTEST && off) 418 RTTestPrintf(pThisCC->hTestingTest, RTTESTLVL_ALWAYS, "%s", pThis->TestingData.String.sz); 417 419 VMMDEV_TESTING_OUTPUT(("testing: '%s'\n", pThis->TestingData.String.sz)); 418 420 break; … … 454 456 if (uCmd == VMMDEV_TESTING_CMD_TERM) 455 457 { 456 if (pThis ->hTestingTest != NIL_RTTEST)458 if (pThisCC->hTestingTest != NIL_RTTEST) 457 459 { 458 while (RTTestErrorCount(pThis ->hTestingTest) < u32)459 RTTestErrorInc(pThis ->hTestingTest); /* A bit stupid, but does the trick. */460 RTTestSubDone(pThis ->hTestingTest);461 RTTestSummaryAndDestroy(pThis ->hTestingTest);462 pThis ->hTestingTest = NIL_RTTEST;460 while (RTTestErrorCount(pThisCC->hTestingTest) < u32) 461 RTTestErrorInc(pThisCC->hTestingTest); /* A bit stupid, but does the trick. */ 462 RTTestSubDone(pThisCC->hTestingTest); 463 RTTestSummaryAndDestroy(pThisCC->hTestingTest); 464 pThisCC->hTestingTest = NIL_RTTEST; 463 465 } 464 466 VMMDEV_TESTING_OUTPUT(("testing: TERM - %u errors\n", u32)); … … 466 468 else 467 469 { 468 if (pThis ->hTestingTest != NIL_RTTEST)470 if (pThisCC->hTestingTest != NIL_RTTEST) 469 471 { 470 while (RTTestSubErrorCount(pThis ->hTestingTest) < u32)471 RTTestErrorInc(pThis ->hTestingTest); /* A bit stupid, but does the trick. */472 RTTestSubDone(pThis ->hTestingTest);472 while (RTTestSubErrorCount(pThisCC->hTestingTest) < u32) 473 RTTestErrorInc(pThisCC->hTestingTest); /* A bit stupid, but does the trick. */ 474 RTTestSubDone(pThisCC->hTestingTest); 473 475 } 474 476 VMMDEV_TESTING_OUTPUT(("testing: SUB_DONE - %u errors\n", u32)); … … 535 537 enmUnit = RTTESTUNIT_NONE; 536 538 } 537 if (pThis ->hTestingTest != NIL_RTTEST)538 RTTestValue(pThis ->hTestingTest, pThis->TestingData.Value.szName,539 if (pThisCC->hTestingTest != NIL_RTTEST) 540 RTTestValue(pThisCC->hTestingTest, pThis->TestingData.Value.szName, 539 541 pThis->TestingData.Value.u64Value.u, enmUnit); 540 542 … … 591 593 592 594 /** 593 * @callback_method_impl{FNIOMIOPORTIN} 594 */ 595 PDMBOTHCBDECL(int) vmmdevTestingIoRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t *pu32, unsigned cb) 595 * @callback_method_impl{FNIOMIOPORTNEWIN} 596 */ 597 static DECLCALLBACK(VBOXSTRICTRC) 598 vmmdevTestingIoRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb) 596 599 { 597 PVMMDEV pThis = PDM INS_2_DATA(pDevIns, PVMMDEV);600 PVMMDEV pThis = PDMDEVINS_2_DATA(pDevIns, PVMMDEV); 598 601 RT_NOREF_PV(pvUser); 599 602 600 switch ( uPort)603 switch (offPort) 601 604 { 602 605 /* 603 606 * The NOP I/O ports are used for performance measurements. 604 607 */ 605 case VMMDEV_TESTING_IOPORT_NOP :608 case VMMDEV_TESTING_IOPORT_NOP - VMMDEV_TESTING_IOPORT_BASE: 606 609 switch (cb) 607 610 { … … 617 620 return VINF_SUCCESS; 618 621 619 case VMMDEV_TESTING_IOPORT_NOP_R3 :622 case VMMDEV_TESTING_IOPORT_NOP_R3 - VMMDEV_TESTING_IOPORT_BASE: 620 623 switch (cb) 621 624 { … … 641 644 * gives you a 64-bit timestamp value. 642 645 */ 643 case VMMDEV_TESTING_IOPORT_TS_LOW :646 case VMMDEV_TESTING_IOPORT_TS_LOW - VMMDEV_TESTING_IOPORT_BASE: 644 647 if (cb == 4) 645 648 { … … 651 654 break; 652 655 653 case VMMDEV_TESTING_IOPORT_TS_HIGH :656 case VMMDEV_TESTING_IOPORT_TS_HIGH - VMMDEV_TESTING_IOPORT_BASE: 654 657 if (cb == 4) 655 658 { … … 662 665 * The command and data registers are write-only. 663 666 */ 664 case VMMDEV_TESTING_IOPORT_CMD :665 case VMMDEV_TESTING_IOPORT_DATA :667 case VMMDEV_TESTING_IOPORT_CMD - VMMDEV_TESTING_IOPORT_BASE: 668 case VMMDEV_TESTING_IOPORT_DATA - VMMDEV_TESTING_IOPORT_BASE: 666 669 break; 667 670 … … 684 687 void vmmdevTestingTerminate(PPDMDEVINS pDevIns) 685 688 { 686 PVMMDEV pThis = PDMINS_2_DATA(pDevIns, PVMMDEV); 689 PVMMDEV pThis = PDMDEVINS_2_DATA(pDevIns, PVMMDEV); 690 PVMMDEVCC pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PVMMDEVCC); 687 691 if (!pThis->fTestingEnabled) 688 692 return; 689 693 690 if (pThis ->hTestingTest != NIL_RTTEST)694 if (pThisCC->hTestingTest != NIL_RTTEST) 691 695 { 692 RTTestFailed(pThis ->hTestingTest, "Still open at vmmdev destruction.");693 RTTestSummaryAndDestroy(pThis ->hTestingTest);694 pThis ->hTestingTest = NIL_RTTEST;696 RTTestFailed(pThisCC->hTestingTest, "Still open at vmmdev destruction."); 697 RTTestSummaryAndDestroy(pThisCC->hTestingTest); 698 pThisCC->hTestingTest = NIL_RTTEST; 695 699 } 696 700 } … … 705 709 int vmmdevTestingInitialize(PPDMDEVINS pDevIns) 706 710 { 707 PVMMDEV pThis = PDMINS_2_DATA(pDevIns, PVMMDEV); 708 int rc; 711 PVMMDEV pThis = PDMDEVINS_2_DATA(pDevIns, PVMMDEV); 712 PVMMDEVCC pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PVMMDEVCC); 713 int rc; 709 714 710 715 if (!pThis->fTestingEnabled) … … 717 722 * tests interfaces. Optional, needs to be explicitly enabled. 718 723 */ 719 rc = PDMDevHlpMMIORegister(pDevIns, VMMDEV_TESTING_MMIO_BASE, VMMDEV_TESTING_MMIO_SIZE, NULL /*pvUser*/, 720 IOMMMIO_FLAGS_READ_PASSTHRU | IOMMMIO_FLAGS_WRITE_PASSTHRU, 721 vmmdevTestingMmioWrite, vmmdevTestingMmioRead, "VMMDev Testing"); 724 rc = PDMDevHlpMmioCreateAndMap(pDevIns, VMMDEV_TESTING_MMIO_BASE, VMMDEV_TESTING_MMIO_SIZE, 725 vmmdevTestingMmioWrite, vmmdevTestingMmioRead, 726 IOMMMIO_FLAGS_READ_PASSTHRU | IOMMMIO_FLAGS_WRITE_PASSTHRU, 727 "VMMDev Testing", &pThis->hMmioTesting); 722 728 AssertRCReturn(rc, rc); 723 if (pThis->fRZEnabled)724 {725 rc = PDMDevHlpMMIORegisterR0(pDevIns, VMMDEV_TESTING_MMIO_BASE, VMMDEV_TESTING_MMIO_SIZE, NIL_RTR0PTR /*pvUser*/,726 "vmmdevTestingMmioWrite", "vmmdevTestingMmioRead");727 AssertRCReturn(rc, rc);728 rc = PDMDevHlpMMIORegisterRC(pDevIns, VMMDEV_TESTING_MMIO_BASE, VMMDEV_TESTING_MMIO_SIZE, NIL_RTRCPTR /*pvUser*/,729 "vmmdevTestingMmioWrite", "vmmdevTestingMmioRead");730 AssertRCReturn(rc, rc);731 }732 729 } 733 730 … … 736 733 * Register the I/O ports used for testing. 737 734 */ 738 rc = PDMDevHlpIOPortRegister(pDevIns, VMMDEV_TESTING_IOPORT_BASE, VMMDEV_TESTING_IOPORT_COUNT, NULL, 739 vmmdevTestingIoWrite, 740 vmmdevTestingIoRead, 741 NULL /*pfnOutStr*/, 742 NULL /*pfnInStr*/, 743 "VMMDev Testing"); 735 rc = PDMDevHlpIoPortCreateAndMap(pDevIns, VMMDEV_TESTING_IOPORT_BASE, VMMDEV_TESTING_IOPORT_COUNT, 736 vmmdevTestingIoWrite, vmmdevTestingIoRead, "VMMDev Testing", NULL /*paExtDescs*/, 737 &pThis->hIoPortTesting); 744 738 AssertRCReturn(rc, rc); 745 if (pThis->fRZEnabled)746 {747 rc = PDMDevHlpIOPortRegisterR0(pDevIns, VMMDEV_TESTING_IOPORT_BASE, VMMDEV_TESTING_IOPORT_COUNT, NIL_RTR0PTR /*pvUser*/,748 "vmmdevTestingIoWrite",749 "vmmdevTestingIoRead",750 NULL /*pszOutStr*/,751 NULL /*pszInStr*/,752 "VMMDev Testing");753 AssertRCReturn(rc, rc);754 rc = PDMDevHlpIOPortRegisterRC(pDevIns, VMMDEV_TESTING_IOPORT_BASE, VMMDEV_TESTING_IOPORT_COUNT, NIL_RTRCPTR /*pvUser*/,755 "vmmdevTestingIoWrite",756 "vmmdevTestingIoRead",757 NULL /*pszOutStr*/,758 NULL /*pszInStr*/,759 "VMMDev Testing");760 AssertRCReturn(rc, rc);761 }762 739 763 740 /* … … 765 742 */ 766 743 rc = RTTestCreateEx("VMMDevTesting", RTTEST_C_USE_ENV | RTTEST_C_NO_TLS | RTTEST_C_XML_DELAY_TOP_TEST, 767 RTTESTLVL_INVALID, -1 /*iNativeTestPipe*/, pThis ->pszTestingXmlOutput, &pThis->hTestingTest);744 RTTESTLVL_INVALID, -1 /*iNativeTestPipe*/, pThisCC->pszTestingXmlOutput, &pThisCC->hTestingTest); 768 745 if (RT_FAILURE(rc)) 769 746 return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "Error creating testing instance");
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