VirtualBox

Ignore:
Timestamp:
Sep 5, 2007 2:20:59 PM (18 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
24153
Message:

Switched to reading and writing through PGM (like we already did for 64 bits hosts)

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/recompiler/VBoxRecompiler.c

    r4388 r4535  
    8484static void     remR3StateUpdate(PVM pVM);
    8585
    86 #if defined(PGM_DYNAMIC_RAM_ALLOC) && !defined(REM_PHYS_ADDR_IN_TLB)
    87 DECLINLINE(target_ulong) remR3HCVirt2GCPhysInlined(PVM pVM, void *addr);
    88 DECLINLINE(void *) remR3GCPhys2HCVirtInlined(PVM pVM, target_ulong addr);
    89 #endif
    90 
    9186static uint32_t remR3MMIOReadU8(void *pvVM, target_phys_addr_t GCPhys);
    9287static uint32_t remR3MMIOReadU16(void *pvVM, target_phys_addr_t GCPhys);
    … …  
    120115static STAMPROFILEADV gStatMemRead;
    121116static STAMPROFILEADV gStatMemWrite;
    122 #ifndef REM_PHYS_ADDR_IN_TLB
    123 static STAMPROFILEADV gStatMemReadHCPtr;
    124 static STAMPROFILEADV gStatMemWriteHCPtr;
    125 #endif
    126 #ifdef PGM_DYNAMIC_RAM_ALLOC
    127117static STAMPROFILE    gStatGCPhys2HCVirt;
    128118static STAMPROFILE    gStatHCVirt2GCPhys;
    129 #endif
    130119static STAMCOUNTER    gStatCpuGetTSC;
    131120static STAMCOUNTER    gStatRefuseTFInhibit;
    … …  
    360349    STAM_REG(pVM, &gStatMemRead,            STAMTYPE_PROFILE, "/PROF/REM/MemRead",    STAMUNIT_TICKS_PER_CALL, "Profiling memory access.");
    361350    STAM_REG(pVM, &gStatMemWrite,           STAMTYPE_PROFILE, "/PROF/REM/MemWrite",   STAMUNIT_TICKS_PER_CALL, "Profiling memory access.");
    362 #ifndef REM_PHYS_ADDR_IN_TLB
    363     STAM_REG(pVM, &gStatMemReadHCPtr,       STAMTYPE_PROFILE, "/PROF/REM/MemReadHCPtr", STAMUNIT_TICKS_PER_CALL, "Profiling memory access.");
    364     STAM_REG(pVM, &gStatMemWriteHCPtr,      STAMTYPE_PROFILE, "/PROF/REM/MemWriteHCPtr", STAMUNIT_TICKS_PER_CALL, "Profiling memory access.");
    365 #endif
    366 #ifdef PGM_DYNAMIC_RAM_ALLOC
    367351    STAM_REG(pVM, &gStatHCVirt2GCPhys,      STAMTYPE_PROFILE, "/PROF/REM/HCVirt2GCPhys", STAMUNIT_TICKS_PER_CALL, "Profiling memory convertion.");
    368352    STAM_REG(pVM, &gStatGCPhys2HCVirt,      STAMTYPE_PROFILE, "/PROF/REM/GCPhys2HCVirt", STAMUNIT_TICKS_PER_CALL, "Profiling memory convertion.");
    369 #endif
    370353
    371354    STAM_REG(pVM, &gStatCpuGetTSC,          STAMTYPE_COUNTER, "/REM/CpuGetTSC",         STAMUNIT_OCCURENCES,     "cpu_get_tsc calls");
    … …  
    24702453    if (!GCPhys)
    24712454    {
    2472 #if !defined(PGM_DYNAMIC_RAM_ALLOC) && !defined(REM_PHYS_ADDR_IN_TLB)
    2473         AssertRelease(!phys_ram_base);
    2474         phys_ram_base = pvRam;
    2475 #endif
    24762455        phys_ram_size = cb;
    24772456        phys_ram_dirty_size = cb >> PAGE_SHIFT;
    … …  
    24962475    pVM->rem.s.fIgnoreAll = true;
    24972476
    2498 #ifdef PGM_DYNAMIC_RAM_ALLOC
    24992477    if (!GCPhys)
    25002478        cpu_register_physical_memory(GCPhys, cb, GCPhys | IO_MEM_RAM_MISSING);
    25012479    else
    25022480    {
    2503 # ifndef REM_PHYS_ADDR_IN_TLB
    2504         uint32_t i;
    2505 # endif
    25062481        if (fFlags & MM_RAM_FLAGS_RESERVED)
    25072482            cpu_register_physical_memory(GCPhys, cb, IO_MEM_UNASSIGNED);
    25082483        else
    25092484            cpu_register_physical_memory(GCPhys, cb, GCPhys);
    2510 
    2511 # ifndef REM_PHYS_ADDR_IN_TLB
    2512         AssertRelease(pVM->rem.s.cPhysRegistrations < REM_MAX_PHYS_REGISTRATIONS);
    2513         for (i = 0; i < pVM->rem.s.cPhysRegistrations; i++)
    2514         {
    2515             if (pVM->rem.s.aPhysReg[i].GCPhys == GCPhys)
    2516             {
    2517                 pVM->rem.s.aPhysReg[i].HCVirt = (RTHCUINTPTR)pvRam;
    2518                 pVM->rem.s.aPhysReg[i].cb     = cb;
    2519                 break;
    2520             }
    2521         }
    2522         if (i == pVM->rem.s.cPhysRegistrations)
    2523         {
    2524             pVM->rem.s.aPhysReg[i].GCPhys = GCPhys;
    2525             pVM->rem.s.aPhysReg[i].HCVirt = (RTHCUINTPTR)pvRam;
    2526             pVM->rem.s.aPhysReg[i].cb     = cb;
    2527             pVM->rem.s.cPhysRegistrations++;
    2528         }
    2529 # endif /* !REM_PHYS_ADDR_IN_TLB */
    2530     }
    2531 #elif defined(REM_PHYS_ADDR_IN_TLB)
    2532     cpu_register_physical_memory(GCPhys, cb, GCPhys | (fFlags & MM_RAM_FLAGS_RESERVED ? IO_MEM_UNASSIGNED : 0));
    2533 #else
    2534     AssertRelease(phys_ram_base);
    2535     cpu_register_physical_memory(GCPhys, cb, ((uintptr_t)pvRam - (uintptr_t)phys_ram_base)
    2536                                              | (fFlags & MM_RAM_FLAGS_RESERVED ? IO_MEM_UNASSIGNED : 0));
    2537 #endif
     2485    }
    25382486    Assert(pVM->rem.s.fIgnoreAll);
    25392487    pVM->rem.s.fIgnoreAll = false;
    … …  
    25522500REMR3DECL(void) REMR3NotifyPhysRamChunkRegister(PVM pVM, RTGCPHYS GCPhys, RTUINT cb, RTHCUINTPTR pvRam, unsigned fFlags)
    25532501{
    2554 #ifdef PGM_DYNAMIC_RAM_ALLOC
    2555 # ifndef REM_PHYS_ADDR_IN_TLB
    2556     uint32_t idx;
    2557 #endif
    2558 
    25592502    Log(("REMR3NotifyPhysRamChunkRegister: GCPhys=%VGp cb=%d pvRam=%p fFlags=%d\n", GCPhys, cb, pvRam, fFlags));
    25602503    VM_ASSERT_EMT(pVM);
    … …  
    25682511    Assert(cb == PGM_DYNAMIC_CHUNK_SIZE);
    25692512    Assert(fFlags == 0 /* normal RAM */);
    2570 
    2571 # ifndef REM_PHYS_ADDR_IN_TLB
    2572     if (!pVM->rem.s.paHCVirtToGCPhys)
    2573     {
    2574         uint32_t size = (_4G >> PGM_DYNAMIC_CHUNK_SHIFT) * sizeof(REMCHUNKINFO);
    2575 
    2576         Assert(phys_ram_size);
    2577 
    2578         pVM->rem.s.paHCVirtToGCPhys = (PREMCHUNKINFO)MMR3HeapAllocZ(pVM, MM_TAG_REM, size);
    2579         pVM->rem.s.paGCPhysToHCVirt = (RTHCPTR)MMR3HeapAllocZ(pVM, MM_TAG_REM, (phys_ram_size >> PGM_DYNAMIC_CHUNK_SHIFT)*sizeof(RTHCPTR));
    2580     }
    2581     pVM->rem.s.paGCPhysToHCVirt[GCPhys >> PGM_DYNAMIC_CHUNK_SHIFT] = pvRam;
    2582 
    2583     idx = (pvRam >> PGM_DYNAMIC_CHUNK_SHIFT);
    2584     if (!pVM->rem.s.paHCVirtToGCPhys[idx].pChunk1)
    2585     {
    2586         pVM->rem.s.paHCVirtToGCPhys[idx].pChunk1 = pvRam;
    2587         pVM->rem.s.paHCVirtToGCPhys[idx].GCPhys1 = GCPhys;
    2588     }
    2589     else
    2590     {
    2591         Assert(!pVM->rem.s.paHCVirtToGCPhys[idx].pChunk2);
    2592         pVM->rem.s.paHCVirtToGCPhys[idx].pChunk2 = pvRam;
    2593         pVM->rem.s.paHCVirtToGCPhys[idx].GCPhys2 = GCPhys;
    2594     }
    2595     /* Does the region spawn two chunks? */
    2596     if (pvRam & PGM_DYNAMIC_CHUNK_OFFSET_MASK)
    2597     {
    2598         if (!pVM->rem.s.paHCVirtToGCPhys[idx+1].pChunk1)
    2599         {
    2600             pVM->rem.s.paHCVirtToGCPhys[idx+1].pChunk1 = pvRam;
    2601             pVM->rem.s.paHCVirtToGCPhys[idx+1].GCPhys1 = GCPhys;
    2602         }
    2603         else
    2604         {
    2605             Assert(!pVM->rem.s.paHCVirtToGCPhys[idx+1].pChunk2);
    2606             pVM->rem.s.paHCVirtToGCPhys[idx+1].pChunk2 = pvRam;
    2607             pVM->rem.s.paHCVirtToGCPhys[idx+1].GCPhys2 = GCPhys;
    2608         }
    2609     }
    2610 # endif /* !REM_PHYS_ADDR_IN_TLB */
    2611 
    26122513    Assert(!pVM->rem.s.fIgnoreAll);
    26132514    pVM->rem.s.fIgnoreAll = true;
    … …  
    26172518    Assert(pVM->rem.s.fIgnoreAll);
    26182519    pVM->rem.s.fIgnoreAll = false;
    2619 
    2620 #else
    2621     AssertReleaseFailed();
    2622 #endif
    2623 }
    2624 
    2625 
    2626 #ifdef PGM_DYNAMIC_RAM_ALLOC
    2627 # ifndef REM_PHYS_ADDR_IN_TLB
    2628 #if 0
    2629 static const uint8_t gabZeroPage[PAGE_SIZE];
    2630 #endif
    2631 
    2632 /**
    2633  *  Convert GC physical address to HC virt
    2634  *
    2635  * @returns The HC virt address corresponding to addr.
    2636  * @param   env         The cpu environment.
    2637  * @param   addr        The physical address.
    2638  */
    2639 DECLINLINE(void *) remR3GCPhys2HCVirtInlined(PVM pVM, target_ulong addr)
    2640 {
    2641     uint32_t i;
    2642     void    *pv;
    2643     STAM_PROFILE_START(&gStatGCPhys2HCVirt, a);
    2644 
    2645 #if 1
    2646     /* lookup in pVM->rem.s.aPhysReg array first (for ROM range(s) inside the guest's RAM) */
    2647     for (i = 0; i < pVM->rem.s.cPhysRegistrations; i++)
    2648     {
    2649         RTGCPHYS off = addr - pVM->rem.s.aPhysReg[i].GCPhys;
    2650         if (off < pVM->rem.s.aPhysReg[i].cb)
    2651         {
    2652             pv = (void *)(pVM->rem.s.aPhysReg[i].HCVirt + off);
    2653             Log2(("remR3GCPhys2HCVirt: %x -> %x\n", addr, pv));
    2654             STAM_PROFILE_STOP(&gStatGCPhys2HCVirt, a);
    2655             return pv;
    2656         }
    2657     }
    2658     AssertMsg(addr < phys_ram_size, ("remR3GCPhys2HCVirt: unknown physical address %x\n", addr));
    2659     pv = (void *)(pVM->rem.s.paGCPhysToHCVirt[addr >> PGM_DYNAMIC_CHUNK_SHIFT] + (addr & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
    2660     Log2(("remR3GCPhys2HCVirt: %x -> %x\n", addr, pv));
    2661 #else
    2662     /** @todo figure out why this is faster than the above code. */
    2663     int rc = PGMPhysGCPhys2HCPtr(pVM, addr & X86_PTE_PAE_PG_MASK, PAGE_SIZE, &pv);
    2664     if (RT_FAILURE(rc))
    2665     {
    2666         AssertMsgFailed(("remR3GCPhys2HCVirt: unknown physical address %x\n", addr));
    2667         pv = gabZeroPage;
    2668     }
    2669     pv = (void *)((uintptr_t)pv | (addr & PAGE_OFFSET_MASK));
    2670 #endif
    2671     return pv;
    2672 }
    2673 
    2674 
    2675 /**
    2676  *  Convert GC physical address to HC virt
    2677  *
    2678  * @returns The HC virt address corresponding to addr.
    2679  * @param   env         The cpu environment.
    2680  * @param   addr        The physical address.
    2681  */
    2682 DECLINLINE(target_ulong) remR3HCVirt2GCPhysInlined(PVM pVM, void *addr)
    2683 {
    2684     RTHCUINTPTR HCVirt = (RTHCUINTPTR)addr;
    2685     uint32_t    idx    = (HCVirt >> PGM_DYNAMIC_CHUNK_SHIFT);
    2686     RTHCUINTPTR off;
    2687     RTUINT      i;
    2688     target_ulong GCPhys;
    2689 
    2690     off = HCVirt - pVM->rem.s.paHCVirtToGCPhys[idx].pChunk1;
    2691 
    2692     if (    pVM->rem.s.paHCVirtToGCPhys[idx].pChunk1
    2693         &&  off < PGM_DYNAMIC_CHUNK_SIZE)
    2694     {
    2695         GCPhys = pVM->rem.s.paHCVirtToGCPhys[idx].GCPhys1 + off;
    2696         Log2(("remR3HCVirt2GCPhys %x -> %x\n", addr, GCPhys));
    2697         return GCPhys;
    2698     }
    2699 
    2700     off = HCVirt - pVM->rem.s.paHCVirtToGCPhys[idx].pChunk2;
    2701     if (    pVM->rem.s.paHCVirtToGCPhys[idx].pChunk2
    2702         &&  off < PGM_DYNAMIC_CHUNK_SIZE)
    2703     {
    2704         GCPhys = pVM->rem.s.paHCVirtToGCPhys[idx].GCPhys2 + off;
    2705         Log2(("remR3HCVirt2GCPhys %x -> %x\n", addr, GCPhys));
    2706         return GCPhys;
    2707     }
    2708 
    2709     /* Must be externally registered RAM/ROM range */
    2710     for (i = 0; i < pVM->rem.s.cPhysRegistrations; i++)
    2711     {
    2712         uint32_t off = HCVirt - pVM->rem.s.aPhysReg[i].HCVirt;
    2713         if (off < pVM->rem.s.aPhysReg[i].cb)
    2714         {
    2715             GCPhys = pVM->rem.s.aPhysReg[i].GCPhys + off;
    2716             Log2(("remR3HCVirt2GCPhys %x -> %x\n", addr, GCPhys));
    2717             return GCPhys;
    2718         }
    2719     }
    2720     AssertReleaseMsgFailed(("No translation for physical address %VHv???\n", addr));
    2721     return 0;
    2722 }
    2723 
    2724 /**
    2725  *  Convert GC physical address to HC virt
    2726  *
    2727  * @returns The HC virt address corresponding to addr.
    2728  * @param   env         The cpu environment.
    2729  * @param   addr        The physical address.
    2730  */
    2731 void *remR3GCPhys2HCVirt(void *env, target_ulong addr)
    2732 {
    2733     PVM     pVM = ((CPUState *)env)->pVM;
    2734     void   *pv;
    2735     STAM_PROFILE_START(&gStatGCPhys2HCVirt, a);
    2736     pv = remR3GCPhys2HCVirtInlined(pVM, addr);
    2737     STAM_PROFILE_STOP(&gStatGCPhys2HCVirt, a);
    2738     return pv;
    2739 }
    2740 
    2741 
    2742 /**
    2743  *  Convert GC physical address to HC virt
    2744  *
    2745  * @returns The HC virt address corresponding to addr.
    2746  * @param   env         The cpu environment.
    2747  * @param   addr        The physical address.
    2748  */
    2749 target_ulong remR3HCVirt2GCPhys(void *env, void *addr)
    2750 {
    2751     PVM pVM = ((CPUState *)env)->pVM;
    2752     target_ulong GCPhys;
    2753     STAM_PROFILE_START(&gStatHCVirt2GCPhys, a);
    2754     GCPhys = remR3HCVirt2GCPhysInlined(pVM, addr);
    2755     STAM_PROFILE_STOP(&gStatHCVirt2GCPhys, a);
    2756     return GCPhys;
    2757 }
    2758 
    2759 # endif /* !REM_PHYS_ADDR_IN_TLB */
     2520}
     2521
    27602522
    27612523/**
    … …  
    27792541    AssertFatalFailed();
    27802542}
    2781 
    2782 #endif /* PGM_DYNAMIC_RAM_ALLOC */
    27832543
    27842544
    … …  
    27962556REMR3DECL(void) REMR3NotifyPhysRomRegister(PVM pVM, RTGCPHYS GCPhys, RTUINT cb, void *pvCopy, bool fShadow)
    27972557{
    2798 #if defined(PGM_DYNAMIC_RAM_ALLOC) && !defined(REM_PHYS_ADDR_IN_TLB)
    2799     uint32_t i;
    2800 #endif
    28012558    Log(("REMR3NotifyPhysRomRegister: GCPhys=%VGp cb=%d pvCopy=%p fShadow=%RTbool\n", GCPhys, cb, pvCopy, fShadow));
    28022559    VM_ASSERT_EMT(pVM);
    … …  
    28172574    pVM->rem.s.fIgnoreAll = true;
    28182575
    2819 #ifdef REM_PHYS_ADDR_IN_TLB
    28202576    cpu_register_physical_memory(GCPhys, cb, GCPhys | (fShadow ? 0 : IO_MEM_ROM));
    2821 #elif defined(PGM_DYNAMIC_RAM_ALLOC)
    2822     cpu_register_physical_memory(GCPhys, cb, GCPhys | (fShadow ? 0 : IO_MEM_ROM));
    2823     AssertRelease(pVM->rem.s.cPhysRegistrations < REM_MAX_PHYS_REGISTRATIONS);
    2824     for (i = 0; i < pVM->rem.s.cPhysRegistrations; i++)
    2825     {
    2826         if (pVM->rem.s.aPhysReg[i].GCPhys == GCPhys)
    2827         {
    2828             pVM->rem.s.aPhysReg[i].HCVirt = (RTHCUINTPTR)pvCopy;
    2829             pVM->rem.s.aPhysReg[i].cb     = cb;
    2830             break;
    2831         }
    2832     }
    2833     if (i == pVM->rem.s.cPhysRegistrations)
    2834     {
    2835         pVM->rem.s.aPhysReg[i].GCPhys = GCPhys;
    2836         pVM->rem.s.aPhysReg[i].HCVirt = (RTHCUINTPTR)pvCopy;
    2837         pVM->rem.s.aPhysReg[i].cb     = cb;
    2838         pVM->rem.s.cPhysRegistrations++;
    2839     }
    2840 #else
    2841     AssertRelease(phys_ram_base);
    2842     cpu_register_physical_memory(GCPhys, cb, ((uintptr_t)pvCopy - (uintptr_t)phys_ram_base) | (fShadow ? 0 : IO_MEM_ROM));
    2843 #endif
    28442577
    28452578    Log2(("%.64Vhxd\n", (char *)pvCopy + cb - 64));
    … …  
    29542687            Assert(cb == PAGE_SIZE);
    29552688            Assert(RT_ALIGN_T(GCPhys, PAGE_SIZE, RTGCPHYS) == GCPhys);
    2956 #ifdef REM_PHYS_ADDR_IN_TLB
    29572689            cpu_register_physical_memory(GCPhys, cb, GCPhys);
    2958 #elif defined(PGM_DYNAMIC_RAM_ALLOC)
    2959             Assert(remR3HCVirt2GCPhysInlined(pVM, pvHCPtr) < MMR3PhysGetRamSize(pVM));
    2960             cpu_register_physical_memory(GCPhys, cb, GCPhys);
    2961 #else
    2962             Assert((uintptr_t)pvHCPtr - (uintptr_t)phys_ram_base < MMR3PhysGetRamSize(pVM));
    2963             cpu_register_physical_memory(GCPhys, cb, (uintptr_t)pvHCPtr - (uintptr_t)phys_ram_base);
    2964 #endif
    29652690        }
    29662691    }
    … …  
    30072732            Assert(cb == PAGE_SIZE);
    30082733            Assert(RT_ALIGN_T(GCPhysOld, PAGE_SIZE, RTGCPHYS) == GCPhysOld);
    3009 #ifdef REM_PHYS_ADDR_IN_TLB
    30102734            cpu_register_physical_memory(GCPhysOld, cb, GCPhysOld);
    3011 #elif defined(PGM_DYNAMIC_RAM_ALLOC)
    3012             Assert(remR3HCVirt2GCPhysInlined(pVM, pvHCPtr) < MMR3PhysGetRamSize(pVM));
    3013             cpu_register_physical_memory(GCPhysOld, cb, GCPhysOld);
    3014 #else
    3015             AssertMsg((uintptr_t)pvHCPtr - (uintptr_t)phys_ram_base < MMR3PhysGetRamSize(pVM),
    3016                       ("pvHCPtr=%p phys_ram_base=%p size=%RX64 cb=%RGp\n", pvHCPtr, phys_ram_base, MMR3PhysGetRamSize(pVM), cb));
    3017             cpu_register_physical_memory(GCPhysOld, cb, (uintptr_t)pvHCPtr - (uintptr_t)phys_ram_base);
    3018 #endif
    30192735        }
    30202736
    … …  
    33053021    STAM_PROFILE_ADV_STOP(&gStatMemWrite, a);
    33063022}
    3307 
    3308 
    3309 #ifndef REM_PHYS_ADDR_IN_TLB
    3310 
    3311 /**
    3312  * Read guest RAM and ROM.
    3313  *
    3314  * @param   pbSrcPhys       The source address. Relative to guest RAM.
    3315  * @param   pvDst           The destination address.
    3316  * @param   cb              Number of bytes
    3317  */
    3318 void remR3PhysReadHCPtr(uint8_t *pbSrcPhys, void *pvDst, unsigned cb)
    3319 {
    3320     STAM_PROFILE_ADV_START(&gStatMemReadHCPtr, a);
    3321 
    3322     /*
    3323      * Calc the physical address ('off') and check that it's within the RAM.
    3324      * ROM is accessed this way, even if it's not part of the RAM.
    3325      */
    3326 #ifdef PGM_DYNAMIC_RAM_ALLOC
    3327     uintptr_t off = remR3HCVirt2GCPhysInlined(cpu_single_env->pVM, pbSrcPhys);
    3328 #else
    3329     uintptr_t off = pbSrcPhys - phys_ram_base;
    3330 #endif
    3331     PGMPhysRead(cpu_single_env->pVM, (RTGCPHYS)off, pvDst, cb);
    3332     STAM_PROFILE_ADV_STOP(&gStatMemReadHCPtr, a);
    3333 }
    3334 
    3335 
    3336 /**
    3337  * Read guest RAM and ROM, unsigned 8-bit.
    3338  *
    3339  * @param   pbSrcPhys       The source address. Relative to guest RAM.
    3340  */
    3341 uint8_t remR3PhysReadHCPtrU8(uint8_t *pbSrcPhys)
    3342 {
    3343     uint8_t val;
    3344 
    3345     STAM_PROFILE_ADV_START(&gStatMemReadHCPtr, a);
    3346 
    3347     /*
    3348      * Calc the physical address ('off') and check that it's within the RAM.
    3349      * ROM is accessed this way, even if it's not part of the RAM.
    3350      */
    3351 #ifdef PGM_DYNAMIC_RAM_ALLOC
    3352     uintptr_t off = remR3HCVirt2GCPhysInlined(cpu_single_env->pVM, pbSrcPhys);
    3353 #else
    3354     uintptr_t off = pbSrcPhys - phys_ram_base;
    3355 #endif
    3356     val = PGMR3PhysReadByte(cpu_single_env->pVM, (RTGCPHYS)off);
    3357     STAM_PROFILE_ADV_STOP(&gStatMemReadHCPtr, a);
    3358     return val;
    3359 }
    3360 
    3361 
    3362 /**
    3363  * Read guest RAM and ROM, signed 8-bit.
    3364  *
    3365  * @param   pbSrcPhys       The source address. Relative to guest RAM.
    3366  */
    3367 int8_t remR3PhysReadHCPtrS8(uint8_t *pbSrcPhys)
    3368 {
    3369     int8_t val;
    3370 
    3371     STAM_PROFILE_ADV_START(&gStatMemReadHCPtr, a);
    3372 
    3373     /*
    3374      * Calc the physical address ('off') and check that it's within the RAM.
    3375      * ROM is accessed this way, even if it's not part of the RAM.
    3376      */
    3377 #ifdef PGM_DYNAMIC_RAM_ALLOC
    3378     uintptr_t off = remR3HCVirt2GCPhysInlined(cpu_single_env->pVM, pbSrcPhys);
    3379 #else
    3380     uintptr_t off = pbSrcPhys - phys_ram_base;
    3381 #endif
    3382     val = PGMR3PhysReadByte(cpu_single_env->pVM, (RTGCPHYS)off);
    3383     STAM_PROFILE_ADV_STOP(&gStatMemReadHCPtr, a);
    3384     return val;
    3385 }
    3386 
    3387 
    3388 /**
    3389  * Read guest RAM and ROM, unsigned 16-bit.
    3390  *
    3391  * @param   pbSrcPhys       The source address. Relative to guest RAM.
    3392  */
    3393 uint16_t remR3PhysReadHCPtrU16(uint8_t *pbSrcPhys)
    3394 {
    3395     uint16_t val;
    3396 
    3397     STAM_PROFILE_ADV_START(&gStatMemReadHCPtr, a);
    3398 
    3399     /*
    3400      * Calc the physical address ('off') and check that it's within the RAM.
    3401      * ROM is accessed this way, even if it's not part of the RAM.
    3402      */
    3403 #ifdef PGM_DYNAMIC_RAM_ALLOC
    3404     uintptr_t off = remR3HCVirt2GCPhysInlined(cpu_single_env->pVM, pbSrcPhys);
    3405 #else
    3406     uintptr_t off = pbSrcPhys - phys_ram_base;
    3407 #endif
    3408     val = PGMR3PhysReadWord(cpu_single_env->pVM, (RTGCPHYS)off);
    3409     STAM_PROFILE_ADV_STOP(&gStatMemReadHCPtr, a);
    3410     return val;
    3411 }
    3412 
    3413 
    3414 /**
    3415  * Read guest RAM and ROM, signed 16-bit.
    3416  *
    3417  * @param   pbSrcPhys       The source address. Relative to guest RAM.
    3418  */
    3419 int16_t remR3PhysReadHCPtrS16(uint8_t *pbSrcPhys)
    3420 {
    3421     int16_t val;
    3422 
    3423     STAM_PROFILE_ADV_START(&gStatMemReadHCPtr, a);
    3424 
    3425     /*
    3426      * Calc the physical address ('off') and check that it's within the RAM.
    3427      * ROM is accessed this way, even if it's not part of the RAM.
    3428      */
    3429     /** @todo This is rather ugly, but there's no other way when we don't wish to touch *many* other files. */
    3430 #ifdef PGM_DYNAMIC_RAM_ALLOC
    3431     uintptr_t off = remR3HCVirt2GCPhysInlined(cpu_single_env->pVM, pbSrcPhys);
    3432 #else
    3433     uintptr_t off = pbSrcPhys - phys_ram_base;
    3434 #endif
    3435     val = PGMR3PhysReadWord(cpu_single_env->pVM, (RTGCPHYS)off);
    3436     STAM_PROFILE_ADV_STOP(&gStatMemReadHCPtr, a);
    3437     return val;
    3438 }
    3439 
    3440 
    3441 /**
    3442  * Read guest RAM and ROM, unsigned 32-bit.
    3443  *
    3444  * @param   pbSrcPhys       The source address. Relative to guest RAM.
    3445  */
    3446 uint32_t remR3PhysReadHCPtrU32(uint8_t *pbSrcPhys)
    3447 {
    3448     uint32_t val;
    3449 
    3450     STAM_PROFILE_ADV_START(&gStatMemReadHCPtr, a);
    3451 
    3452     /*
    3453      * Calc the physical address ('off') and check that it's within the RAM.
    3454      * ROM is accessed this way, even if it's not part of the RAM.
    3455      */
    3456 #ifdef PGM_DYNAMIC_RAM_ALLOC
    3457     uintptr_t off = remR3HCVirt2GCPhysInlined(cpu_single_env->pVM, pbSrcPhys);
    3458 #else
    3459     uintptr_t off = pbSrcPhys - phys_ram_base;
    3460 #endif
    3461     val = PGMR3PhysReadDword(cpu_single_env->pVM, (RTGCPHYS)off);
    3462     STAM_PROFILE_ADV_STOP(&gStatMemReadHCPtr, a);
    3463     return val;
    3464 }
    3465 
    3466 
    3467 /**
    3468  * Read guest RAM and ROM, signed 32-bit.
    3469  *
    3470  * @param   pbSrcPhys       The source address. Relative to guest RAM.
    3471  */
    3472 int32_t remR3PhysReadHCPtrS32(uint8_t *pbSrcPhys)
    3473 {
    3474     int32_t val;
    3475 
    3476     STAM_PROFILE_ADV_START(&gStatMemReadHCPtr, a);
    3477 
    3478     /*
    3479      * Calc the physical address ('off') and check that it's within the RAM.
    3480      * ROM is accessed this way, even if it's not part of the RAM.
    3481      */
    3482 #ifdef PGM_DYNAMIC_RAM_ALLOC
    3483     uintptr_t off = remR3HCVirt2GCPhysInlined(cpu_single_env->pVM, pbSrcPhys);
    3484 #else
    3485     uintptr_t off = pbSrcPhys - phys_ram_base;
    3486 #endif
    3487     val = PGMR3PhysReadDword(cpu_single_env->pVM, (RTGCPHYS)off);
    3488     STAM_PROFILE_ADV_STOP(&gStatMemReadHCPtr, a);
    3489     return val;
    3490 }
    3491 
    3492 
    3493 /**
    3494  * Read guest RAM and ROM, unsigned 64-bit.
    3495  *
    3496  * @param   pbSrcPhys       The source address. Relative to guest RAM.
    3497  */
    3498 uint64_t remR3PhysReadHCPtrU64(uint8_t *pbSrcPhys)
    3499 {
    3500     uint64_t val;
    3501 
    3502     STAM_PROFILE_ADV_START(&gStatMemReadHCPtr, a);
    3503 
    3504     /*
    3505      * Calc the physical address ('off') and check that it's within the RAM.
    3506      * ROM is accessed this way, even if it's not part of the RAM.
    3507      */
    3508 #ifdef PGM_DYNAMIC_RAM_ALLOC
    3509     uintptr_t off = remR3HCVirt2GCPhysInlined(cpu_single_env->pVM, pbSrcPhys);
    3510 #else
    3511     uintptr_t off = pbSrcPhys - phys_ram_base;
    3512 #endif
    3513     val =            PGMR3PhysReadDword(cpu_single_env->pVM, (RTGCPHYS)off)
    3514         | ((uint64_t)PGMR3PhysReadDword(cpu_single_env->pVM, (RTGCPHYS)off + 4) << 32); /** @todo fix me! */
    3515     STAM_PROFILE_ADV_STOP(&gStatMemReadHCPtr, a);
    3516     return val;
    3517 }
    3518 
    3519 
    3520 /**
    3521  * Write guest RAM.
    3522  *
    3523  * @param   pbDstPhys       The destination address. Relative to guest RAM.
    3524  * @param   pvSrc           The source address.
    3525  * @param   cb              Number of bytes to write
    3526  */
    3527 void remR3PhysWriteHCPtr(uint8_t *pbDstPhys, const void *pvSrc, unsigned cb)
    3528 {
    3529     STAM_PROFILE_ADV_START(&gStatMemWriteHCPtr, a);
    3530     /*
    3531      * Calc the physical address ('off') and check that it's within the RAM.
    3532      */
    3533 #ifdef PGM_DYNAMIC_RAM_ALLOC
    3534     uintptr_t off = remR3HCVirt2GCPhysInlined(cpu_single_env->pVM, pbDstPhys);
    3535 #else
    3536     uintptr_t off = pbDstPhys - phys_ram_base;
    3537 #endif
    3538     PGMPhysWrite(cpu_single_env->pVM, (RTGCPHYS)off, pvSrc, cb);
    3539     STAM_PROFILE_ADV_STOP(&gStatMemWriteHCPtr, a);
    3540 }
    3541 
    3542 
    3543 /**
    3544  * Write guest RAM, unsigned 8-bit.
    3545  *
    3546  * @param   pbDstPhys       The destination address. Relative to guest RAM.
    3547  * @param   val             Value
    3548  */
    3549 void remR3PhysWriteHCPtrU8(uint8_t *pbDstPhys, uint8_t val)
    3550 {
    3551     STAM_PROFILE_ADV_START(&gStatMemWriteHCPtr, a);
    3552     /*
    3553      * Calc the physical address ('off') and check that it's within the RAM.
    3554      */
    3555 #ifdef PGM_DYNAMIC_RAM_ALLOC
    3556     uintptr_t off = remR3HCVirt2GCPhysInlined(cpu_single_env->pVM, pbDstPhys);
    3557 #else
    3558     uintptr_t off = pbDstPhys - phys_ram_base;
    3559 #endif
    3560     PGMR3PhysWriteByte(cpu_single_env->pVM, (RTGCPHYS)off, val);
    3561     STAM_PROFILE_ADV_STOP(&gStatMemWriteHCPtr, a);
    3562 }
    3563 
    3564 
    3565 /**
    3566  * Write guest RAM, unsigned 16-bit.
    3567  *
    3568  * @param   pbDstPhys       The destination address. Relative to guest RAM.
    3569  * @param   val             Value
    3570  */
    3571 void remR3PhysWriteHCPtrU16(uint8_t *pbDstPhys, uint16_t val)
    3572 {
    3573     STAM_PROFILE_ADV_START(&gStatMemWriteHCPtr, a);
    3574     /*
    3575      * Calc the physical address ('off') and check that it's within the RAM.
    3576      */
    3577 #ifdef PGM_DYNAMIC_RAM_ALLOC
    3578     uintptr_t off = remR3HCVirt2GCPhysInlined(cpu_single_env->pVM, pbDstPhys);
    3579 #else
    3580     uintptr_t off = pbDstPhys - phys_ram_base;
    3581 #endif
    3582     PGMR3PhysWriteWord(cpu_single_env->pVM, (RTGCPHYS)off, val);
    3583     STAM_PROFILE_ADV_STOP(&gStatMemWriteHCPtr, a);
    3584 }
    3585 
    3586 
    3587 /**
    3588  * Write guest RAM, unsigned 32-bit.
    3589  *
    3590  * @param   pbDstPhys       The destination address. Relative to guest RAM.
    3591  * @param   val             Value
    3592  */
    3593 void remR3PhysWriteHCPtrU32(uint8_t *pbDstPhys, uint32_t val)
    3594 {
    3595     STAM_PROFILE_ADV_START(&gStatMemWriteHCPtr, a);
    3596     /*
    3597      * Calc the physical address ('off') and check that it's within the RAM.
    3598      */
    3599 #ifdef PGM_DYNAMIC_RAM_ALLOC
    3600     uintptr_t off = remR3HCVirt2GCPhysInlined(cpu_single_env->pVM, pbDstPhys);
    3601 #else
    3602     uintptr_t off = pbDstPhys - phys_ram_base;
    3603 #endif
    3604     PGMR3PhysWriteDword(cpu_single_env->pVM, (RTGCPHYS)off, val);
    3605     STAM_PROFILE_ADV_STOP(&gStatMemWriteHCPtr, a);
    3606 }
    3607 
    3608 
    3609 /**
    3610  * Write guest RAM, unsigned 64-bit.
    3611  *
    3612  * @param   pbDstPhys       The destination address. Relative to guest RAM.
    3613  * @param   val             Value
    3614  */
    3615 void remR3PhysWriteHCPtrU64(uint8_t *pbDstPhys, uint64_t val)
    3616 {
    3617     STAM_PROFILE_ADV_START(&gStatMemWriteHCPtr, a);
    3618     /*
    3619      * Calc the physical address ('off') and check that it's within the RAM.
    3620      */
    3621 #ifdef PGM_DYNAMIC_RAM_ALLOC
    3622     uintptr_t off = remR3HCVirt2GCPhysInlined(cpu_single_env->pVM, pbDstPhys);
    3623 #else
    3624     uintptr_t off = pbDstPhys - phys_ram_base;
    3625 #endif
    3626     PGMR3PhysWriteDword(cpu_single_env->pVM, (RTGCPHYS)off, (uint32_t)val); /** @todo add U64 interface. */
    3627     PGMR3PhysWriteDword(cpu_single_env->pVM, (RTGCPHYS)off + 4, val >> 32);
    3628     STAM_PROFILE_ADV_STOP(&gStatMemWriteHCPtr, a);
    3629 }
    3630 
    3631 #endif /* !REM_PHYS_ADDR_IN_TLB */
    3632 
    36333023
    36343024#undef LOG_GROUP
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