VirtualBox

Changeset 12989 in vbox for trunk/include/VBox/em.h


Ignore:
Timestamp:
Oct 6, 2008 2:15:39 AM (17 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
37424
Message:

VMM + VBox/cdefs.h: consolidated all the XYZ*DECLS of the VMM into VMM*DECL. Removed dead DECL and IN_XYZ* macros.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/include/VBox/em.h

    r12688 r12989  
    7878} EMSTATE;
    7979
    80 EMDECL(EMSTATE) EMGetState(PVM pVM);
     80VMMDECL(EMSTATE) EMGetState(PVM pVM);
    8181
    8282/** @name Callback handlers for instruction emulation functions.
     
    115115#define EMIsRawRing0Enabled(pVM) ((pVM)->fRawR0Enabled)
    116116
    117 EMDECL(void)        EMSetInhibitInterruptsPC(PVM pVM, RTGCUINTPTR PC);
    118 EMDECL(RTGCUINTPTR) EMGetInhibitInterruptsPC(PVM pVM);
    119 EMDECL(int)         EMInterpretDisasOne(PVM pVM, PCCPUMCTXCORE pCtxCore, PDISCPUSTATE pCpu, unsigned *pcbInstr);
    120 EMDECL(int)         EMInterpretDisasOneEx(PVM pVM, RTGCUINTPTR GCPtrInstr, PCCPUMCTXCORE pCtxCore,
    121                                           PDISCPUSTATE pCpu, unsigned *pcbInstr);
    122 EMDECL(int)         EMInterpretInstruction(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, uint32_t *pcbSize);
    123 EMDECL(int)         EMInterpretInstructionCPU(PVM pVM, PDISCPUSTATE pCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, uint32_t *pcbSize);
    124 EMDECL(int)         EMInterpretCpuId(PVM pVM, PCPUMCTXCORE pRegFrame);
    125 EMDECL(int)         EMInterpretRdtsc(PVM pVM, PCPUMCTXCORE pRegFrame);
    126 EMDECL(int)         EMInterpretInvlpg(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPTR pAddrGC);
    127 EMDECL(int)         EMInterpretIret(PVM pVM, PCPUMCTXCORE pRegFrame);
    128 EMDECL(int)         EMInterpretDRxWrite(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t DestRegDrx, uint32_t SrcRegGen);
    129 EMDECL(int)         EMInterpretDRxRead(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t DestRegGen, uint32_t SrcRegDrx);
    130 EMDECL(int)         EMInterpretCRxWrite(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t DestRegCrx, uint32_t SrcRegGen);
    131 EMDECL(int)         EMInterpretCRxRead(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t DestRegGen, uint32_t SrcRegCrx);
    132 EMDECL(int)         EMInterpretLMSW(PVM pVM, uint16_t u16Data);
    133 EMDECL(int)         EMInterpretCLTS(PVM pVM);
    134 EMDECL(int)         EMInterpretPortIO(PVM pVM, PCPUMCTXCORE pCtxCore, PDISCPUSTATE pCpu, uint32_t cbOp);
    135 EMDECL(int)         EMInterpretRdmsr(PVM pVM, PCPUMCTXCORE pRegFrame);
    136 EMDECL(int)         EMInterpretWrmsr(PVM pVM, PCPUMCTXCORE pRegFrame);
    137 EMDECL(void)        EMFlushREMTBs(PVM pVM);
     117VMMDECL(void)       EMSetInhibitInterruptsPC(PVM pVM, RTGCUINTPTR PC);
     118VMMDECL(RTGCUINTPTR) EMGetInhibitInterruptsPC(PVM pVM);
     119VMMDECL(int)        EMInterpretDisasOne(PVM pVM, PCCPUMCTXCORE pCtxCore, PDISCPUSTATE pCpu, unsigned *pcbInstr);
     120VMMDECL(int)        EMInterpretDisasOneEx(PVM pVM, RTGCUINTPTR GCPtrInstr, PCCPUMCTXCORE pCtxCore,
     121                                         PDISCPUSTATE pCpu, unsigned *pcbInstr);
     122VMMDECL(int)        EMInterpretInstruction(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, uint32_t *pcbSize);
     123VMMDECL(int)        EMInterpretInstructionCPU(PVM pVM, PDISCPUSTATE pCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, uint32_t *pcbSize);
     124VMMDECL(int)        EMInterpretCpuId(PVM pVM, PCPUMCTXCORE pRegFrame);
     125VMMDECL(int)        EMInterpretRdtsc(PVM pVM, PCPUMCTXCORE pRegFrame);
     126VMMDECL(int)        EMInterpretInvlpg(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPTR pAddrGC);
     127VMMDECL(int)        EMInterpretIret(PVM pVM, PCPUMCTXCORE pRegFrame);
     128VMMDECL(int)        EMInterpretDRxWrite(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t DestRegDrx, uint32_t SrcRegGen);
     129VMMDECL(int)        EMInterpretDRxRead(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t DestRegGen, uint32_t SrcRegDrx);
     130VMMDECL(int)        EMInterpretCRxWrite(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t DestRegCrx, uint32_t SrcRegGen);
     131VMMDECL(int)        EMInterpretCRxRead(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t DestRegGen, uint32_t SrcRegCrx);
     132VMMDECL(int)        EMInterpretLMSW(PVM pVM, uint16_t u16Data);
     133VMMDECL(int)        EMInterpretCLTS(PVM pVM);
     134VMMDECL(int)        EMInterpretPortIO(PVM pVM, PCPUMCTXCORE pCtxCore, PDISCPUSTATE pCpu, uint32_t cbOp);
     135VMMDECL(int)        EMInterpretRdmsr(PVM pVM, PCPUMCTXCORE pRegFrame);
     136VMMDECL(int)        EMInterpretWrmsr(PVM pVM, PCPUMCTXCORE pRegFrame);
     137VMMDECL(void)       EMFlushREMTBs(PVM pVM);
    138138
    139139/** @name Assembly routines
    140140 * @{ */
    141 EMDECL(uint32_t)    EMEmulateCmp(uint32_t u32Param1, uint64_t u64Param2, size_t cb);
    142 EMDECL(uint32_t)    EMEmulateAnd(void *pvParam1, uint64_t u64Param2, size_t cb);
    143 EMDECL(uint32_t)    EMEmulateInc(void *pvParam1, size_t cb);
    144 EMDECL(uint32_t)    EMEmulateDec(void *pvParam1, size_t cb);
    145 EMDECL(uint32_t)    EMEmulateOr(void *pvParam1, uint64_t u64Param2, size_t cb);
    146 EMDECL(int)         EMEmulateLockOr(void *pvParam1, uint64_t u64Param2, size_t cbSize, RTGCUINTREG32 *pf);
    147 EMDECL(uint32_t)    EMEmulateXor(void *pvParam1, uint64_t u64Param2, size_t cb);
    148 EMDECL(uint32_t)    EMEmulateAdd(void *pvParam1, uint64_t u64Param2, size_t cb);
    149 EMDECL(uint32_t)    EMEmulateSub(void *pvParam1, uint64_t u64Param2, size_t cb);
    150 EMDECL(uint32_t)    EMEmulateAdcWithCarrySet(void *pvParam1, uint64_t u64Param2, size_t cb);
    151 EMDECL(uint32_t)    EMEmulateBtr(void *pvParam1, uint64_t u64Param2);
    152 EMDECL(int)         EMEmulateLockBtr(void *pvParam1, uint64_t u64Param2, RTGCUINTREG32 *pf);
    153 EMDECL(uint32_t)    EMEmulateBts(void *pvParam1, uint64_t u64Param2);
    154 EMDECL(uint32_t)    EMEmulateBtc(void *pvParam1, uint64_t u64Param2);
    155 EMDECL(uint32_t)    EMEmulateCmpXchg(void *pvParam1, uint64_t *pu32Param2, uint64_t u32Param3, size_t cbSize);
    156 EMDECL(uint32_t)    EMEmulateLockCmpXchg(void *pvParam1, uint64_t *pu64Param2, uint64_t u64Param3, size_t cbSize);
    157 EMDECL(uint32_t)    EMEmulateCmpXchg8b32(RTHCPTR pu32Param1, uint32_t *pEAX, uint32_t *pEDX, uint32_t uEBX, uint32_t uECX);
    158 EMDECL(uint32_t)    EMEmulateLockCmpXchg8b(RTHCPTR pu32Param1, uint32_t *pEAX, uint32_t *pEDX, uint32_t uEBX, uint32_t uECX);
     141VMMDECL(uint32_t)   EMEmulateCmp(uint32_t u32Param1, uint64_t u64Param2, size_t cb);
     142VMMDECL(uint32_t)   EMEmulateAnd(void *pvParam1, uint64_t u64Param2, size_t cb);
     143VMMDECL(uint32_t)   EMEmulateInc(void *pvParam1, size_t cb);
     144VMMDECL(uint32_t)   EMEmulateDec(void *pvParam1, size_t cb);
     145VMMDECL(uint32_t)   EMEmulateOr(void *pvParam1, uint64_t u64Param2, size_t cb);
     146VMMDECL(int)        EMEmulateLockOr(void *pvParam1, uint64_t u64Param2, size_t cbSize, RTGCUINTREG32 *pf);
     147VMMDECL(uint32_t)   EMEmulateXor(void *pvParam1, uint64_t u64Param2, size_t cb);
     148VMMDECL(uint32_t)   EMEmulateAdd(void *pvParam1, uint64_t u64Param2, size_t cb);
     149VMMDECL(uint32_t)   EMEmulateSub(void *pvParam1, uint64_t u64Param2, size_t cb);
     150VMMDECL(uint32_t)   EMEmulateAdcWithCarrySet(void *pvParam1, uint64_t u64Param2, size_t cb);
     151VMMDECL(uint32_t)   EMEmulateBtr(void *pvParam1, uint64_t u64Param2);
     152VMMDECL(int)        EMEmulateLockBtr(void *pvParam1, uint64_t u64Param2, RTGCUINTREG32 *pf);
     153VMMDECL(uint32_t)   EMEmulateBts(void *pvParam1, uint64_t u64Param2);
     154VMMDECL(uint32_t)   EMEmulateBtc(void *pvParam1, uint64_t u64Param2);
     155VMMDECL(uint32_t)   EMEmulateCmpXchg(void *pvParam1, uint64_t *pu32Param2, uint64_t u32Param3, size_t cbSize);
     156VMMDECL(uint32_t)   EMEmulateLockCmpXchg(void *pvParam1, uint64_t *pu64Param2, uint64_t u64Param3, size_t cbSize);
     157VMMDECL(uint32_t)   EMEmulateCmpXchg8b32(RTHCPTR pu32Param1, uint32_t *pEAX, uint32_t *pEDX, uint32_t uEBX, uint32_t uECX);
     158VMMDECL(uint32_t)   EMEmulateLockCmpXchg8b(RTHCPTR pu32Param1, uint32_t *pEAX, uint32_t *pEDX, uint32_t uEBX, uint32_t uECX);
    159159/** @} */
    160160
     
    164164 * @{
    165165 */
    166 EMR3DECL(int)       EMR3Init(PVM pVM);
    167 EMR3DECL(void)      EMR3Relocate(PVM pVM);
    168 EMR3DECL(void)      EMR3Reset(PVM pVM);
    169 EMR3DECL(int)       EMR3Term(PVM pVM);
    170 EMR3DECL(DECLNORETURN(void)) EMR3FatalError(PVM pVM, int rc);
    171 EMR3DECL(int)       EMR3ExecuteVM(PVM pVM);
    172 EMR3DECL(int)       EMR3CheckRawForcedActions(PVM pVM);
    173 EMR3DECL(int)       EMR3Interpret(PVM pVM);
     166VMMR3DECL(int)      EMR3Init(PVM pVM);
     167VMMR3DECL(void)     EMR3Relocate(PVM pVM);
     168VMMR3DECL(void)     EMR3Reset(PVM pVM);
     169VMMR3DECL(int)      EMR3Term(PVM pVM);
     170VMMR3DECL(DECLNORETURN(void)) EMR3FatalError(PVM pVM, int rc);
     171VMMR3DECL(int)      EMR3ExecuteVM(PVM pVM);
     172VMMR3DECL(int)      EMR3CheckRawForcedActions(PVM pVM);
     173VMMR3DECL(int)      EMR3Interpret(PVM pVM);
    174174
    175175/**
     
    194194} EMRAWMODE;
    195195
    196 EMR3DECL(int)       EMR3RawSetMode(PVM pVM, EMRAWMODE enmMode);
     196VMMR3DECL(int)      EMR3RawSetMode(PVM pVM, EMRAWMODE enmMode);
    197197/** @} */
    198198#endif /* IN_RING3 */
     
    204204 * @{
    205205 */
    206 EMGCDECL(int)       EMGCTrap(PVM pVM, unsigned uTrap, PCPUMCTXCORE pRegFrame);
    207 EMGCDECL(uint32_t) EMGCEmulateLockCmpXchg(RTRCPTR pu32Param1, uint32_t *pu32Param2, uint32_t u32Param3, size_t cbSize, uint32_t *pEflags);
    208 EMGCDECL(uint32_t) EMGCEmulateCmpXchg(RTRCPTR pu32Param1, uint32_t *pu32Param2, uint32_t u32Param3, size_t cbSize, uint32_t *pEflags);
    209 EMGCDECL(uint32_t) EMGCEmulateLockCmpXchg8b(RTRCPTR pu32Param1, uint32_t *pEAX, uint32_t *pEDX, uint32_t uEBX, uint32_t uECX, uint32_t *pEflags);
    210 EMGCDECL(uint32_t) EMGCEmulateCmpXchg8b(RTRCPTR pu32Param1, uint32_t *pEAX, uint32_t *pEDX, uint32_t uEBX, uint32_t uECX, uint32_t *pEflags);
    211 EMGCDECL(uint32_t) EMGCEmulateLockXAdd(RTRCPTR pu32Param1, uint32_t *pu32Param2, size_t cbSize, uint32_t *pEflags);
    212 EMGCDECL(uint32_t) EMGCEmulateXAdd(RTRCPTR pu32Param1, uint32_t *pu32Param2, size_t cbSize, uint32_t *pEflags);
     206VMMRCDECL(int)      EMGCTrap(PVM pVM, unsigned uTrap, PCPUMCTXCORE pRegFrame);
     207VMMRCDECL(uint32_t) EMGCEmulateLockCmpXchg(RTRCPTR pu32Param1, uint32_t *pu32Param2, uint32_t u32Param3, size_t cbSize, uint32_t *pEflags);
     208VMMRCDECL(uint32_t) EMGCEmulateCmpXchg(RTRCPTR pu32Param1, uint32_t *pu32Param2, uint32_t u32Param3, size_t cbSize, uint32_t *pEflags);
     209VMMRCDECL(uint32_t) EMGCEmulateLockCmpXchg8b(RTRCPTR pu32Param1, uint32_t *pEAX, uint32_t *pEDX, uint32_t uEBX, uint32_t uECX, uint32_t *pEflags);
     210VMMRCDECL(uint32_t) EMGCEmulateCmpXchg8b(RTRCPTR pu32Param1, uint32_t *pEAX, uint32_t *pEDX, uint32_t uEBX, uint32_t uECX, uint32_t *pEflags);
     211VMMRCDECL(uint32_t) EMGCEmulateLockXAdd(RTRCPTR pu32Param1, uint32_t *pu32Param2, size_t cbSize, uint32_t *pEflags);
     212VMMRCDECL(uint32_t) EMGCEmulateXAdd(RTRCPTR pu32Param1, uint32_t *pu32Param2, size_t cbSize, uint32_t *pEflags);
    213213/** @} */
    214214#endif /* IN_GC */
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