IEMInternal.h@ 40164

Last change on this file since 40164 was 40164, checked in by vboxsync, 13 years ago
IEM: A bunch of r80 by r80 instructions, needed fsubrp stN,st0.
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 41.8 KB

Line
1	/* $Id: IEMInternal.h 40164 2012-02-17 00:36:19Z vboxsync $ */
2	/** @file
3	* IEM - Internal header file.
4	*/
5
6	/*
7	* Copyright (C) 2011-2012 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.215389.xyz. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	#ifndef ___IEMInternal_h
19	#define ___IEMInternal_h
20
21	#include <VBox/vmm/stam.h>
22	#include <VBox/vmm/cpum.h>
23	#include <VBox/param.h>
24
25
26	RT_C_DECLS_BEGIN
27
28
29	/** @defgroup grp_iem_int Internals
30	* @ingroup grp_iem
31	* @internal
32	* @{
33	*/
34
35
36	/** Finish and move to types.h */
37	typedef union
38	{
39	uint32_t u32;
40	} RTFLOAT32U;
41	typedef RTFLOAT32U *PRTFLOAT32U;
42	typedef RTFLOAT32U const *PCRTFLOAT32U;
43
44
45	/**
46	* Operand or addressing mode.
47	*/
48	typedef enum IEMMODE
49	{
50	IEMMODE_16BIT = 0,
51	IEMMODE_32BIT,
52	IEMMODE_64BIT
53	} IEMMODE;
54	AssertCompileSize(IEMMODE, 4);
55
56	/**
57	* Extended operand mode that includes a representation of 8-bit.
58	*
59	* This is used for packing down modes when invoking some C instruction
60	* implementations.
61	*/
62	typedef enum IEMMODEX
63	{
64	IEMMODEX_16BIT = IEMMODE_16BIT,
65	IEMMODEX_32BIT = IEMMODE_32BIT,
66	IEMMODEX_64BIT = IEMMODE_64BIT,
67	IEMMODEX_8BIT
68	} IEMMODEX;
69	AssertCompileSize(IEMMODEX, 4);
70
71
72	/**
73	* A FPU result.
74	*/
75	typedef struct IEMFPURESULT
76	{
77	/** The output value. */
78	RTFLOAT80U r80Result;
79	/** The output status. */
80	uint16_t FSW;
81	} IEMFPURESULT;
82	AssertCompileMemberOffset(IEMFPURESULT, FSW, 10);
83	/** Pointer to a FPU result. */
84	typedef IEMFPURESULT *PIEMFPURESULT;
85	/** Pointer to a const FPU result. */
86	typedef IEMFPURESULT const *PCIEMFPURESULT;
87
88
89	#ifdef IEM_VERIFICATION_MODE
90
91	/**
92	* Verification event type.
93	*/
94	typedef enum IEMVERIFYEVENT
95	{
96	IEMVERIFYEVENT_INVALID = 0,
97	IEMVERIFYEVENT_IOPORT_READ,
98	IEMVERIFYEVENT_IOPORT_WRITE,
99	IEMVERIFYEVENT_RAM_WRITE,
100	IEMVERIFYEVENT_RAM_READ
101	} IEMVERIFYEVENT;
102
103	/** Checks if the event type is a RAM read or write. */
104	# define IEMVERIFYEVENT_IS_RAM(a_enmType) ((a_enmType) == IEMVERIFYEVENT_RAM_WRITE \|\| (a_enmType) == IEMVERIFYEVENT_RAM_READ)
105
106	/**
107	* Verification event record.
108	*/
109	typedef struct IEMVERIFYEVTREC
110	{
111	/** Pointer to the next record in the list. */
112	struct IEMVERIFYEVTREC *pNext;
113	/** The event type. */
114	IEMVERIFYEVENT enmEvent;
115	/** The event data. */
116	union
117	{
118	/** IEMVERIFYEVENT_IOPORT_READ */
119	struct
120	{
121	RTIOPORT Port;
122	uint32_t cbValue;
123	} IOPortRead;
124
125	/** IEMVERIFYEVENT_IOPORT_WRITE */
126	struct
127	{
128	RTIOPORT Port;
129	uint32_t cbValue;
130	uint32_t u32Value;
131	} IOPortWrite;
132
133	/** IEMVERIFYEVENT_RAM_READ */
134	struct
135	{
136	RTGCPHYS GCPhys;
137	uint32_t cb;
138	} RamRead;
139
140	/** IEMVERIFYEVENT_RAM_WRITE */
141	struct
142	{
143	RTGCPHYS GCPhys;
144	uint32_t cb;
145	uint8_t ab[32];
146	} RamWrite;
147	} u;
148	} IEMVERIFYEVTREC;
149	/** Pointer to an IEM event verification records. */
150	typedef IEMVERIFYEVTREC *PIEMVERIFYEVTREC;
151
152	#endif /* IEM_VERIFICATION_MODE */
153
154
155	/**
156	* The per-CPU IEM state.
157	*/
158	typedef struct IEMCPU
159	{
160	/** Pointer to the CPU context - ring-3 contex. */
161	R3PTRTYPE(PCPUMCTX) pCtxR3;
162	/** Pointer to the CPU context - ring-0 contex. */
163	R0PTRTYPE(PCPUMCTX) pCtxR0;
164	/** Pointer to the CPU context - raw-mode contex. */
165	RCPTRTYPE(PCPUMCTX) pCtxRC;
166
167	/** Offset of the VMCPU structure relative to this structure (negative). */
168	int32_t offVMCpu;
169	/** Offset of the VM structure relative to this structure (negative). */
170	int32_t offVM;
171
172	/** Whether to bypass access handlers or not. */
173	bool fByPassHandlers;
174	/** Explicit alignment padding. */
175	bool afAlignment0[3];
176
177	/** The flags of the current exception / interrupt. */
178	uint32_t fCurXcpt;
179	/** The current exception / interrupt. */
180	uint8_t uCurXcpt;
181	/** Exception / interrupt recursion depth. */
182	int8_t cXcptRecursions;
183	/** Explicit alignment padding. */
184	bool afAlignment1[5];
185	/** The CPL. */
186	uint8_t uCpl;
187	/** The current CPU execution mode (CS). */
188	IEMMODE enmCpuMode;
189
190	/** @name Statistics
191	* @{ */
192	/** The number of instructions we've executed. */
193	uint32_t cInstructions;
194	/** The number of potential exits. */
195	uint32_t cPotentialExits;
196	#ifdef IEM_VERIFICATION_MODE
197	/** The Number of I/O port reads that has been performed. */
198	uint32_t cIOReads;
199	/** The Number of I/O port writes that has been performed. */
200	uint32_t cIOWrites;
201	/** Set if no comparison to REM is currently performed.
202	* This is used to skip past really slow bits. */
203	bool fNoRem;
204	/** Indicates that RAX and RDX differences should be ignored since RDTSC
205	* and RDTSCP are timing sensitive. */
206	bool fIgnoreRaxRdx;
207	bool afAlignment2[2];
208	/** Mask of undefined eflags.
209	* The verifier will any difference in these flags. */
210	uint32_t fUndefinedEFlags;
211	/** The physical address corresponding to abOpcodes[0]. */
212	RTGCPHYS GCPhysOpcodes;
213	#endif
214	/** @} */
215
216	/** @name Decoder state.
217	* @{ */
218
219	/** The default addressing mode . */
220	IEMMODE enmDefAddrMode;
221	/** The effective addressing mode . */
222	IEMMODE enmEffAddrMode;
223	/** The default operand mode . */
224	IEMMODE enmDefOpSize;
225	/** The effective operand mode . */
226	IEMMODE enmEffOpSize;
227
228	/** The prefix mask (IEM_OP_PRF_XXX). */
229	uint32_t fPrefixes;
230	/** The extra REX ModR/M register field bit (REX.R << 3). */
231	uint8_t uRexReg;
232	/** The extra REX ModR/M r/m field, SIB base and opcode reg bit
233	* (REX.B << 3). */
234	uint8_t uRexB;
235	/** The extra REX SIB index field bit (REX.X << 3). */
236	uint8_t uRexIndex;
237	/** The effective segment register (X86_SREG_XXX). */
238	uint8_t iEffSeg;
239
240	/** The current offset into abOpcodes. */
241	uint8_t offOpcode;
242	/** The size of what has currently been fetched into abOpcodes. */
243	uint8_t cbOpcode;
244	/** The opcode bytes. */
245	uint8_t abOpcode[15];
246	/** Offset into abOpcodes where the FPU instruction starts.
247	* Only set by the FPU escape opcodes (0xd8-0xdf) and used later on when the
248	* instruction result is committed. */
249	uint8_t offFpuOpcode;
250
251	/** @}*/
252
253	/** Alignment padding for aMemMappings. */
254	uint8_t abAlignment2[4];
255
256	/** The number of active guest memory mappings. */
257	uint8_t cActiveMappings;
258	/** The next unused mapping index. */
259	uint8_t iNextMapping;
260	/** Records for tracking guest memory mappings. */
261	struct
262	{
263	/** The address of the mapped bytes. */
264	void *pv;
265	#if defined(IN_RC) && HC_ARCH_BITS == 64
266	uint32_t u32Alignment3; /*< Alignment padding. /
267	#endif
268	/** The access flags (IEM_ACCESS_XXX).
269	* IEM_ACCESS_INVALID if the entry is unused. */
270	uint32_t fAccess;
271	#if HC_ARCH_BITS == 64
272	uint32_t u32Alignment4; /*< Alignment padding. /
273	#endif
274	} aMemMappings[3];
275
276	/** Bounce buffer info.
277	* This runs in parallel to aMemMappings. */
278	struct
279	{
280	/** The physical address of the first byte. */
281	RTGCPHYS GCPhysFirst;
282	/** The physical address of the second page. */
283	RTGCPHYS GCPhysSecond;
284	/** The number of bytes in the first page. */
285	uint16_t cbFirst;
286	/** The number of bytes in the second page. */
287	uint16_t cbSecond;
288	/** Whether it's unassigned memory. */
289	bool fUnassigned;
290	/** Explicit alignment padding. */
291	bool afAlignment5[3];
292	} aMemBbMappings[3];
293
294	/** Bounce buffer storage.
295	* This runs in parallel to aMemMappings and aMemBbMappings. */
296	struct
297	{
298	uint8_t ab[512];
299	} aBounceBuffers[3];
300
301	#ifdef IEM_VERIFICATION_MODE
302	/** The event verification records for what IEM did (LIFO). */
303	R3PTRTYPE(PIEMVERIFYEVTREC) pIemEvtRecHead;
304	/** Insertion point for pIemEvtRecHead. */
305	R3PTRTYPE(PIEMVERIFYEVTREC *) ppIemEvtRecNext;
306	/** The event verification records for what the other party did (FIFO). */
307	R3PTRTYPE(PIEMVERIFYEVTREC) pOtherEvtRecHead;
308	/** Insertion point for pOtherEvtRecHead. */
309	R3PTRTYPE(PIEMVERIFYEVTREC *) ppOtherEvtRecNext;
310	/** List of free event records. */
311	R3PTRTYPE(PIEMVERIFYEVTREC) pFreeEvtRec;
312	#endif
313	} IEMCPU;
314	/** Pointer to the per-CPU IEM state. */
315	typedef IEMCPU *PIEMCPU;
316
317	/** Converts a IEMCPU pointer to a VMCPU pointer.
318	* @returns VMCPU pointer.
319	* @param a_pIemCpu The IEM per CPU instance data.
320	*/
321	#define IEMCPU_TO_VMCPU(a_pIemCpu) ((PVMCPU)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVMCpu ))
322
323	/** Converts a IEMCPU pointer to a VM pointer.
324	* @returns VM pointer.
325	* @param a_pIemCpu The IEM per CPU instance data.
326	*/
327	#define IEMCPU_TO_VM(a_pIemCpu) ((PVM)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVM ))
328
329	/** @name IEM_ACCESS_XXX - Access details.
330	* @{ */
331	#define IEM_ACCESS_INVALID UINT32_C(0x000000ff)
332	#define IEM_ACCESS_TYPE_READ UINT32_C(0x00000001)
333	#define IEM_ACCESS_TYPE_WRITE UINT32_C(0x00000002)
334	#define IEM_ACCESS_TYPE_EXEC UINT32_C(0x00000004)
335	#define IEM_ACCESS_TYPE_MASK UINT32_C(0x00000007)
336	#define IEM_ACCESS_WHAT_CODE UINT32_C(0x00000010)
337	#define IEM_ACCESS_WHAT_DATA UINT32_C(0x00000020)
338	#define IEM_ACCESS_WHAT_STACK UINT32_C(0x00000030)
339	#define IEM_ACCESS_WHAT_SYS UINT32_C(0x00000040)
340	#define IEM_ACCESS_WHAT_MASK UINT32_C(0x00000070)
341	/** Used in aMemMappings to indicate that the entry is bounce buffered. */
342	#define IEM_ACCESS_BOUNCE_BUFFERED UINT32_C(0x00000100)
343	/** Read+write data alias. */
344	#define IEM_ACCESS_DATA_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
345	/** Write data alias. */
346	#define IEM_ACCESS_DATA_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
347	/** Read data alias. */
348	#define IEM_ACCESS_DATA_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_DATA)
349	/** Instruction fetch alias. */
350	#define IEM_ACCESS_INSTRUCTION (IEM_ACCESS_TYPE_EXEC \| IEM_ACCESS_WHAT_CODE)
351	/** Stack write alias. */
352	#define IEM_ACCESS_STACK_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
353	/** Stack read alias. */
354	#define IEM_ACCESS_STACK_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_STACK)
355	/** Stack read+write alias. */
356	#define IEM_ACCESS_STACK_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
357	/** Read system table alias. */
358	#define IEM_ACCESS_SYS_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_SYS)
359	/** Read+write system table alias. */
360	#define IEM_ACCESS_SYS_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_SYS)
361	/** @} */
362
363	/** @name Prefix constants (IEMCPU::fPrefixes)
364	* @{ */
365	#define IEM_OP_PRF_SEG_CS RT_BIT_32(0) /*< CS segment prefix (0x2e). /
366	#define IEM_OP_PRF_SEG_SS RT_BIT_32(1) /*< SS segment prefix (0x36). /
367	#define IEM_OP_PRF_SEG_DS RT_BIT_32(2) /*< DS segment prefix (0x3e). /
368	#define IEM_OP_PRF_SEG_ES RT_BIT_32(3) /*< ES segment prefix (0x26). /
369	#define IEM_OP_PRF_SEG_FS RT_BIT_32(4) /*< FS segment prefix (0x64). /
370	#define IEM_OP_PRF_SEG_GS RT_BIT_32(5) /*< GS segment prefix (0x65). /
371	#define IEM_OP_PRF_SEG_MASK UINT32_C(0x3f)
372
373	#define IEM_OP_PRF_SIZE_OP RT_BIT_32(8) /*< Operand size prefix (0x66). /
374	#define IEM_OP_PRF_SIZE_REX_W RT_BIT_32(9) /*< REX.W prefix (0x48-0x4f). /
375	#define IEM_OP_PRF_SIZE_ADDR RT_BIT_32(10) /*< Address size prefix (0x67). /
376
377	#define IEM_OP_PRF_LOCK RT_BIT_32(16) /*< Lock prefix (0xf0). /
378	#define IEM_OP_PRF_REPNZ RT_BIT_32(17) /*< Repeat-not-zero prefix (0xf2). /
379	#define IEM_OP_PRF_REPZ RT_BIT_32(18) /*< Repeat-if-zero prefix (0xf3). /
380
381	#define IEM_OP_PRF_REX RT_BIT_32(24) /*< Any REX prefix (0x40-0x4f). /
382	#define IEM_OP_PRF_REX_R RT_BIT_32(25) /*< REX.R prefix (0x44,0x45,0x46,0x47,0x4c,0x4d,0x4e,0x4f). /
383	#define IEM_OP_PRF_REX_B RT_BIT_32(26) /*< REX.B prefix (0x41,0x43,0x45,0x47,0x49,0x4b,0x4d,0x4f). /
384	#define IEM_OP_PRF_REX_X RT_BIT_32(27) /*< REX.X prefix (0x42,0x43,0x46,0x47,0x4a,0x4b,0x4e,0x4f). /
385	/** @} */
386
387	/**
388	* Tests if verification mode is enabled.
389	*
390	* This expands to @c false when IEM_VERIFICATION_MODE is not defined and
391	* should therefore cause the compiler to eliminate the verification branch
392	* of an if statement. */
393	#ifdef IEM_VERIFICATION_MODE
394	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
395	#else
396	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (false)
397	#endif
398
399	/**
400	* Indicates to the verifier that the given flag set is undefined.
401	*
402	* Can be invoked again to add more flags.
403	*
404	* This is a NOOP if the verifier isn't compiled in.
405	*/
406	#ifdef IEM_VERIFICATION_MODE
407	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { pIemCpu->fUndefinedEFlags \|= (a_fEfl); } while (0)
408	#else
409	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { } while (0)
410	#endif
411
412
413	/** @def IEM_DECL_IMPL_TYPE
414	* For typedef'ing an instruction implementation function.
415	*
416	* @param a_RetType The return type.
417	* @param a_Name The name of the type.
418	* @param a_ArgList The argument list enclosed in parentheses.
419	*/
420
421	/** @def IEM_DECL_IMPL_DEF
422	* For defining an instruction implementation function.
423	*
424	* @param a_RetType The return type.
425	* @param a_Name The name of the type.
426	* @param a_ArgList The argument list enclosed in parentheses.
427	*/
428
429	#if defined(__GNUC__) && defined(RT_ARCH_X86)
430	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
431	__attribute__((__fastcall__)) a_RetType (a_Name) a_ArgList
432	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
433	__attribute__((__fastcall__, __nothrow__)) a_RetType a_Name a_ArgList
434
435	#elif defined(_MSC_VER) && defined(RT_ARCH_X86)
436	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
437	a_RetType (__fastcall a_Name) a_ArgList
438	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
439	a_RetType __fastcall a_Name a_ArgList
440
441	#else
442	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
443	a_RetType (VBOXCALL a_Name) a_ArgList
444	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
445	a_RetType VBOXCALL a_Name a_ArgList
446
447	#endif
448
449	/** @name Arithmetic assignment operations on bytes (binary).
450	* @{ */
451	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU8, (uint8_t pu8Dst, uint8_t u8Src, uint32_t pEFlags));
452	typedef FNIEMAIMPLBINU8 *PFNIEMAIMPLBINU8;
453	FNIEMAIMPLBINU8 iemAImpl_add_u8, iemAImpl_add_u8_locked;
454	FNIEMAIMPLBINU8 iemAImpl_adc_u8, iemAImpl_adc_u8_locked;
455	FNIEMAIMPLBINU8 iemAImpl_sub_u8, iemAImpl_sub_u8_locked;
456	FNIEMAIMPLBINU8 iemAImpl_sbb_u8, iemAImpl_sbb_u8_locked;
457	FNIEMAIMPLBINU8 iemAImpl_or_u8, iemAImpl_or_u8_locked;
458	FNIEMAIMPLBINU8 iemAImpl_xor_u8, iemAImpl_xor_u8_locked;
459	FNIEMAIMPLBINU8 iemAImpl_and_u8, iemAImpl_and_u8_locked;
460	/** @} */
461
462	/** @name Arithmetic assignment operations on words (binary).
463	* @{ */
464	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU16, (uint16_t pu16Dst, uint16_t u16Src, uint32_t pEFlags));
465	typedef FNIEMAIMPLBINU16 *PFNIEMAIMPLBINU16;
466	FNIEMAIMPLBINU16 iemAImpl_add_u16, iemAImpl_add_u16_locked;
467	FNIEMAIMPLBINU16 iemAImpl_adc_u16, iemAImpl_adc_u16_locked;
468	FNIEMAIMPLBINU16 iemAImpl_sub_u16, iemAImpl_sub_u16_locked;
469	FNIEMAIMPLBINU16 iemAImpl_sbb_u16, iemAImpl_sbb_u16_locked;
470	FNIEMAIMPLBINU16 iemAImpl_or_u16, iemAImpl_or_u16_locked;
471	FNIEMAIMPLBINU16 iemAImpl_xor_u16, iemAImpl_xor_u16_locked;
472	FNIEMAIMPLBINU16 iemAImpl_and_u16, iemAImpl_and_u16_locked;
473	/** @} */
474
475	/** @name Arithmetic assignment operations on double words (binary).
476	* @{ */
477	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU32, (uint32_t pu32Dst, uint32_t u32Src, uint32_t pEFlags));
478	typedef FNIEMAIMPLBINU32 *PFNIEMAIMPLBINU32;
479	FNIEMAIMPLBINU32 iemAImpl_add_u32, iemAImpl_add_u32_locked;
480	FNIEMAIMPLBINU32 iemAImpl_adc_u32, iemAImpl_adc_u32_locked;
481	FNIEMAIMPLBINU32 iemAImpl_sub_u32, iemAImpl_sub_u32_locked;
482	FNIEMAIMPLBINU32 iemAImpl_sbb_u32, iemAImpl_sbb_u32_locked;
483	FNIEMAIMPLBINU32 iemAImpl_or_u32, iemAImpl_or_u32_locked;
484	FNIEMAIMPLBINU32 iemAImpl_xor_u32, iemAImpl_xor_u32_locked;
485	FNIEMAIMPLBINU32 iemAImpl_and_u32, iemAImpl_and_u32_locked;
486	/** @} */
487
488	/** @name Arithmetic assignment operations on quad words (binary).
489	* @{ */
490	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU64, (uint64_t pu64Dst, uint64_t u64Src, uint32_t pEFlags));
491	typedef FNIEMAIMPLBINU64 *PFNIEMAIMPLBINU64;
492	FNIEMAIMPLBINU64 iemAImpl_add_u64, iemAImpl_add_u64_locked;
493	FNIEMAIMPLBINU64 iemAImpl_adc_u64, iemAImpl_adc_u64_locked;
494	FNIEMAIMPLBINU64 iemAImpl_sub_u64, iemAImpl_sub_u64_locked;
495	FNIEMAIMPLBINU64 iemAImpl_sbb_u64, iemAImpl_sbb_u64_locked;
496	FNIEMAIMPLBINU64 iemAImpl_or_u64, iemAImpl_or_u64_locked;
497	FNIEMAIMPLBINU64 iemAImpl_xor_u64, iemAImpl_xor_u64_locked;
498	FNIEMAIMPLBINU64 iemAImpl_and_u64, iemAImpl_and_u64_locked;
499	/** @} */
500
501	/** @name Compare operations (thrown in with the binary ops).
502	* @{ */
503	FNIEMAIMPLBINU8 iemAImpl_cmp_u8;
504	FNIEMAIMPLBINU16 iemAImpl_cmp_u16;
505	FNIEMAIMPLBINU32 iemAImpl_cmp_u32;
506	FNIEMAIMPLBINU64 iemAImpl_cmp_u64;
507	/** @} */
508
509	/** @name Test operations (thrown in with the binary ops).
510	* @{ */
511	FNIEMAIMPLBINU8 iemAImpl_test_u8;
512	FNIEMAIMPLBINU16 iemAImpl_test_u16;
513	FNIEMAIMPLBINU32 iemAImpl_test_u32;
514	FNIEMAIMPLBINU64 iemAImpl_test_u64;
515	/** @} */
516
517	/** @name Bit operations operations (thrown in with the binary ops).
518	* @{ */
519	FNIEMAIMPLBINU16 iemAImpl_bt_u16, iemAImpl_bt_u16_locked;
520	FNIEMAIMPLBINU32 iemAImpl_bt_u32, iemAImpl_bt_u32_locked;
521	FNIEMAIMPLBINU64 iemAImpl_bt_u64, iemAImpl_bt_u64_locked;
522	FNIEMAIMPLBINU16 iemAImpl_btc_u16, iemAImpl_btc_u16_locked;
523	FNIEMAIMPLBINU32 iemAImpl_btc_u32, iemAImpl_btc_u32_locked;
524	FNIEMAIMPLBINU64 iemAImpl_btc_u64, iemAImpl_btc_u64_locked;
525	FNIEMAIMPLBINU16 iemAImpl_btr_u16, iemAImpl_btr_u16_locked;
526	FNIEMAIMPLBINU32 iemAImpl_btr_u32, iemAImpl_btr_u32_locked;
527	FNIEMAIMPLBINU64 iemAImpl_btr_u64, iemAImpl_btr_u64_locked;
528	FNIEMAIMPLBINU16 iemAImpl_bts_u16, iemAImpl_bts_u16_locked;
529	FNIEMAIMPLBINU32 iemAImpl_bts_u32, iemAImpl_bts_u32_locked;
530	FNIEMAIMPLBINU64 iemAImpl_bts_u64, iemAImpl_bts_u64_locked;
531	/** @} */
532
533	/** @name Exchange memory with register operations.
534	* @{ */
535	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u8, (uint8_t pu8Mem, uint8_t pu8Reg));
536	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u16,(uint16_t pu16Mem, uint16_t pu16Reg));
537	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u32,(uint32_t pu32Mem, uint32_t pu32Reg));
538	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u64,(uint64_t pu64Mem, uint64_t pu64Reg));
539	/** @} */
540
541	/** @name Exchange and add operations.
542	* @{ */
543	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
544	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
545	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
546	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
547	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8_locked, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
548	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16_locked,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
549	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32_locked,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
550	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64_locked,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
551	/** @} */
552
553	/** @name Double precision shifts
554	* @{ */
555	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU16,(uint16_t pu16Dst, uint16_t u16Src, uint8_t cShift, uint32_t pEFlags));
556	typedef FNIEMAIMPLSHIFTDBLU16 *PFNIEMAIMPLSHIFTDBLU16;
557	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU32,(uint32_t pu32Dst, uint32_t u32Src, uint8_t cShift, uint32_t pEFlags));
558	typedef FNIEMAIMPLSHIFTDBLU32 *PFNIEMAIMPLSHIFTDBLU32;
559	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU64,(uint64_t pu64Dst, uint64_t u64Src, uint8_t cShift, uint32_t pEFlags));
560	typedef FNIEMAIMPLSHIFTDBLU64 *PFNIEMAIMPLSHIFTDBLU64;
561	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shld_u16;
562	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shld_u32;
563	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shld_u64;
564	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shrd_u16;
565	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shrd_u32;
566	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shrd_u64;
567	/** @} */
568
569
570	/** @name Bit search operations (thrown in with the binary ops).
571	* @{ */
572	FNIEMAIMPLBINU16 iemAImpl_bsf_u16;
573	FNIEMAIMPLBINU32 iemAImpl_bsf_u32;
574	FNIEMAIMPLBINU64 iemAImpl_bsf_u64;
575	FNIEMAIMPLBINU16 iemAImpl_bsr_u16;
576	FNIEMAIMPLBINU32 iemAImpl_bsr_u32;
577	FNIEMAIMPLBINU64 iemAImpl_bsr_u64;
578	/** @} */
579
580	/** @name Signed multiplication operations (thrown in with the binary ops).
581	* @{ */
582	FNIEMAIMPLBINU16 iemAImpl_imul_two_u16;
583	FNIEMAIMPLBINU32 iemAImpl_imul_two_u32;
584	FNIEMAIMPLBINU64 iemAImpl_imul_two_u64;
585	/** @} */
586
587	/** @name Arithmetic assignment operations on bytes (unary).
588	* @{ */
589	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU8, (uint8_t pu8Dst, uint32_t pEFlags));
590	typedef FNIEMAIMPLUNARYU8 *PFNIEMAIMPLUNARYU8;
591	FNIEMAIMPLUNARYU8 iemAImpl_inc_u8, iemAImpl_inc_u8_locked;
592	FNIEMAIMPLUNARYU8 iemAImpl_dec_u8, iemAImpl_dec_u8_locked;
593	FNIEMAIMPLUNARYU8 iemAImpl_not_u8, iemAImpl_not_u8_locked;
594	FNIEMAIMPLUNARYU8 iemAImpl_neg_u8, iemAImpl_neg_u8_locked;
595	/** @} */
596
597	/** @name Arithmetic assignment operations on words (unary).
598	* @{ */
599	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU16, (uint16_t pu16Dst, uint32_t pEFlags));
600	typedef FNIEMAIMPLUNARYU16 *PFNIEMAIMPLUNARYU16;
601	FNIEMAIMPLUNARYU16 iemAImpl_inc_u16, iemAImpl_inc_u16_locked;
602	FNIEMAIMPLUNARYU16 iemAImpl_dec_u16, iemAImpl_dec_u16_locked;
603	FNIEMAIMPLUNARYU16 iemAImpl_not_u16, iemAImpl_not_u16_locked;
604	FNIEMAIMPLUNARYU16 iemAImpl_neg_u16, iemAImpl_neg_u16_locked;
605	/** @} */
606
607	/** @name Arithmetic assignment operations on double words (unary).
608	* @{ */
609	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU32, (uint32_t pu32Dst, uint32_t pEFlags));
610	typedef FNIEMAIMPLUNARYU32 *PFNIEMAIMPLUNARYU32;
611	FNIEMAIMPLUNARYU32 iemAImpl_inc_u32, iemAImpl_inc_u32_locked;
612	FNIEMAIMPLUNARYU32 iemAImpl_dec_u32, iemAImpl_dec_u32_locked;
613	FNIEMAIMPLUNARYU32 iemAImpl_not_u32, iemAImpl_not_u32_locked;
614	FNIEMAIMPLUNARYU32 iemAImpl_neg_u32, iemAImpl_neg_u32_locked;
615	/** @} */
616
617	/** @name Arithmetic assignment operations on quad words (unary).
618	* @{ */
619	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU64, (uint64_t pu64Dst, uint32_t pEFlags));
620	typedef FNIEMAIMPLUNARYU64 *PFNIEMAIMPLUNARYU64;
621	FNIEMAIMPLUNARYU64 iemAImpl_inc_u64, iemAImpl_inc_u64_locked;
622	FNIEMAIMPLUNARYU64 iemAImpl_dec_u64, iemAImpl_dec_u64_locked;
623	FNIEMAIMPLUNARYU64 iemAImpl_not_u64, iemAImpl_not_u64_locked;
624	FNIEMAIMPLUNARYU64 iemAImpl_neg_u64, iemAImpl_neg_u64_locked;
625	/** @} */
626
627
628	/** @name Shift operations on bytes (Group 2).
629	* @{ */
630	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU8,(uint8_t pu8Dst, uint8_t cShift, uint32_t pEFlags));
631	typedef FNIEMAIMPLSHIFTU8 *PFNIEMAIMPLSHIFTU8;
632	FNIEMAIMPLSHIFTU8 iemAImpl_rol_u8;
633	FNIEMAIMPLSHIFTU8 iemAImpl_ror_u8;
634	FNIEMAIMPLSHIFTU8 iemAImpl_rcl_u8;
635	FNIEMAIMPLSHIFTU8 iemAImpl_rcr_u8;
636	FNIEMAIMPLSHIFTU8 iemAImpl_shl_u8;
637	FNIEMAIMPLSHIFTU8 iemAImpl_shr_u8;
638	FNIEMAIMPLSHIFTU8 iemAImpl_sar_u8;
639	/** @} */
640
641	/** @name Shift operations on words (Group 2).
642	* @{ */
643	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU16,(uint16_t pu16Dst, uint8_t cShift, uint32_t pEFlags));
644	typedef FNIEMAIMPLSHIFTU16 *PFNIEMAIMPLSHIFTU16;
645	FNIEMAIMPLSHIFTU16 iemAImpl_rol_u16;
646	FNIEMAIMPLSHIFTU16 iemAImpl_ror_u16;
647	FNIEMAIMPLSHIFTU16 iemAImpl_rcl_u16;
648	FNIEMAIMPLSHIFTU16 iemAImpl_rcr_u16;
649	FNIEMAIMPLSHIFTU16 iemAImpl_shl_u16;
650	FNIEMAIMPLSHIFTU16 iemAImpl_shr_u16;
651	FNIEMAIMPLSHIFTU16 iemAImpl_sar_u16;
652	/** @} */
653
654	/** @name Shift operations on double words (Group 2).
655	* @{ */
656	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU32,(uint32_t pu32Dst, uint8_t cShift, uint32_t pEFlags));
657	typedef FNIEMAIMPLSHIFTU32 *PFNIEMAIMPLSHIFTU32;
658	FNIEMAIMPLSHIFTU32 iemAImpl_rol_u32;
659	FNIEMAIMPLSHIFTU32 iemAImpl_ror_u32;
660	FNIEMAIMPLSHIFTU32 iemAImpl_rcl_u32;
661	FNIEMAIMPLSHIFTU32 iemAImpl_rcr_u32;
662	FNIEMAIMPLSHIFTU32 iemAImpl_shl_u32;
663	FNIEMAIMPLSHIFTU32 iemAImpl_shr_u32;
664	FNIEMAIMPLSHIFTU32 iemAImpl_sar_u32;
665	/** @} */
666
667	/** @name Shift operations on words (Group 2).
668	* @{ */
669	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU64,(uint64_t pu64Dst, uint8_t cShift, uint32_t pEFlags));
670	typedef FNIEMAIMPLSHIFTU64 *PFNIEMAIMPLSHIFTU64;
671	FNIEMAIMPLSHIFTU64 iemAImpl_rol_u64;
672	FNIEMAIMPLSHIFTU64 iemAImpl_ror_u64;
673	FNIEMAIMPLSHIFTU64 iemAImpl_rcl_u64;
674	FNIEMAIMPLSHIFTU64 iemAImpl_rcr_u64;
675	FNIEMAIMPLSHIFTU64 iemAImpl_shl_u64;
676	FNIEMAIMPLSHIFTU64 iemAImpl_shr_u64;
677	FNIEMAIMPLSHIFTU64 iemAImpl_sar_u64;
678	/** @} */
679
680	/** @name Multiplication and division operations.
681	* @{ */
682	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU8,(uint16_t pu16AX, uint8_t u8FactorDivisor, uint32_t pEFlags));
683	typedef FNIEMAIMPLMULDIVU8 *PFNIEMAIMPLMULDIVU8;
684	FNIEMAIMPLMULDIVU8 iemAImpl_mul_u8, iemAImpl_imul_u8;
685	FNIEMAIMPLMULDIVU8 iemAImpl_div_u8, iemAImpl_idiv_u8;
686
687	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU16,(uint16_t pu16AX, uint16_t pu16DX, uint16_t u16FactorDivisor, uint32_t *pEFlags));
688	typedef FNIEMAIMPLMULDIVU16 *PFNIEMAIMPLMULDIVU16;
689	FNIEMAIMPLMULDIVU16 iemAImpl_mul_u16, iemAImpl_imul_u16;
690	FNIEMAIMPLMULDIVU16 iemAImpl_div_u16, iemAImpl_idiv_u16;
691
692	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU32,(uint32_t pu32EAX, uint32_t pu32EDX, uint32_t u32FactorDivisor, uint32_t *pEFlags));
693	typedef FNIEMAIMPLMULDIVU32 *PFNIEMAIMPLMULDIVU32;
694	FNIEMAIMPLMULDIVU32 iemAImpl_mul_u32, iemAImpl_imul_u32;
695	FNIEMAIMPLMULDIVU32 iemAImpl_div_u32, iemAImpl_idiv_u32;
696
697	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU64,(uint64_t pu64RAX, uint64_t pu64RDX, uint64_t u64FactorDivisor, uint32_t *pEFlags));
698	typedef FNIEMAIMPLMULDIVU64 *PFNIEMAIMPLMULDIVU64;
699	FNIEMAIMPLMULDIVU64 iemAImpl_mul_u64, iemAImpl_imul_u64;
700	FNIEMAIMPLMULDIVU64 iemAImpl_div_u64, iemAImpl_idiv_u64;
701	/** @} */
702
703	/** @name Byte Swap.
704	* @{ */
705	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u16,(uint32_t pu32Dst)); / Yes, 32-bit register access. */
706	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u32,(uint32_t *pu32Dst));
707	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u64,(uint64_t *pu64Dst));
708	/** @} */
709
710
711	/** @name FPU operations taking a 32-bit float argument
712	* @{ */
713	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, RTFLOAT32U r32Val));
714	typedef FNIEMAIMPLFPUR32 *PFNIEMAIMPLFPUR32;
715	FNIEMAIMPLFPUR32 iemAImpl_fpu_r32_to_r80;
716	/** @} */
717
718	/** @name FPU operations taking a 64-bit float argument
719	* @{ */
720	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
721	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
722	typedef FNIEMAIMPLFPUR64 *PFNIEMAIMPLFPUR64;
723	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR64U,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT64U pr64Val));
724	typedef FNIEMAIMPLFPUR64U *PFNIEMAIMPLFPUR64U;
725	FNIEMAIMPLFPUR64U iemAImpl_fpu_r64_to_r80;
726	FNIEMAIMPLFPUR64 iemAImpl_fadd_r80_by_r64;
727	FNIEMAIMPLFPUR64 iemAImpl_fmul_r80_by_r64;
728	FNIEMAIMPLFPUR64 iemAImpl_fcom_r80_by_r64;
729	FNIEMAIMPLFPUR64 iemAImpl_fsub_r80_by_r64;
730	FNIEMAIMPLFPUR64 iemAImpl_fsubr_r80_by_r64;
731	FNIEMAIMPLFPUR64 iemAImpl_fdiv_r80_by_r64;
732	FNIEMAIMPLFPUR64 iemAImpl_fdivr_r80_by_r64;
733
734	/** @} */
735
736	/** @name FPU operations taking a 80-bit float argument
737	* @{ */
738	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
739	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
740	typedef FNIEMAIMPLFPUR80 *PFNIEMAIMPLFPUR80;
741	FNIEMAIMPLFPUR80 iemAImpl_fadd_r80_by_r80;
742	FNIEMAIMPLFPUR80 iemAImpl_fmul_r80_by_r80;
743	FNIEMAIMPLFPUR80 iemAImpl_fcom_r80_by_r80;
744	FNIEMAIMPLFPUR80 iemAImpl_fsub_r80_by_r80;
745	FNIEMAIMPLFPUR80 iemAImpl_fsubr_r80_by_r80;
746	FNIEMAIMPLFPUR80 iemAImpl_fdiv_r80_by_r80;
747	FNIEMAIMPLFPUR80 iemAImpl_fdivr_r80_by_r80;
748
749	/** @} */
750
751
752	/** @name Function tables.
753	* @{
754	*/
755
756	/**
757	* Function table for a binary operator providing implementation based on
758	* operand size.
759	*/
760	typedef struct IEMOPBINSIZES
761	{
762	PFNIEMAIMPLBINU8 pfnNormalU8, pfnLockedU8;
763	PFNIEMAIMPLBINU16 pfnNormalU16, pfnLockedU16;
764	PFNIEMAIMPLBINU32 pfnNormalU32, pfnLockedU32;
765	PFNIEMAIMPLBINU64 pfnNormalU64, pfnLockedU64;
766	} IEMOPBINSIZES;
767	/** Pointer to a binary operator function table. */
768	typedef IEMOPBINSIZES const *PCIEMOPBINSIZES;
769
770
771	/**
772	* Function table for a unary operator providing implementation based on
773	* operand size.
774	*/
775	typedef struct IEMOPUNARYSIZES
776	{
777	PFNIEMAIMPLUNARYU8 pfnNormalU8, pfnLockedU8;
778	PFNIEMAIMPLUNARYU16 pfnNormalU16, pfnLockedU16;
779	PFNIEMAIMPLUNARYU32 pfnNormalU32, pfnLockedU32;
780	PFNIEMAIMPLUNARYU64 pfnNormalU64, pfnLockedU64;
781	} IEMOPUNARYSIZES;
782	/** Pointer to a unary operator function table. */
783	typedef IEMOPUNARYSIZES const *PCIEMOPUNARYSIZES;
784
785
786	/**
787	* Function table for a shift operator providing implementation based on
788	* operand size.
789	*/
790	typedef struct IEMOPSHIFTSIZES
791	{
792	PFNIEMAIMPLSHIFTU8 pfnNormalU8;
793	PFNIEMAIMPLSHIFTU16 pfnNormalU16;
794	PFNIEMAIMPLSHIFTU32 pfnNormalU32;
795	PFNIEMAIMPLSHIFTU64 pfnNormalU64;
796	} IEMOPSHIFTSIZES;
797	/** Pointer to a shift operator function table. */
798	typedef IEMOPSHIFTSIZES const *PCIEMOPSHIFTSIZES;
799
800
801	/**
802	* Function table for a multiplication or division operation.
803	*/
804	typedef struct IEMOPMULDIVSIZES
805	{
806	PFNIEMAIMPLMULDIVU8 pfnU8;
807	PFNIEMAIMPLMULDIVU16 pfnU16;
808	PFNIEMAIMPLMULDIVU32 pfnU32;
809	PFNIEMAIMPLMULDIVU64 pfnU64;
810	} IEMOPMULDIVSIZES;
811	/** Pointer to a multiplication or division operation function table. */
812	typedef IEMOPMULDIVSIZES const *PCIEMOPMULDIVSIZES;
813
814
815	/**
816	* Function table for a double precision shift operator providing implementation
817	* based on operand size.
818	*/
819	typedef struct IEMOPSHIFTDBLSIZES
820	{
821	PFNIEMAIMPLSHIFTDBLU16 pfnNormalU16;
822	PFNIEMAIMPLSHIFTDBLU32 pfnNormalU32;
823	PFNIEMAIMPLSHIFTDBLU64 pfnNormalU64;
824	} IEMOPSHIFTDBLSIZES;
825	/** Pointer to a double precision shift function table. */
826	typedef IEMOPSHIFTDBLSIZES const *PCIEMOPSHIFTDBLSIZES;
827
828
829	/** @} */
830
831
832	/** @name C instruction implementations for anything slightly complicated.
833	* @{ */
834
835	/**
836	* For typedef'ing or declaring a C instruction implementation function taking
837	* no extra arguments.
838	*
839	* @param a_Name The name of the type.
840	*/
841	# define IEM_CIMPL_DECL_TYPE_0(a_Name) \
842	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
843	/**
844	* For defining a C instruction implementation function taking no extra
845	* arguments.
846	*
847	* @param a_Name The name of the function
848	*/
849	# define IEM_CIMPL_DEF_0(a_Name) \
850	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
851	/**
852	* For calling a C instruction implementation function taking no extra
853	* arguments.
854	*
855	* This special call macro adds default arguments to the call and allow us to
856	* change these later.
857	*
858	* @param a_fn The name of the function.
859	*/
860	# define IEM_CIMPL_CALL_0(a_fn) a_fn(pIemCpu, cbInstr)
861
862	/**
863	* For typedef'ing or declaring a C instruction implementation function taking
864	* one extra argument.
865	*
866	* @param a_Name The name of the type.
867	* @param a_Type0 The argument type.
868	* @param a_Arg0 The argument name.
869	*/
870	# define IEM_CIMPL_DECL_TYPE_1(a_Name, a_Type0, a_Arg0) \
871	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
872	/**
873	* For defining a C instruction implementation function taking one extra
874	* argument.
875	*
876	* @param a_Name The name of the function
877	* @param a_Type0 The argument type.
878	* @param a_Arg0 The argument name.
879	*/
880	# define IEM_CIMPL_DEF_1(a_Name, a_Type0, a_Arg0) \
881	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
882	/**
883	* For calling a C instruction implementation function taking one extra
884	* argument.
885	*
886	* This special call macro adds default arguments to the call and allow us to
887	* change these later.
888	*
889	* @param a_fn The name of the function.
890	* @param a0 The name of the 1st argument.
891	*/
892	# define IEM_CIMPL_CALL_1(a_fn, a0) a_fn(pIemCpu, cbInstr, (a0))
893
894	/**
895	* For typedef'ing or declaring a C instruction implementation function taking
896	* two extra arguments.
897	*
898	* @param a_Name The name of the type.
899	* @param a_Type0 The type of the 1st argument
900	* @param a_Arg0 The name of the 1st argument.
901	* @param a_Type1 The type of the 2nd argument.
902	* @param a_Arg1 The name of the 2nd argument.
903	*/
904	# define IEM_CIMPL_DECL_TYPE_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
905	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
906	/**
907	* For defining a C instruction implementation function taking two extra
908	* arguments.
909	*
910	* @param a_Name The name of the function.
911	* @param a_Type0 The type of the 1st argument
912	* @param a_Arg0 The name of the 1st argument.
913	* @param a_Type1 The type of the 2nd argument.
914	* @param a_Arg1 The name of the 2nd argument.
915	*/
916	# define IEM_CIMPL_DEF_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
917	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
918	/**
919	* For calling a C instruction implementation function taking two extra
920	* arguments.
921	*
922	* This special call macro adds default arguments to the call and allow us to
923	* change these later.
924	*
925	* @param a_fn The name of the function.
926	* @param a0 The name of the 1st argument.
927	* @param a1 The name of the 2nd argument.
928	*/
929	# define IEM_CIMPL_CALL_2(a_fn, a0, a1) a_fn(pIemCpu, cbInstr, (a0), (a1))
930
931	/**
932	* For typedef'ing or declaring a C instruction implementation function taking
933	* three extra arguments.
934	*
935	* @param a_Name The name of the type.
936	* @param a_Type0 The type of the 1st argument
937	* @param a_Arg0 The name of the 1st argument.
938	* @param a_Type1 The type of the 2nd argument.
939	* @param a_Arg1 The name of the 2nd argument.
940	* @param a_Type2 The type of the 3rd argument.
941	* @param a_Arg2 The name of the 3rd argument.
942	*/
943	# define IEM_CIMPL_DECL_TYPE_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
944	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
945	/**
946	* For defining a C instruction implementation function taking three extra
947	* arguments.
948	*
949	* @param a_Name The name of the function.
950	* @param a_Type0 The type of the 1st argument
951	* @param a_Arg0 The name of the 1st argument.
952	* @param a_Type1 The type of the 2nd argument.
953	* @param a_Arg1 The name of the 2nd argument.
954	* @param a_Type2 The type of the 3rd argument.
955	* @param a_Arg2 The name of the 3rd argument.
956	*/
957	# define IEM_CIMPL_DEF_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
958	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
959	/**
960	* For calling a C instruction implementation function taking three extra
961	* arguments.
962	*
963	* This special call macro adds default arguments to the call and allow us to
964	* change these later.
965	*
966	* @param a_fn The name of the function.
967	* @param a0 The name of the 1st argument.
968	* @param a1 The name of the 2nd argument.
969	* @param a2 The name of the 3rd argument.
970	*/
971	# define IEM_CIMPL_CALL_3(a_fn, a0, a1, a2) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2))
972
973
974	/**
975	* For typedef'ing or declaring a C instruction implementation function taking
976	* four extra arguments.
977	*
978	* @param a_Name The name of the type.
979	* @param a_Type0 The type of the 1st argument
980	* @param a_Arg0 The name of the 1st argument.
981	* @param a_Type1 The type of the 2nd argument.
982	* @param a_Arg1 The name of the 2nd argument.
983	* @param a_Type2 The type of the 3rd argument.
984	* @param a_Arg2 The name of the 3rd argument.
985	* @param a_Type3 The type of the 4th argument.
986	* @param a_Arg3 The name of the 4th argument.
987	*/
988	# define IEM_CIMPL_DECL_TYPE_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
989	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, a_Type3 a_Arg3))
990	/**
991	* For defining a C instruction implementation function taking four extra
992	* arguments.
993	*
994	* @param a_Name The name of the function.
995	* @param a_Type0 The type of the 1st argument
996	* @param a_Arg0 The name of the 1st argument.
997	* @param a_Type1 The type of the 2nd argument.
998	* @param a_Arg1 The name of the 2nd argument.
999	* @param a_Type2 The type of the 3rd argument.
1000	* @param a_Arg2 The name of the 3rd argument.
1001	* @param a_Type3 The type of the 4th argument.
1002	* @param a_Arg3 The name of the 4th argument.
1003	*/
1004	# define IEM_CIMPL_DEF_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, aArg3) \
1005	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, a_Type3 a_Arg3))
1006	/**
1007	* For calling a C instruction implementation function taking four extra
1008	* arguments.
1009	*
1010	* This special call macro adds default arguments to the call and allow us to
1011	* change these later.
1012	*
1013	* @param a_fn The name of the function.
1014	* @param a0 The name of the 1st argument.
1015	* @param a1 The name of the 2nd argument.
1016	* @param a2 The name of the 3rd argument.
1017	* @param a3 The name of the 4th argument.
1018	*/
1019	# define IEM_CIMPL_CALL_4(a_fn, a0, a1, a2, a3) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3))
1020
1021
1022	/**
1023	* For typedef'ing or declaring a C instruction implementation function taking
1024	* five extra arguments.
1025	*
1026	* @param a_Name The name of the type.
1027	* @param a_Type0 The type of the 1st argument
1028	* @param a_Arg0 The name of the 1st argument.
1029	* @param a_Type1 The type of the 2nd argument.
1030	* @param a_Arg1 The name of the 2nd argument.
1031	* @param a_Type2 The type of the 3rd argument.
1032	* @param a_Arg2 The name of the 3rd argument.
1033	* @param a_Type3 The type of the 4th argument.
1034	* @param a_Arg3 The name of the 4th argument.
1035	* @param a_Type4 The type of the 5th argument.
1036	* @param a_Arg4 The name of the 5th argument.
1037	*/
1038	# define IEM_CIMPL_DECL_TYPE_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1039	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1040	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1041	a_Type3 a_Arg3, a_Type4 a_Arg4))
1042	/**
1043	* For defining a C instruction implementation function taking five extra
1044	* arguments.
1045	*
1046	* @param a_Name The name of the function.
1047	* @param a_Type0 The type of the 1st argument
1048	* @param a_Arg0 The name of the 1st argument.
1049	* @param a_Type1 The type of the 2nd argument.
1050	* @param a_Arg1 The name of the 2nd argument.
1051	* @param a_Type2 The type of the 3rd argument.
1052	* @param a_Arg2 The name of the 3rd argument.
1053	* @param a_Type3 The type of the 4th argument.
1054	* @param a_Arg3 The name of the 4th argument.
1055	* @param a_Type4 The type of the 5th argument.
1056	* @param a_Arg4 The name of the 5th argument.
1057	*/
1058	# define IEM_CIMPL_DEF_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1059	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1060	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1061	a_Type3 a_Arg3, a_Type4 a_Arg4))
1062	/**
1063	* For calling a C instruction implementation function taking five extra
1064	* arguments.
1065	*
1066	* This special call macro adds default arguments to the call and allow us to
1067	* change these later.
1068	*
1069	* @param a_fn The name of the function.
1070	* @param a0 The name of the 1st argument.
1071	* @param a1 The name of the 2nd argument.
1072	* @param a2 The name of the 3rd argument.
1073	* @param a3 The name of the 4th argument.
1074	* @param a4 The name of the 5th argument.
1075	*/
1076	# define IEM_CIMPL_CALL_5(a_fn, a0, a1, a2, a3, a4) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3), (a4))
1077
1078	/** @} */
1079
1080
1081	/** @} */
1082
1083	RT_C_DECLS_END
1084
1085	#endif
1086

Note: See TracBrowser for help on using the repository browser.

source: vbox/trunk/src/VBox/VMM/include/IEMInternal.h@ 40164

Download in other formats: