VMM.cpp@ 90997

Last change on this file since 90997 was 90997, checked in by vboxsync, 4 years ago
VMM,PDM,PGM: Restrict the VMSetError and VMSetRuntimeError APIs to ring-3, these never worked properly in ring-0 or raw-mode. A PAEmode runtime error was the only place any of these were used, but given that the VMSetRuntimeError codepath starts with an assertion, it can't have been used/tested. The PAEmode runtime error shouldn't necessarily be triggered by PGM anyway, but IEM. Removed VMMCALLRING3_VM_SET_ERROR and VMMCALLRING3_VM_SET_RUNTIME_ERROR. bugref:10093
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File size: 110.3 KB

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1	/* $Id: VMM.cpp 90997 2021-08-30 14:04:48Z vboxsync $ */
2	/** @file
3	* VMM - The Virtual Machine Monitor Core.
4	*/
5
6	/*
7	* Copyright (C) 2006-2020 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.215389.xyz. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	//#define NO_SUPCALLR0VMM
19
20	/** @page pg_vmm VMM - The Virtual Machine Monitor
21	*
22	* The VMM component is two things at the moment, it's a component doing a few
23	* management and routing tasks, and it's the whole virtual machine monitor
24	* thing. For hysterical reasons, it is not doing all the management that one
25	* would expect, this is instead done by @ref pg_vm. We'll address this
26	* misdesign eventually, maybe.
27	*
28	* VMM is made up of these components:
29	* - @subpage pg_cfgm
30	* - @subpage pg_cpum
31	* - @subpage pg_dbgf
32	* - @subpage pg_em
33	* - @subpage pg_gim
34	* - @subpage pg_gmm
35	* - @subpage pg_gvmm
36	* - @subpage pg_hm
37	* - @subpage pg_iem
38	* - @subpage pg_iom
39	* - @subpage pg_mm
40	* - @subpage pg_nem
41	* - @subpage pg_pdm
42	* - @subpage pg_pgm
43	* - @subpage pg_selm
44	* - @subpage pg_ssm
45	* - @subpage pg_stam
46	* - @subpage pg_tm
47	* - @subpage pg_trpm
48	* - @subpage pg_vm
49	*
50	*
51	* @see @ref grp_vmm @ref grp_vm @subpage pg_vmm_guideline @subpage pg_raw
52	*
53	*
54	* @section sec_vmmstate VMM State
55	*
56	* @image html VM_Statechart_Diagram.gif
57	*
58	* To be written.
59	*
60	*
61	* @subsection subsec_vmm_init VMM Initialization
62	*
63	* To be written.
64	*
65	*
66	* @subsection subsec_vmm_term VMM Termination
67	*
68	* To be written.
69	*
70	*
71	* @section sec_vmm_limits VMM Limits
72	*
73	* There are various resource limits imposed by the VMM and it's
74	* sub-components. We'll list some of them here.
75	*
76	* On 64-bit hosts:
77	* - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
78	* can be increased up to 64K - 1.
79	* - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
80	* ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
81	* - A VM can be assigned all the memory we can use (16TB), however, the
82	* Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
83	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
84	*
85	* On 32-bit hosts:
86	* - Max 127 VMs. Imposed by GMM's per page structure.
87	* - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
88	* ROM pages. The limit is imposed by the 28-bit page ID used
89	* internally in GMM. It is also limited by PAE.
90	* - A VM can be assigned all the memory GMM can allocate, however, the
91	* Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
92	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
93	*
94	*/
95
96
97	/*********************************************************************************************************************************
98	* Header Files *
99	*********************************************************************************************************************************/
100	#define LOG_GROUP LOG_GROUP_VMM
101	#include <VBox/vmm/vmm.h>
102	#include <VBox/vmm/vmapi.h>
103	#include <VBox/vmm/pgm.h>
104	#include <VBox/vmm/cfgm.h>
105	#include <VBox/vmm/pdmqueue.h>
106	#include <VBox/vmm/pdmcritsect.h>
107	#include <VBox/vmm/pdmcritsectrw.h>
108	#include <VBox/vmm/pdmapi.h>
109	#include <VBox/vmm/cpum.h>
110	#include <VBox/vmm/gim.h>
111	#include <VBox/vmm/mm.h>
112	#include <VBox/vmm/nem.h>
113	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
114	# include <VBox/vmm/iem.h>
115	#endif
116	#include <VBox/vmm/iom.h>
117	#include <VBox/vmm/trpm.h>
118	#include <VBox/vmm/selm.h>
119	#include <VBox/vmm/em.h>
120	#include <VBox/sup.h>
121	#include <VBox/vmm/dbgf.h>
122	#include <VBox/vmm/apic.h>
123	#include <VBox/vmm/ssm.h>
124	#include <VBox/vmm/tm.h>
125	#include "VMMInternal.h"
126	#include <VBox/vmm/vmcc.h>
127
128	#include <VBox/err.h>
129	#include <VBox/param.h>
130	#include <VBox/version.h>
131	#include <VBox/vmm/hm.h>
132	#include <iprt/assert.h>
133	#include <iprt/alloc.h>
134	#include <iprt/asm.h>
135	#include <iprt/time.h>
136	#include <iprt/semaphore.h>
137	#include <iprt/stream.h>
138	#include <iprt/string.h>
139	#include <iprt/stdarg.h>
140	#include <iprt/ctype.h>
141	#include <iprt/x86.h>
142
143
144	/*********************************************************************************************************************************
145	* Defined Constants And Macros *
146	*********************************************************************************************************************************/
147	/** The saved state version. */
148	#define VMM_SAVED_STATE_VERSION 4
149	/** The saved state version used by v3.0 and earlier. (Teleportation) */
150	#define VMM_SAVED_STATE_VERSION_3_0 3
151
152	/** Macro for flushing the ring-0 logging. */
153	#define VMM_FLUSH_R0_LOG(a_pVM, a_pVCpu, a_pLogger, a_pR3Logger) \
154	do { \
155	size_t const idxBuf = (a_pLogger)->idxBuf % VMMLOGGER_BUFFER_COUNT; \
156	if ( (a_pLogger)->aBufs[idxBuf].AuxDesc.offBuf == 0 \
157	\|\| (a_pLogger)->aBufs[idxBuf].AuxDesc.fFlushedIndicator) \
158	{ /* likely? */ } \
159	else \
160	vmmR3LogReturnFlush(a_pVM, a_pVCpu, a_pLogger, idxBuf, a_pR3Logger); \
161	} while (0)
162
163
164	/*********************************************************************************************************************************
165	* Internal Functions *
166	*********************************************************************************************************************************/
167	static int vmmR3InitStacks(PVM pVM);
168	static void vmmR3InitRegisterStats(PVM pVM);
169	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
170	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
171	#if 0 /* pointless when timers doesn't run on EMT */
172	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, TMTIMERHANDLE hTimer, void *pvUser);
173	#endif
174	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
175	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser);
176	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
177	static FNRTTHREAD vmmR3LogFlusher;
178	static void vmmR3LogReturnFlush(PVM pVM, PVMCPU pVCpu, PVMMR3CPULOGGER pShared, size_t idxBuf,
179	PRTLOGGER pDstLogger);
180	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
181
182
183
184	/**
185	* Initializes the VMM.
186	*
187	* @returns VBox status code.
188	* @param pVM The cross context VM structure.
189	*/
190	VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
191	{
192	LogFlow(("VMMR3Init\n"));
193
194	/*
195	* Assert alignment, sizes and order.
196	*/
197	AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
198	AssertCompile(RT_SIZEOFMEMB(VMCPU, vmm.s) <= RT_SIZEOFMEMB(VMCPU, vmm.padding));
199
200	/*
201	* Init basic VM VMM members.
202	*/
203	pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
204	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
205	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
206	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
207	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
208	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
209	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
210	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
211	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
212	pVM->vmm.s.nsProgramStart = RTTimeProgramStartNanoTS();
213
214	#if 0 /* pointless when timers doesn't run on EMT */
215	/** @cfgm{/YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
216	* The EMT yield interval. The EMT yielding is a hack we employ to play a
217	* bit nicer with the rest of the system (like for instance the GUI).
218	*/
219	int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
220	23 /* Value arrived at after experimenting with the grub boot prompt. */);
221	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
222	#endif
223
224	/** @cfgm{/VMM/UsePeriodicPreemptionTimers, boolean, true}
225	* Controls whether we employ per-cpu preemption timers to limit the time
226	* spent executing guest code. This option is not available on all
227	* platforms and we will silently ignore this setting then. If we are
228	* running in VT-x mode, we will use the VMX-preemption timer instead of
229	* this one when possible.
230	*/
231	PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
232	int rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
233	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
234
235	/*
236	* Initialize the VMM rendezvous semaphores.
237	*/
238	pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
239	if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
240	return VERR_NO_MEMORY;
241	for (VMCPUID i = 0; i < pVM->cCpus; i++)
242	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
243	for (VMCPUID i = 0; i < pVM->cCpus; i++)
244	{
245	rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
246	AssertRCReturn(rc, rc);
247	}
248	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
249	AssertRCReturn(rc, rc);
250	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
251	AssertRCReturn(rc, rc);
252	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
253	AssertRCReturn(rc, rc);
254	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
255	AssertRCReturn(rc, rc);
256	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPush);
257	AssertRCReturn(rc, rc);
258	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPop);
259	AssertRCReturn(rc, rc);
260	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
261	AssertRCReturn(rc, rc);
262	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
263	AssertRCReturn(rc, rc);
264
265	/*
266	* Register the saved state data unit.
267	*/
268	rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
269	NULL, NULL, NULL,
270	NULL, vmmR3Save, NULL,
271	NULL, vmmR3Load, NULL);
272	if (RT_FAILURE(rc))
273	return rc;
274
275	/*
276	* Register the Ring-0 VM handle with the session for fast ioctl calls.
277	*/
278	rc = SUPR3SetVMForFastIOCtl(VMCC_GET_VMR0_FOR_CALL(pVM));
279	if (RT_FAILURE(rc))
280	return rc;
281
282	/*
283	* Init various sub-components.
284	*/
285	rc = vmmR3InitStacks(pVM);
286	if (RT_SUCCESS(rc))
287	{
288	#ifdef VBOX_WITH_NMI
289	/*
290	* Allocate mapping for the host APIC.
291	*/
292	rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
293	AssertRC(rc);
294	#endif
295	if (RT_SUCCESS(rc))
296	{
297	/*
298	* Start the log flusher thread.
299	*/
300	rc = RTThreadCreate(&pVM->vmm.s.hLogFlusherThread, vmmR3LogFlusher, pVM, 0 /cbStack/,
301	RTTHREADTYPE_IO, RTTHREADFLAGS_WAITABLE, "R0LogWrk");
302	if (RT_SUCCESS(rc))
303	{
304
305	/*
306	* Debug info and statistics.
307	*/
308	DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
309	vmmR3InitRegisterStats(pVM);
310	vmmInitFormatTypes();
311
312	return VINF_SUCCESS;
313	}
314	}
315	}
316	/** @todo Need failure cleanup? */
317
318	return rc;
319	}
320
321
322	/**
323	* Allocate & setup the VMM RC stack(s) (for EMTs).
324	*
325	* The stacks are also used for long jumps in Ring-0.
326	*
327	* @returns VBox status code.
328	* @param pVM The cross context VM structure.
329	*
330	* @remarks The optional guard page gets it protection setup up during R3 init
331	* completion because of init order issues.
332	*/
333	static int vmmR3InitStacks(PVM pVM)
334	{
335	int rc = VINF_SUCCESS;
336	#ifdef VMM_R0_SWITCH_STACK
337	uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
338	#else
339	uint32_t fFlags = 0;
340	#endif
341
342	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
343	{
344	PVMCPU pVCpu = pVM->apCpusR3[idCpu];
345
346	#ifdef VBOX_STRICT_VMM_STACK
347	rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
348	#else
349	rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
350	#endif
351	PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
352	if (RT_SUCCESS(rc))
353	{
354	#ifdef VBOX_STRICT_VMM_STACK
355	pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
356	#endif
357	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
358
359	}
360	}
361
362	return rc;
363	}
364
365
366	/**
367	* VMMR3Init worker that register the statistics with STAM.
368	*
369	* @param pVM The cross context VM structure.
370	*/
371	static void vmmR3InitRegisterStats(PVM pVM)
372	{
373	RT_NOREF_PV(pVM);
374
375	/*
376	* Statistics.
377	*/
378	STAM_REG(pVM, &pVM->vmm.s.StatRunGC, STAMTYPE_COUNTER, "/VMM/RunGC", STAMUNIT_OCCURENCES, "Number of context switches.");
379	STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
380	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
381	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
382	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
383	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
384	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
385	STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
386	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
387	STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
388	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
389	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
390	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
391	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_COMMIT_WRITE returns.");
392	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
393	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
394	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_COMMIT_WRITE returns.");
395	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
396	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
397	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
398	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRRead, STAMTYPE_COUNTER, "/VMM/RZRet/MSRRead", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_READ returns.");
399	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MSRWrite", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_WRITE returns.");
400	STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
401	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
402	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
403	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
404	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
405	STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
406	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
407	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
408	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
409	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
410	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
411	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
412	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Total, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
413	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns without responsible force flag.");
414	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3FF, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TO_R3.");
415	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_TM_VIRTUAL_SYNC.");
416	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PGM_NEED_HANDY_PAGES.");
417	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_QUEUES.");
418	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_EMT_RENDEZVOUS.");
419	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TIMER.");
420	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_DMA.");
421	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_PDM_CRITSECT.");
422	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iem, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IEM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IEM.");
423	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iom, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IOM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IOM.");
424	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
425	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
426	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
427	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
428	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
429	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
430	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
431	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
432	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
433	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
434	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
435	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
436
437	STAMR3Register(pVM, &pVM->vmm.s.StatLogFlusherFlushes, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, "/VMM/LogFlush/00-Flushes", STAMUNIT_OCCURENCES, "Total number of buffer flushes");
438	STAMR3Register(pVM, &pVM->vmm.s.StatLogFlusherNoWakeUp, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, "/VMM/LogFlush/00-NoWakups", STAMUNIT_OCCURENCES, "Times the flusher thread didn't need waking up.");
439
440	#ifdef VBOX_WITH_STATISTICS
441	for (VMCPUID i = 0; i < pVM->cCpus; i++)
442	{
443	PVMCPU pVCpu = pVM->apCpusR3[i];
444	STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
445	STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
446	STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
447	}
448	#endif
449	for (VMCPUID i = 0; i < pVM->cCpus; i++)
450	{
451	PVMCPU pVCpu = pVM->apCpusR3[i];
452	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlock, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlock", i);
453	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOnTime, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOnTime", i);
454	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOverslept, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOverslept", i);
455	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockInsomnia, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockInsomnia", i);
456	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExec, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec", i);
457	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromSpin", i);
458	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromBlock, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromBlock", i);
459	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3", i);
460	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3FromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/FromSpin", i);
461	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3Other, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/Other", i);
462	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PendingFF, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PendingFF", i);
463	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3SmallDelta, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/SmallDelta", i);
464	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PostNoInt, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PostWaitNoInt", i);
465	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PostPendingFF,STAMTYPE_COUNTER,STAMVISIBILITY_ALWAYS,STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PostWaitPendingFF", i);
466	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0Halts, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryCounter", i);
467	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsSucceeded, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistorySucceeded", i);
468	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsToRing3, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryToRing3", i);
469
470	STAMR3RegisterF(pVM, &pVCpu->cEmtHashCollisions, STAMTYPE_U8, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/VMM/EmtHashCollisions/Emt%02u", i);
471
472	PVMMR3CPULOGGER pShared = &pVCpu->vmm.s.u.s.Logger;
473	STAMR3RegisterF(pVM, &pShared->StatFlushes, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Reg", i);
474	STAMR3RegisterF(pVM, &pShared->StatCannotBlock, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Reg/CannotBlock", i);
475	STAMR3RegisterF(pVM, &pShared->StatWait, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Reg/Wait", i);
476	STAMR3RegisterF(pVM, &pShared->StatRaces, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Reg/Races", i);
477	STAMR3RegisterF(pVM, &pShared->StatRacesToR0, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Reg/RacesToR0", i);
478	STAMR3RegisterF(pVM, &pShared->cbDropped, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Reg/cbDropped", i);
479	STAMR3RegisterF(pVM, &pShared->cbBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Reg/cbBuf", i);
480	STAMR3RegisterF(pVM, &pShared->idxBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Reg/idxBuf", i);
481
482	pShared = &pVCpu->vmm.s.u.s.RelLogger;
483	STAMR3RegisterF(pVM, &pShared->StatFlushes, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Rel", i);
484	STAMR3RegisterF(pVM, &pShared->StatCannotBlock, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Rel/CannotBlock", i);
485	STAMR3RegisterF(pVM, &pShared->StatWait, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Rel/Wait", i);
486	STAMR3RegisterF(pVM, &pShared->StatRaces, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Rel/Races", i);
487	STAMR3RegisterF(pVM, &pShared->StatRacesToR0, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Rel/RacesToR0", i);
488	STAMR3RegisterF(pVM, &pShared->cbDropped, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Rel/cbDropped", i);
489	STAMR3RegisterF(pVM, &pShared->cbBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Rel/cbBuf", i);
490	STAMR3RegisterF(pVM, &pShared->idxBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Rel/idxBuf", i);
491	}
492	}
493
494
495	/**
496	* Worker for VMMR3InitR0 that calls ring-0 to do EMT specific initialization.
497	*
498	* @returns VBox status code.
499	* @param pVM The cross context VM structure.
500	* @param pVCpu The cross context per CPU structure.
501	* @thread EMT(pVCpu)
502	*/
503	static DECLCALLBACK(int) vmmR3InitR0Emt(PVM pVM, PVMCPU pVCpu)
504	{
505	return VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_INIT_EMT, 0, NULL);
506	}
507
508
509	/**
510	* Initializes the R0 VMM.
511	*
512	* @returns VBox status code.
513	* @param pVM The cross context VM structure.
514	*/
515	VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
516	{
517	int rc;
518	PVMCPU pVCpu = VMMGetCpu(pVM);
519	Assert(pVCpu && pVCpu->idCpu == 0);
520
521	/*
522	* Make sure the ring-0 loggers are up to date.
523	*/
524	rc = VMMR3UpdateLoggers(pVM);
525	if (RT_FAILURE(rc))
526	return rc;
527
528	/*
529	* Call Ring-0 entry with init code.
530	*/
531	for (;;)
532	{
533	#ifdef NO_SUPCALLR0VMM
534	//rc = VERR_GENERAL_FAILURE;
535	rc = VINF_SUCCESS;
536	#else
537	rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /idCpu/, VMMR0_DO_VMMR0_INIT, RT_MAKE_U64(VMMGetSvnRev(), vmmGetBuildType()), NULL);
538	#endif
539	/*
540	* Flush the logs.
541	*/
542	#ifdef LOG_ENABLED
543	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
544	#endif
545	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
546	if (rc != VINF_VMM_CALL_HOST)
547	break;
548	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
549	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
550	break;
551	/* Resume R0 */
552	}
553
554	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
555	{
556	LogRel(("VMM: R0 init failed, rc=%Rra\n", rc));
557	if (RT_SUCCESS(rc))
558	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
559	}
560
561	/* Log whether thread-context hooks are used (on Linux this can depend on how the kernel is configured). */
562	if (pVM->vmm.s.fIsUsingContextHooks)
563	LogRel(("VMM: Enabled thread-context hooks\n"));
564	else
565	LogRel(("VMM: Thread-context hooks unavailable\n"));
566
567	/* Log RTThreadPreemptIsPendingTrusty() and RTThreadPreemptIsPossible() results. */
568	if (pVM->vmm.s.fIsPreemptPendingApiTrusty)
569	LogRel(("VMM: RTThreadPreemptIsPending() can be trusted\n"));
570	else
571	LogRel(("VMM: Warning! RTThreadPreemptIsPending() cannot be trusted! Need to update kernel info?\n"));
572	if (pVM->vmm.s.fIsPreemptPossible)
573	LogRel(("VMM: Kernel preemption is possible\n"));
574	else
575	LogRel(("VMM: Kernel preemption is not possible it seems\n"));
576
577	/*
578	* Send all EMTs to ring-0 to get their logger initialized.
579	*/
580	for (VMCPUID idCpu = 0; RT_SUCCESS(rc) && idCpu < pVM->cCpus; idCpu++)
581	rc = VMR3ReqCallWait(pVM, idCpu, (PFNRT)vmmR3InitR0Emt, 2, pVM, pVM->apCpusR3[idCpu]);
582
583	return rc;
584	}
585
586
587	/**
588	* Called when an init phase completes.
589	*
590	* @returns VBox status code.
591	* @param pVM The cross context VM structure.
592	* @param enmWhat Which init phase.
593	*/
594	VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
595	{
596	int rc = VINF_SUCCESS;
597
598	switch (enmWhat)
599	{
600	case VMINITCOMPLETED_RING3:
601	{
602	#if 0 /* pointless when timers doesn't run on EMT */
603	/*
604	* Create the EMT yield timer.
605	*/
606	rc = TMR3TimerCreate(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, TMTIMER_FLAGS_NO_RING0,
607	"EMT Yielder", &pVM->vmm.s.hYieldTimer);
608	AssertRCReturn(rc, rc);
609
610	rc = TMTimerSetMillies(pVM, pVM->vmm.s.hYieldTimer, pVM->vmm.s.cYieldEveryMillies);
611	AssertRCReturn(rc, rc);
612	#endif
613	break;
614	}
615
616	case VMINITCOMPLETED_HM:
617	{
618	/*
619	* Disable the periodic preemption timers if we can use the
620	* VMX-preemption timer instead.
621	*/
622	if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
623	&& HMR3IsVmxPreemptionTimerUsed(pVM))
624	pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
625	LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
626
627	/*
628	* Last chance for GIM to update its CPUID leaves if it requires
629	* knowledge/information from HM initialization.
630	*/
631	rc = GIMR3InitCompleted(pVM);
632	AssertRCReturn(rc, rc);
633
634	/*
635	* CPUM's post-initialization (print CPUIDs).
636	*/
637	CPUMR3LogCpuIdAndMsrFeatures(pVM);
638	break;
639	}
640
641	default: /* shuts up gcc */
642	break;
643	}
644
645	return rc;
646	}
647
648
649	/**
650	* Terminate the VMM bits.
651	*
652	* @returns VBox status code.
653	* @param pVM The cross context VM structure.
654	*/
655	VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
656	{
657	PVMCPU pVCpu = VMMGetCpu(pVM);
658	Assert(pVCpu && pVCpu->idCpu == 0);
659
660	/*
661	* Call Ring-0 entry with termination code.
662	*/
663	int rc;
664	for (;;)
665	{
666	#ifdef NO_SUPCALLR0VMM
667	//rc = VERR_GENERAL_FAILURE;
668	rc = VINF_SUCCESS;
669	#else
670	rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /idCpu/, VMMR0_DO_VMMR0_TERM, 0, NULL);
671	#endif
672	/*
673	* Flush the logs.
674	*/
675	#ifdef LOG_ENABLED
676	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
677	#endif
678	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
679	if (rc != VINF_VMM_CALL_HOST)
680	break;
681	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
682	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
683	break;
684	/* Resume R0 */
685	}
686	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
687	{
688	LogRel(("VMM: VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
689	if (RT_SUCCESS(rc))
690	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
691	}
692
693	for (VMCPUID i = 0; i < pVM->cCpus; i++)
694	{
695	RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
696	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
697	}
698	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
699	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
700	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
701	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
702	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
703	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
704	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
705	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
706	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
707	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
708	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
709	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
710	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
711	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
712	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
713	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
714
715	vmmTermFormatTypes();
716
717	/*
718	* Wait for the log flusher thread to complete.
719	*/
720	if (pVM->vmm.s.hLogFlusherThread != NIL_RTTHREAD)
721	{
722	int rc2 = RTThreadWait(pVM->vmm.s.hLogFlusherThread, RT_MS_30SEC, NULL);
723	AssertLogRelRC(rc2);
724	if (RT_SUCCESS(rc2))
725	pVM->vmm.s.hLogFlusherThread = NIL_RTTHREAD;
726	}
727
728	return rc;
729	}
730
731
732	/**
733	* Applies relocations to data and code managed by this
734	* component. This function will be called at init and
735	* whenever the VMM need to relocate it self inside the GC.
736	*
737	* The VMM will need to apply relocations to the core code.
738	*
739	* @param pVM The cross context VM structure.
740	* @param offDelta The relocation delta.
741	*/
742	VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
743	{
744	LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
745	RT_NOREF(offDelta);
746
747	/*
748	* Update the logger.
749	*/
750	VMMR3UpdateLoggers(pVM);
751	}
752
753
754	/**
755	* Worker for VMMR3UpdateLoggers.
756	*/
757	static int vmmR3UpdateLoggersWorker(PVM pVM, PVMCPU pVCpu, PRTLOGGER pSrcLogger, bool fReleaseLogger)
758	{
759	/*
760	* Get the group count.
761	*/
762	uint32_t uGroupsCrc32 = 0;
763	uint32_t cGroups = 0;
764	uint64_t fFlags = 0;
765	int rc = RTLogQueryBulk(pSrcLogger, &fFlags, &uGroupsCrc32, &cGroups, NULL);
766	Assert(rc == VERR_BUFFER_OVERFLOW);
767
768	/*
769	* Allocate the request of the right size.
770	*/
771	uint32_t const cbReq = RT_UOFFSETOF_DYN(VMMR0UPDATELOGGERSREQ, afGroups[cGroups]);
772	PVMMR0UPDATELOGGERSREQ pReq = (PVMMR0UPDATELOGGERSREQ)RTMemAllocZVar(cbReq);
773	if (pReq)
774	{
775	pReq->Hdr.u32Magic = SUPVMMR0REQHDR_MAGIC;
776	pReq->Hdr.cbReq = cbReq;
777	pReq->cGroups = cGroups;
778	rc = RTLogQueryBulk(pSrcLogger, &pReq->fFlags, &pReq->uGroupCrc32, &pReq->cGroups, pReq->afGroups);
779	AssertRC(rc);
780	if (RT_SUCCESS(rc))
781	rc = VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_UPDATE_LOGGERS, fReleaseLogger, &pReq->Hdr);
782
783	RTMemFree(pReq);
784	}
785	else
786	rc = VERR_NO_MEMORY;
787	return rc;
788	}
789
790
791	/**
792	* Updates the settings for the RC and R0 loggers.
793	*
794	* @returns VBox status code.
795	* @param pVM The cross context VM structure.
796	* @thread EMT
797	*/
798	VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
799	{
800	VM_ASSERT_EMT(pVM);
801	PVMCPU pVCpu = VMMGetCpu(pVM);
802	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
803
804	/*
805	* Each EMT has each own logger instance.
806	*/
807	/* Debug logging.*/
808	int rcDebug = VINF_SUCCESS;
809	#ifdef LOG_ENABLED
810	PRTLOGGER const pDefault = RTLogDefaultInstance();
811	if (pDefault)
812	rcDebug = vmmR3UpdateLoggersWorker(pVM, pVCpu, pDefault, false /fReleaseLogger/);
813	#else
814	RT_NOREF(pVM);
815	#endif
816
817	/* Release logging. */
818	int rcRelease = VINF_SUCCESS;
819	PRTLOGGER const pRelease = RTLogRelGetDefaultInstance();
820	if (pRelease)
821	rcRelease = vmmR3UpdateLoggersWorker(pVM, pVCpu, pRelease, true /fReleaseLogger/);
822
823	return RT_SUCCESS(rcDebug) ? rcRelease : rcDebug;
824	}
825
826
827	/**
828	* @callback_method_impl{FNRTTHREAD, Ring-0 log flusher thread.}
829	*/
830	static DECLCALLBACK(int) vmmR3LogFlusher(RTTHREAD hThreadSelf, void *pvUser)
831	{
832	PVM const pVM = (PVM)pvUser;
833	RT_NOREF(hThreadSelf);
834
835	/* Reset the flusher state before we start: */
836	pVM->vmm.s.LogFlusherItem.u32 = UINT32_MAX;
837
838	/*
839	* The work loop.
840	*/
841	for (;;)
842	{
843	/*
844	* Wait for work.
845	*/
846	int rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), NIL_VMCPUID, VMMR0_DO_VMMR0_LOG_FLUSHER, 0, NULL);
847	if (RT_SUCCESS(rc))
848	{
849	/* Paranoia: Make another copy of the request, to make sure the validated data can't be changed. */
850	VMMLOGFLUSHERENTRY Item;
851	Item.u32 = pVM->vmm.s.LogFlusherItem.u32;
852	if ( Item.s.idCpu < pVM->cCpus
853	&& Item.s.idxLogger < VMMLOGGER_IDX_MAX
854	&& Item.s.idxBuffer < VMMLOGGER_BUFFER_COUNT)
855	{
856	/*
857	* Verify the request.
858	*/
859	PVMCPU const pVCpu = pVM->apCpusR3[Item.s.idCpu];
860	PVMMR3CPULOGGER const pShared = &pVCpu->vmm.s.u.aLoggers[Item.s.idxLogger];
861	uint32_t const cbToFlush = pShared->aBufs[Item.s.idxBuffer].AuxDesc.offBuf;
862	if (cbToFlush > 0)
863	{
864	if (cbToFlush <= pShared->cbBuf)
865	{
866	char * const pchBufR3 = pShared->aBufs[Item.s.idxBuffer].pchBufR3;
867	if (pchBufR3)
868	{
869	/*
870	* Do the flushing.
871	*/
872	PRTLOGGER const pLogger = Item.s.idxLogger == VMMLOGGER_IDX_REGULAR
873	? RTLogGetDefaultInstance() : RTLogRelGetDefaultInstance();
874	if (pLogger)
875	{
876	char szBefore[128];
877	RTStrPrintf(szBefore, sizeof(szBefore),
878	"FLUSH idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x fFlushed=%RTbool cbDropped=%#x\n",
879	Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush,
880	pShared->aBufs[Item.s.idxBuffer].AuxDesc.fFlushedIndicator, pShared->cbDropped);
881	RTLogBulkWrite(pLogger, szBefore, pchBufR3, cbToFlush, "FLUSH DONE\n");
882	}
883	}
884	else
885	Log(("vmmR3LogFlusher: idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x: Warning! No ring-3 buffer pointer!\n",
886	Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush));
887	}
888	else
889	Log(("vmmR3LogFlusher: idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x: Warning! Exceeds %#x bytes buffer size!\n",
890	Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush, pShared->cbBuf));
891	}
892	else
893	Log(("vmmR3LogFlusher: idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x: Warning! Zero bytes to flush!\n",
894	Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush));
895
896	/*
897	* Mark the descriptor as flushed and set the request flag for same.
898	*/
899	pShared->aBufs[Item.s.idxBuffer].AuxDesc.fFlushedIndicator = true;
900	}
901	else
902	{
903	Assert(Item.s.idCpu == UINT16_MAX);
904	Assert(Item.s.idxLogger == UINT8_MAX);
905	Assert(Item.s.idxBuffer == UINT8_MAX);
906	}
907	}
908	/*
909	* Interrupted can happen, just ignore it.
910	*/
911	else if (rc == VERR_INTERRUPTED)
912	{ /* ignore*/ }
913	/*
914	* The ring-0 termination code will set the shutdown flag and wake us
915	* up, and we should return with object destroyed. In case there is
916	* some kind of race, we might also get sempahore destroyed.
917	*/
918	else if ( rc == VERR_OBJECT_DESTROYED
919	\|\| rc == VERR_SEM_DESTROYED
920	\|\| rc == VERR_INVALID_HANDLE)
921	{
922	LogRel(("vmmR3LogFlusher: Terminating (%Rrc)\n", rc));
923	return VINF_SUCCESS;
924	}
925	/*
926	* There shouldn't be any other errors...
927	*/
928	else
929	{
930	LogRelMax(64, ("vmmR3LogFlusher: VMMR0_DO_VMMR0_LOG_FLUSHER -> %Rrc\n", rc));
931	AssertRC(rc);
932	RTThreadSleep(1);
933	}
934	}
935	}
936
937
938	/**
939	* Helper for VMM_FLUSH_R0_LOG that does the flushing.
940	*
941	* @param pVM The cross context VM structure.
942	* @param pVCpu The cross context virtual CPU structure of the calling
943	* EMT.
944	* @param pShared The shared logger data.
945	* @param idxBuf The buffer to flush.
946	* @param pDstLogger The destination IPRT logger.
947	*/
948	static void vmmR3LogReturnFlush(PVM pVM, PVMCPU pVCpu, PVMMR3CPULOGGER pShared, size_t idxBuf, PRTLOGGER pDstLogger)
949	{
950	uint32_t const cbToFlush = pShared->aBufs[idxBuf].AuxDesc.offBuf;
951	const char pszBefore = cbToFlush < 256 ? NULL : "FLUSH*\n";
952	const char pszAfter = cbToFlush < 256 ? NULL : "END*\n";
953
954	#if VMMLOGGER_BUFFER_COUNT > 1
955	/*
956	* When we have more than one log buffer, the flusher thread may still be
957	* working on the previous buffer when we get here.
958	*/
959	char szBefore[64];
960	if (pShared->cFlushing > 0)
961	{
962	STAM_REL_PROFILE_START(&pShared->StatRaces, a);
963	uint64_t const nsStart = RTTimeNanoTS();
964
965	/* A no-op, but it takes the lock and the hope is that we end up waiting
966	on the flusher to finish up. */
967	RTLogBulkWrite(pDstLogger, NULL, "", 0, NULL);
968	if (pShared->cFlushing != 0)
969	{
970	RTLogBulkWrite(pDstLogger, NULL, "", 0, NULL);
971
972	/* If no luck, go to ring-0 and to proper waiting. */
973	if (pShared->cFlushing != 0)
974	{
975	STAM_REL_COUNTER_INC(&pShared->StatRacesToR0);
976	SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, VMMR0_DO_VMMR0_LOG_WAIT_FLUSHED, 0, NULL);
977	}
978	}
979
980	RTStrPrintf(szBefore, sizeof(szBefore), "%sFLUSH waited %'RU64 ns\n",
981	pShared->cFlushing == 0 ? "" : " MISORDERED", RTTimeNanoTS() - nsStart);
982	pszBefore = szBefore;
983	STAM_REL_PROFILE_STOP(&pShared->StatRaces, a);
984	}
985	#else
986	RT_NOREF(pVM, pVCpu);
987	#endif
988
989	RTLogBulkWrite(pDstLogger, pszBefore, pShared->aBufs[idxBuf].pchBufR3, cbToFlush, pszAfter);
990	pShared->aBufs[idxBuf].AuxDesc.fFlushedIndicator = true;
991	}
992
993
994	/**
995	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
996	*
997	* @returns Pointer to the buffer.
998	* @param pVM The cross context VM structure.
999	*/
1000	VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
1001	{
1002	return pVM->vmm.s.szRing0AssertMsg1;
1003	}
1004
1005
1006	/**
1007	* Returns the VMCPU of the specified virtual CPU.
1008	*
1009	* @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
1010	*
1011	* @param pUVM The user mode VM handle.
1012	* @param idCpu The ID of the virtual CPU.
1013	*/
1014	VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
1015	{
1016	UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
1017	AssertReturn(idCpu < pUVM->cCpus, NULL);
1018	VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
1019	return pUVM->pVM->apCpusR3[idCpu];
1020	}
1021
1022
1023	/**
1024	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
1025	*
1026	* @returns Pointer to the buffer.
1027	* @param pVM The cross context VM structure.
1028	*/
1029	VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
1030	{
1031	return pVM->vmm.s.szRing0AssertMsg2;
1032	}
1033
1034
1035	/**
1036	* Execute state save operation.
1037	*
1038	* @returns VBox status code.
1039	* @param pVM The cross context VM structure.
1040	* @param pSSM SSM operation handle.
1041	*/
1042	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
1043	{
1044	LogFlow(("vmmR3Save:\n"));
1045
1046	/*
1047	* Save the started/stopped state of all CPUs except 0 as it will always
1048	* be running. This avoids breaking the saved state version. :-)
1049	*/
1050	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1051	SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(pVM->apCpusR3[i])));
1052
1053	return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
1054	}
1055
1056
1057	/**
1058	* Execute state load operation.
1059	*
1060	* @returns VBox status code.
1061	* @param pVM The cross context VM structure.
1062	* @param pSSM SSM operation handle.
1063	* @param uVersion Data layout version.
1064	* @param uPass The data pass.
1065	*/
1066	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
1067	{
1068	LogFlow(("vmmR3Load:\n"));
1069	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
1070
1071	/*
1072	* Validate version.
1073	*/
1074	if ( uVersion != VMM_SAVED_STATE_VERSION
1075	&& uVersion != VMM_SAVED_STATE_VERSION_3_0)
1076	{
1077	AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
1078	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1079	}
1080
1081	if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1082	{
1083	/* Ignore the stack bottom, stack pointer and stack bits. */
1084	RTRCPTR RCPtrIgnored;
1085	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1086	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1087	#ifdef RT_OS_DARWIN
1088	if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1089	&& SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1090	&& SSMR3HandleRevision(pSSM) >= 48858
1091	&& ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1092	\|\| !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1093	)
1094	SSMR3Skip(pSSM, 16384);
1095	else
1096	SSMR3Skip(pSSM, 8192);
1097	#else
1098	SSMR3Skip(pSSM, 8192);
1099	#endif
1100	}
1101
1102	/*
1103	* Restore the VMCPU states. VCPU 0 is always started.
1104	*/
1105	VMCPU_SET_STATE(pVM->apCpusR3[0], VMCPUSTATE_STARTED);
1106	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1107	{
1108	bool fStarted;
1109	int rc = SSMR3GetBool(pSSM, &fStarted);
1110	if (RT_FAILURE(rc))
1111	return rc;
1112	VMCPU_SET_STATE(pVM->apCpusR3[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1113	}
1114
1115	/* terminator */
1116	uint32_t u32;
1117	int rc = SSMR3GetU32(pSSM, &u32);
1118	if (RT_FAILURE(rc))
1119	return rc;
1120	if (u32 != UINT32_MAX)
1121	{
1122	AssertMsgFailed(("u32=%#x\n", u32));
1123	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1124	}
1125	return VINF_SUCCESS;
1126	}
1127
1128
1129	/**
1130	* Suspends the CPU yielder.
1131	*
1132	* @param pVM The cross context VM structure.
1133	*/
1134	VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1135	{
1136	#if 0 /* pointless when timers doesn't run on EMT */
1137	VMCPU_ASSERT_EMT(pVM->apCpusR3[0]);
1138	if (!pVM->vmm.s.cYieldResumeMillies)
1139	{
1140	uint64_t u64Now = TMTimerGet(pVM, pVM->vmm.s.hYieldTimer);
1141	uint64_t u64Expire = TMTimerGetExpire(pVM, pVM->vmm.s.hYieldTimer);
1142	if (u64Now >= u64Expire \|\| u64Expire == ~(uint64_t)0)
1143	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1144	else
1145	pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM, pVM->vmm.s.hYieldTimer, u64Expire - u64Now);
1146	TMTimerStop(pVM, pVM->vmm.s.hYieldTimer);
1147	}
1148	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1149	#else
1150	RT_NOREF(pVM);
1151	#endif
1152	}
1153
1154
1155	/**
1156	* Stops the CPU yielder.
1157	*
1158	* @param pVM The cross context VM structure.
1159	*/
1160	VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1161	{
1162	#if 0 /* pointless when timers doesn't run on EMT */
1163	if (!pVM->vmm.s.cYieldResumeMillies)
1164	TMTimerStop(pVM, pVM->vmm.s.hYieldTimer);
1165	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1166	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1167	#else
1168	RT_NOREF(pVM);
1169	#endif
1170	}
1171
1172
1173	/**
1174	* Resumes the CPU yielder when it has been a suspended or stopped.
1175	*
1176	* @param pVM The cross context VM structure.
1177	*/
1178	VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1179	{
1180	#if 0 /* pointless when timers doesn't run on EMT */
1181	if (pVM->vmm.s.cYieldResumeMillies)
1182	{
1183	TMTimerSetMillies(pVM, pVM->vmm.s.hYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1184	pVM->vmm.s.cYieldResumeMillies = 0;
1185	}
1186	#else
1187	RT_NOREF(pVM);
1188	#endif
1189	}
1190
1191
1192	#if 0 /* pointless when timers doesn't run on EMT */
1193	/**
1194	* @callback_method_impl{FNTMTIMERINT, EMT yielder}
1195	*
1196	* @todo This is a UNI core/thread thing, really... Should be reconsidered.
1197	*/
1198	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, TMTIMERHANDLE hTimer, void *pvUser)
1199	{
1200	NOREF(pvUser);
1201
1202	/*
1203	* This really needs some careful tuning. While we shouldn't be too greedy since
1204	* that'll cause the rest of the system to stop up, we shouldn't be too nice either
1205	* because that'll cause us to stop up.
1206	*
1207	* The current logic is to use the default interval when there is no lag worth
1208	* mentioning, but when we start accumulating lag we don't bother yielding at all.
1209	*
1210	* (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1211	* so the lag is up to date.)
1212	*/
1213	const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1214	if ( u64Lag < 50000000 /* 50ms */
1215	\|\| ( u64Lag < 1000000000 /* 1s */
1216	&& RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1217	)
1218	{
1219	uint64_t u64Elapsed = RTTimeNanoTS();
1220	pVM->vmm.s.u64LastYield = u64Elapsed;
1221
1222	RTThreadYield();
1223
1224	#ifdef LOG_ENABLED
1225	u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1226	Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1227	#endif
1228	}
1229	TMTimerSetMillies(pVM, hTimer, pVM->vmm.s.cYieldEveryMillies);
1230	}
1231	#endif
1232
1233
1234	/**
1235	* Executes guest code (Intel VT-x and AMD-V).
1236	*
1237	* @param pVM The cross context VM structure.
1238	* @param pVCpu The cross context virtual CPU structure.
1239	*/
1240	VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1241	{
1242	Log2(("VMMR3HmRunGC: (cs:rip=%04x:%RX64)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1243
1244	for (;;)
1245	{
1246	int rc;
1247	do
1248	{
1249	#ifdef NO_SUPCALLR0VMM
1250	rc = VERR_GENERAL_FAILURE;
1251	#else
1252	rc = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), VMMR0_DO_HM_RUN, pVCpu->idCpu);
1253	if (RT_LIKELY(rc == VINF_SUCCESS))
1254	rc = pVCpu->vmm.s.iLastGZRc;
1255	#endif
1256	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1257
1258	#if 0 /** @todo triggers too often */
1259	Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TO_R3));
1260	#endif
1261
1262	/*
1263	* Flush the logs
1264	*/
1265	#ifdef LOG_ENABLED
1266	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
1267	#endif
1268	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
1269	if (rc != VINF_VMM_CALL_HOST)
1270	{
1271	Log2(("VMMR3HmRunGC: returns %Rrc (cs:rip=%04x:%RX64)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1272	return rc;
1273	}
1274	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1275	if (RT_FAILURE(rc))
1276	return rc;
1277	/* Resume R0 */
1278	}
1279	}
1280
1281
1282	/**
1283	* Perform one of the fast I/O control VMMR0 operation.
1284	*
1285	* @returns VBox strict status code.
1286	* @param pVM The cross context VM structure.
1287	* @param pVCpu The cross context virtual CPU structure.
1288	* @param enmOperation The operation to perform.
1289	*/
1290	VMMR3_INT_DECL(VBOXSTRICTRC) VMMR3CallR0EmtFast(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation)
1291	{
1292	for (;;)
1293	{
1294	VBOXSTRICTRC rcStrict;
1295	do
1296	{
1297	#ifdef NO_SUPCALLR0VMM
1298	rcStrict = VERR_GENERAL_FAILURE;
1299	#else
1300	rcStrict = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), enmOperation, pVCpu->idCpu);
1301	if (RT_LIKELY(rcStrict == VINF_SUCCESS))
1302	rcStrict = pVCpu->vmm.s.iLastGZRc;
1303	#endif
1304	} while (rcStrict == VINF_EM_RAW_INTERRUPT_HYPER);
1305
1306	/*
1307	* Flush the logs
1308	*/
1309	#ifdef LOG_ENABLED
1310	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
1311	#endif
1312	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
1313	if (rcStrict != VINF_VMM_CALL_HOST)
1314	return rcStrict;
1315	int rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1316	if (RT_FAILURE(rc))
1317	return rc;
1318	/* Resume R0 */
1319	}
1320	}
1321
1322
1323	/**
1324	* VCPU worker for VMMR3SendStartupIpi.
1325	*
1326	* @param pVM The cross context VM structure.
1327	* @param idCpu Virtual CPU to perform SIPI on.
1328	* @param uVector The SIPI vector.
1329	*/
1330	static DECLCALLBACK(int) vmmR3SendStarupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1331	{
1332	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1333	VMCPU_ASSERT_EMT(pVCpu);
1334
1335	/*
1336	* In the INIT state, the target CPU is only responsive to an SIPI.
1337	* This is also true for when when the CPU is in VMX non-root mode.
1338	*
1339	* See AMD spec. 16.5 "Interprocessor Interrupts (IPI)".
1340	* See Intel spec. 26.6.2 "Activity State".
1341	*/
1342	if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1343	return VINF_SUCCESS;
1344
1345	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1346	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1347	if (CPUMIsGuestInVmxRootMode(pCtx))
1348	{
1349	/* If the CPU is in VMX non-root mode we must cause a VM-exit. */
1350	if (CPUMIsGuestInVmxNonRootMode(pCtx))
1351	return VBOXSTRICTRC_TODO(IEMExecVmxVmexitStartupIpi(pVCpu, uVector));
1352
1353	/* If the CPU is in VMX root mode (and not in VMX non-root mode) SIPIs are blocked. */
1354	return VINF_SUCCESS;
1355	}
1356	#endif
1357
1358	pCtx->cs.Sel = uVector << 8;
1359	pCtx->cs.ValidSel = uVector << 8;
1360	pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1361	pCtx->cs.u64Base = uVector << 12;
1362	pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1363	pCtx->rip = 0;
1364
1365	Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1366
1367	# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1368	EMSetState(pVCpu, EMSTATE_HALTED);
1369	return VINF_EM_RESCHEDULE;
1370	# else /* And if we go the VMCPU::enmState way it can stay here. */
1371	VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1372	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1373	return VINF_SUCCESS;
1374	# endif
1375	}
1376
1377
1378	/**
1379	* VCPU worker for VMMR3SendInitIpi.
1380	*
1381	* @returns VBox status code.
1382	* @param pVM The cross context VM structure.
1383	* @param idCpu Virtual CPU to perform SIPI on.
1384	*/
1385	static DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1386	{
1387	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1388	VMCPU_ASSERT_EMT(pVCpu);
1389
1390	Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1391
1392	/** @todo r=ramshankar: We should probably block INIT signal when the CPU is in
1393	* wait-for-SIPI state. Verify. */
1394
1395	/* If the CPU is in VMX non-root mode, INIT signals cause VM-exits. */
1396	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1397	PCCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1398	if (CPUMIsGuestInVmxNonRootMode(pCtx))
1399	return VBOXSTRICTRC_TODO(IEMExecVmxVmexit(pVCpu, VMX_EXIT_INIT_SIGNAL, 0 /* uExitQual */));
1400	#endif
1401
1402	/** @todo Figure out how to handle a SVM nested-guest intercepts here for INIT
1403	* IPI (e.g. SVM_EXIT_INIT). */
1404
1405	PGMR3ResetCpu(pVM, pVCpu);
1406	PDMR3ResetCpu(pVCpu); /* Only clears pending interrupts force flags */
1407	APICR3InitIpi(pVCpu);
1408	TRPMR3ResetCpu(pVCpu);
1409	CPUMR3ResetCpu(pVM, pVCpu);
1410	EMR3ResetCpu(pVCpu);
1411	HMR3ResetCpu(pVCpu);
1412	NEMR3ResetCpu(pVCpu, true /fInitIpi/);
1413
1414	/* This will trickle up on the target EMT. */
1415	return VINF_EM_WAIT_SIPI;
1416	}
1417
1418
1419	/**
1420	* Sends a Startup IPI to the virtual CPU by setting CS:EIP into
1421	* vector-dependent state and unhalting processor.
1422	*
1423	* @param pVM The cross context VM structure.
1424	* @param idCpu Virtual CPU to perform SIPI on.
1425	* @param uVector SIPI vector.
1426	*/
1427	VMMR3_INT_DECL(void) VMMR3SendStartupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1428	{
1429	AssertReturnVoid(idCpu < pVM->cCpus);
1430
1431	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendStarupIpi, 3, pVM, idCpu, uVector);
1432	AssertRC(rc);
1433	}
1434
1435
1436	/**
1437	* Sends init IPI to the virtual CPU.
1438	*
1439	* @param pVM The cross context VM structure.
1440	* @param idCpu Virtual CPU to perform int IPI on.
1441	*/
1442	VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1443	{
1444	AssertReturnVoid(idCpu < pVM->cCpus);
1445
1446	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1447	AssertRC(rc);
1448	}
1449
1450
1451	/**
1452	* Registers the guest memory range that can be used for patching.
1453	*
1454	* @returns VBox status code.
1455	* @param pVM The cross context VM structure.
1456	* @param pPatchMem Patch memory range.
1457	* @param cbPatchMem Size of the memory range.
1458	*/
1459	VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1460	{
1461	VM_ASSERT_EMT(pVM);
1462	if (HMIsEnabled(pVM))
1463	return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1464
1465	return VERR_NOT_SUPPORTED;
1466	}
1467
1468
1469	/**
1470	* Deregisters the guest memory range that can be used for patching.
1471	*
1472	* @returns VBox status code.
1473	* @param pVM The cross context VM structure.
1474	* @param pPatchMem Patch memory range.
1475	* @param cbPatchMem Size of the memory range.
1476	*/
1477	VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1478	{
1479	if (HMIsEnabled(pVM))
1480	return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1481
1482	return VINF_SUCCESS;
1483	}
1484
1485
1486	/**
1487	* Common recursion handler for the other EMTs.
1488	*
1489	* @returns Strict VBox status code.
1490	* @param pVM The cross context VM structure.
1491	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1492	* @param rcStrict Current status code to be combined with the one
1493	* from this recursion and returned.
1494	*/
1495	static VBOXSTRICTRC vmmR3EmtRendezvousCommonRecursion(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rcStrict)
1496	{
1497	int rc2;
1498
1499	/*
1500	* We wait here while the initiator of this recursion reconfigures
1501	* everything. The last EMT to get in signals the initiator.
1502	*/
1503	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) == pVM->cCpus)
1504	{
1505	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1506	AssertLogRelRC(rc2);
1507	}
1508
1509	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPush, RT_INDEFINITE_WAIT);
1510	AssertLogRelRC(rc2);
1511
1512	/*
1513	* Do the normal rendezvous processing.
1514	*/
1515	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1516	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1517
1518	/*
1519	* Wait for the initiator to restore everything.
1520	*/
1521	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPop, RT_INDEFINITE_WAIT);
1522	AssertLogRelRC(rc2);
1523
1524	/*
1525	* Last thread out of here signals the initiator.
1526	*/
1527	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) == pVM->cCpus)
1528	{
1529	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1530	AssertLogRelRC(rc2);
1531	}
1532
1533	/*
1534	* Merge status codes and return.
1535	*/
1536	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
1537	if ( rcStrict2 != VINF_SUCCESS
1538	&& ( rcStrict == VINF_SUCCESS
1539	\|\| rcStrict > rcStrict2))
1540	rcStrict = rcStrict2;
1541	return rcStrict;
1542	}
1543
1544
1545	/**
1546	* Count returns and have the last non-caller EMT wake up the caller.
1547	*
1548	* @returns VBox strict informational status code for EM scheduling. No failures
1549	* will be returned here, those are for the caller only.
1550	*
1551	* @param pVM The cross context VM structure.
1552	* @param rcStrict The current accumulated recursive status code,
1553	* to be merged with i32RendezvousStatus and
1554	* returned.
1555	*/
1556	DECL_FORCE_INLINE(VBOXSTRICTRC) vmmR3EmtRendezvousNonCallerReturn(PVM pVM, VBOXSTRICTRC rcStrict)
1557	{
1558	VBOXSTRICTRC rcStrict2 = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1559
1560	uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1561	if (cReturned == pVM->cCpus - 1U)
1562	{
1563	int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1564	AssertLogRelRC(rc);
1565	}
1566
1567	/*
1568	* Merge the status codes, ignoring error statuses in this code path.
1569	*/
1570	AssertLogRelMsgReturn( rcStrict2 <= VINF_SUCCESS
1571	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1572	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)),
1573	VERR_IPE_UNEXPECTED_INFO_STATUS);
1574
1575	if (RT_SUCCESS(rcStrict2))
1576	{
1577	if ( rcStrict2 != VINF_SUCCESS
1578	&& ( rcStrict == VINF_SUCCESS
1579	\|\| rcStrict > rcStrict2))
1580	rcStrict = rcStrict2;
1581	}
1582	return rcStrict;
1583	}
1584
1585
1586	/**
1587	* Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1588	*
1589	* @returns VBox strict informational status code for EM scheduling. No failures
1590	* will be returned here, those are for the caller only. When
1591	* fIsCaller is set, VINF_SUCCESS is always returned.
1592	*
1593	* @param pVM The cross context VM structure.
1594	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1595	* @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1596	* not.
1597	* @param fFlags The flags.
1598	* @param pfnRendezvous The callback.
1599	* @param pvUser The user argument for the callback.
1600	*/
1601	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1602	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1603	{
1604	int rc;
1605	VBOXSTRICTRC rcStrictRecursion = VINF_SUCCESS;
1606
1607	/*
1608	* Enter, the last EMT triggers the next callback phase.
1609	*/
1610	uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1611	if (cEntered != pVM->cCpus)
1612	{
1613	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1614	{
1615	/* Wait for our turn. */
1616	for (;;)
1617	{
1618	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1619	AssertLogRelRC(rc);
1620	if (!pVM->vmm.s.fRendezvousRecursion)
1621	break;
1622	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1623	}
1624	}
1625	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1626	{
1627	/* Wait for the last EMT to arrive and wake everyone up. */
1628	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1629	AssertLogRelRC(rc);
1630	Assert(!pVM->vmm.s.fRendezvousRecursion);
1631	}
1632	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1633	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1634	{
1635	/* Wait for our turn. */
1636	for (;;)
1637	{
1638	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1639	AssertLogRelRC(rc);
1640	if (!pVM->vmm.s.fRendezvousRecursion)
1641	break;
1642	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1643	}
1644	}
1645	else
1646	{
1647	Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1648
1649	/*
1650	* The execute once is handled specially to optimize the code flow.
1651	*
1652	* The last EMT to arrive will perform the callback and the other
1653	* EMTs will wait on the Done/DoneCaller semaphores (instead of
1654	* the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1655	* returns, that EMT will initiate the normal return sequence.
1656	*/
1657	if (!fIsCaller)
1658	{
1659	for (;;)
1660	{
1661	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1662	AssertLogRelRC(rc);
1663	if (!pVM->vmm.s.fRendezvousRecursion)
1664	break;
1665	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1666	}
1667
1668	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1669	}
1670	return VINF_SUCCESS;
1671	}
1672	}
1673	else
1674	{
1675	/*
1676	* All EMTs are waiting, clear the FF and take action according to the
1677	* execution method.
1678	*/
1679	VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1680
1681	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1682	{
1683	/* Wake up everyone. */
1684	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1685	AssertLogRelRC(rc);
1686	}
1687	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1688	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1689	{
1690	/* Figure out who to wake up and wake it up. If it's ourself, then
1691	it's easy otherwise wait for our turn. */
1692	VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1693	? 0
1694	: pVM->cCpus - 1U;
1695	if (pVCpu->idCpu != iFirst)
1696	{
1697	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1698	AssertLogRelRC(rc);
1699	for (;;)
1700	{
1701	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1702	AssertLogRelRC(rc);
1703	if (!pVM->vmm.s.fRendezvousRecursion)
1704	break;
1705	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1706	}
1707	}
1708	}
1709	/* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1710	}
1711
1712
1713	/*
1714	* Do the callback and update the status if necessary.
1715	*/
1716	if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1717	\|\| RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1718	{
1719	VBOXSTRICTRC rcStrict2 = pfnRendezvous(pVM, pVCpu, pvUser);
1720	if (rcStrict2 != VINF_SUCCESS)
1721	{
1722	AssertLogRelMsg( rcStrict2 <= VINF_SUCCESS
1723	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1724	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)));
1725	int32_t i32RendezvousStatus;
1726	do
1727	{
1728	i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1729	if ( rcStrict2 == i32RendezvousStatus
1730	\|\| RT_FAILURE(i32RendezvousStatus)
1731	\|\| ( i32RendezvousStatus != VINF_SUCCESS
1732	&& rcStrict2 > i32RendezvousStatus))
1733	break;
1734	} while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict2), i32RendezvousStatus));
1735	}
1736	}
1737
1738	/*
1739	* Increment the done counter and take action depending on whether we're
1740	* the last to finish callback execution.
1741	*/
1742	uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1743	if ( cDone != pVM->cCpus
1744	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1745	{
1746	/* Signal the next EMT? */
1747	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1748	{
1749	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1750	AssertLogRelRC(rc);
1751	}
1752	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1753	{
1754	Assert(cDone == pVCpu->idCpu + 1U);
1755	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1756	AssertLogRelRC(rc);
1757	}
1758	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1759	{
1760	Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1761	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1762	AssertLogRelRC(rc);
1763	}
1764
1765	/* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1766	if (!fIsCaller)
1767	{
1768	for (;;)
1769	{
1770	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1771	AssertLogRelRC(rc);
1772	if (!pVM->vmm.s.fRendezvousRecursion)
1773	break;
1774	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1775	}
1776	}
1777	}
1778	else
1779	{
1780	/* Callback execution is all done, tell the rest to return. */
1781	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1782	AssertLogRelRC(rc);
1783	}
1784
1785	if (!fIsCaller)
1786	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1787	return rcStrictRecursion;
1788	}
1789
1790
1791	/**
1792	* Called in response to VM_FF_EMT_RENDEZVOUS.
1793	*
1794	* @returns VBox strict status code - EM scheduling. No errors will be returned
1795	* here, nor will any non-EM scheduling status codes be returned.
1796	*
1797	* @param pVM The cross context VM structure.
1798	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1799	*
1800	* @thread EMT
1801	*/
1802	VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1803	{
1804	Assert(!pVCpu->vmm.s.fInRendezvous);
1805	Log(("VMMR3EmtRendezvousFF: EMT%#u\n", pVCpu->idCpu));
1806	pVCpu->vmm.s.fInRendezvous = true;
1807	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1808	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1809	pVCpu->vmm.s.fInRendezvous = false;
1810	Log(("VMMR3EmtRendezvousFF: EMT%#u returns %Rrc\n", pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
1811	return VBOXSTRICTRC_TODO(rcStrict);
1812	}
1813
1814
1815	/**
1816	* Helper for resetting an single wakeup event sempahore.
1817	*
1818	* @returns VERR_TIMEOUT on success, RTSemEventWait status otherwise.
1819	* @param hEvt The event semaphore to reset.
1820	*/
1821	static int vmmR3HlpResetEvent(RTSEMEVENT hEvt)
1822	{
1823	for (uint32_t cLoops = 0; ; cLoops++)
1824	{
1825	int rc = RTSemEventWait(hEvt, 0 /cMsTimeout/);
1826	if (rc != VINF_SUCCESS \|\| cLoops > _4K)
1827	return rc;
1828	}
1829	}
1830
1831
1832	/**
1833	* Worker for VMMR3EmtRendezvous that handles recursion.
1834	*
1835	* @returns VBox strict status code. This will be the first error,
1836	* VINF_SUCCESS, or an EM scheduling status code.
1837	*
1838	* @param pVM The cross context VM structure.
1839	* @param pVCpu The cross context virtual CPU structure of the
1840	* calling EMT.
1841	* @param fFlags Flags indicating execution methods. See
1842	* grp_VMMR3EmtRendezvous_fFlags.
1843	* @param pfnRendezvous The callback.
1844	* @param pvUser User argument for the callback.
1845	*
1846	* @thread EMT(pVCpu)
1847	*/
1848	static VBOXSTRICTRC vmmR3EmtRendezvousRecursive(PVM pVM, PVMCPU pVCpu, uint32_t fFlags,
1849	PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1850	{
1851	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d\n", fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions));
1852	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1853	Assert(pVCpu->vmm.s.fInRendezvous);
1854
1855	/*
1856	* Save the current state.
1857	*/
1858	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1859	uint32_t const cParentDone = pVM->vmm.s.cRendezvousEmtsDone;
1860	int32_t const iParentStatus = pVM->vmm.s.i32RendezvousStatus;
1861	PFNVMMEMTRENDEZVOUS const pfnParent = pVM->vmm.s.pfnRendezvous;
1862	void * const pvParentUser = pVM->vmm.s.pvRendezvousUser;
1863
1864	/*
1865	* Check preconditions and save the current state.
1866	*/
1867	AssertReturn( (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1868	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1869	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1870	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1871	VERR_INTERNAL_ERROR);
1872	AssertReturn(pVM->vmm.s.cRendezvousEmtsEntered == pVM->cCpus, VERR_INTERNAL_ERROR_2);
1873	AssertReturn(pVM->vmm.s.cRendezvousEmtsReturned == 0, VERR_INTERNAL_ERROR_3);
1874
1875	/*
1876	* Reset the recursion prep and pop semaphores.
1877	*/
1878	int rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1879	AssertLogRelRCReturn(rc, rc);
1880	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1881	AssertLogRelRCReturn(rc, rc);
1882	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1883	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1884	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1885	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1886
1887	/*
1888	* Usher the other thread into the recursion routine.
1889	*/
1890	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush, 0);
1891	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, true);
1892
1893	uint32_t cLeft = pVM->cCpus - (cParentDone + 1U);
1894	if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1895	while (cLeft-- > 0)
1896	{
1897	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1898	AssertLogRelRC(rc);
1899	}
1900	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1901	{
1902	Assert(cLeft == pVM->cCpus - (pVCpu->idCpu + 1U));
1903	for (VMCPUID iCpu = pVCpu->idCpu + 1U; iCpu < pVM->cCpus; iCpu++)
1904	{
1905	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu]);
1906	AssertLogRelRC(rc);
1907	}
1908	}
1909	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1910	{
1911	Assert(cLeft == pVCpu->idCpu);
1912	for (VMCPUID iCpu = pVCpu->idCpu; iCpu > 0; iCpu--)
1913	{
1914	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu - 1U]);
1915	AssertLogRelRC(rc);
1916	}
1917	}
1918	else
1919	AssertLogRelReturn((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1920	VERR_INTERNAL_ERROR_4);
1921
1922	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1923	AssertLogRelRC(rc);
1924	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1925	AssertLogRelRC(rc);
1926
1927
1928	/*
1929	* Wait for the EMTs to wake up and get out of the parent rendezvous code.
1930	*/
1931	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) != pVM->cCpus)
1932	{
1933	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPushCaller, RT_INDEFINITE_WAIT);
1934	AssertLogRelRC(rc);
1935	}
1936
1937	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, false);
1938
1939	/*
1940	* Clear the slate and setup the new rendezvous.
1941	*/
1942	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1943	{
1944	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1945	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1946	}
1947	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1948	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1949	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1950	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1951
1952	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1953	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1954	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1955	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1956	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
1957	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1958	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1959	ASMAtomicIncU32(&pVM->vmm.s.cRendezvousRecursions);
1960
1961	/*
1962	* We're ready to go now, do normal rendezvous processing.
1963	*/
1964	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1965	AssertLogRelRC(rc);
1966
1967	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /fIsCaller/, fFlags, pfnRendezvous, pvUser);
1968
1969	/*
1970	* The caller waits for the other EMTs to be done, return and waiting on the
1971	* pop semaphore.
1972	*/
1973	for (;;)
1974	{
1975	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1976	AssertLogRelRC(rc);
1977	if (!pVM->vmm.s.fRendezvousRecursion)
1978	break;
1979	rcStrict = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict);
1980	}
1981
1982	/*
1983	* Get the return code and merge it with the above recursion status.
1984	*/
1985	VBOXSTRICTRC rcStrict2 = pVM->vmm.s.i32RendezvousStatus;
1986	if ( rcStrict2 != VINF_SUCCESS
1987	&& ( rcStrict == VINF_SUCCESS
1988	\|\| rcStrict > rcStrict2))
1989	rcStrict = rcStrict2;
1990
1991	/*
1992	* Restore the parent rendezvous state.
1993	*/
1994	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1995	{
1996	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1997	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1998	}
1999	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2000	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2001	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2002	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2003
2004	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, pVM->cCpus);
2005	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2006	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, cParentDone);
2007	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, iParentStatus);
2008	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fParentFlags);
2009	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvParentUser);
2010	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnParent);
2011
2012	/*
2013	* Usher the other EMTs back to their parent recursion routine, waiting
2014	* for them to all get there before we return (makes sure they've been
2015	* scheduled and are past the pop event sem, see below).
2016	*/
2017	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop, 0);
2018	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
2019	AssertLogRelRC(rc);
2020
2021	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) != pVM->cCpus)
2022	{
2023	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPopCaller, RT_INDEFINITE_WAIT);
2024	AssertLogRelRC(rc);
2025	}
2026
2027	/*
2028	* We must reset the pop semaphore on the way out (doing the pop caller too,
2029	* just in case). The parent may be another recursion.
2030	*/
2031	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop); AssertLogRelRC(rc);
2032	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2033
2034	ASMAtomicDecU32(&pVM->vmm.s.cRendezvousRecursions);
2035
2036	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d returns %Rrc\n",
2037	fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions, VBOXSTRICTRC_VAL(rcStrict)));
2038	return rcStrict;
2039	}
2040
2041
2042	/**
2043	* EMT rendezvous.
2044	*
2045	* Gathers all the EMTs and execute some code on each of them, either in a one
2046	* by one fashion or all at once.
2047	*
2048	* @returns VBox strict status code. This will be the first error,
2049	* VINF_SUCCESS, or an EM scheduling status code.
2050	*
2051	* @retval VERR_DEADLOCK if recursion is attempted using a rendezvous type that
2052	* doesn't support it or if the recursion is too deep.
2053	*
2054	* @param pVM The cross context VM structure.
2055	* @param fFlags Flags indicating execution methods. See
2056	* grp_VMMR3EmtRendezvous_fFlags. The one-by-one,
2057	* descending and ascending rendezvous types support
2058	* recursion from inside @a pfnRendezvous.
2059	* @param pfnRendezvous The callback.
2060	* @param pvUser User argument for the callback.
2061	*
2062	* @thread Any.
2063	*/
2064	VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
2065	{
2066	/*
2067	* Validate input.
2068	*/
2069	AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
2070	AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
2071	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2072	&& !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
2073	AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
2074	\|\| ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
2075	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
2076	("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
2077
2078	VBOXSTRICTRC rcStrict;
2079	PVMCPU pVCpu = VMMGetCpu(pVM);
2080	if (!pVCpu)
2081	{
2082	/*
2083	* Forward the request to an EMT thread.
2084	*/
2085	Log(("VMMR3EmtRendezvous: %#x non-EMT\n", fFlags));
2086	if (!(fFlags & VMMEMTRENDEZVOUS_FLAGS_PRIORITY))
2087	rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2088	else
2089	rcStrict = VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2090	Log(("VMMR3EmtRendezvous: %#x non-EMT returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2091	}
2092	else if ( pVM->cCpus == 1
2093	\|\| ( pVM->enmVMState == VMSTATE_DESTROYING
2094	&& VMR3GetActiveEmts(pVM->pUVM) < pVM->cCpus ) )
2095	{
2096	/*
2097	* Shortcut for the single EMT case.
2098	*
2099	* We also ends up here if EMT(0) (or others) tries to issue a rendezvous
2100	* during vmR3Destroy after other emulation threads have started terminating.
2101	*/
2102	if (!pVCpu->vmm.s.fInRendezvous)
2103	{
2104	Log(("VMMR3EmtRendezvous: %#x EMT (uni)\n", fFlags));
2105	pVCpu->vmm.s.fInRendezvous = true;
2106	pVM->vmm.s.fRendezvousFlags = fFlags;
2107	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2108	pVCpu->vmm.s.fInRendezvous = false;
2109	}
2110	else
2111	{
2112	/* Recursion. Do the same checks as in the SMP case. */
2113	Log(("VMMR3EmtRendezvous: %#x EMT (uni), recursion depth=%d\n", fFlags, pVM->vmm.s.cRendezvousRecursions));
2114	uint32_t fType = pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK;
2115	AssertLogRelReturn( !pVCpu->vmm.s.fInRendezvous
2116	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2117	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2118	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2119	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2120	, VERR_DEADLOCK);
2121
2122	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
2123	pVM->vmm.s.cRendezvousRecursions++;
2124	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
2125	pVM->vmm.s.fRendezvousFlags = fFlags;
2126
2127	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2128
2129	pVM->vmm.s.fRendezvousFlags = fParentFlags;
2130	pVM->vmm.s.cRendezvousRecursions--;
2131	}
2132	Log(("VMMR3EmtRendezvous: %#x EMT (uni) returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2133	}
2134	else
2135	{
2136	/*
2137	* Spin lock. If busy, check for recursion, if not recursing wait for
2138	* the other EMT to finish while keeping a lookout for the RENDEZVOUS FF.
2139	*/
2140	int rc;
2141	rcStrict = VINF_SUCCESS;
2142	if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
2143	{
2144	/* Allow recursion in some cases. */
2145	if ( pVCpu->vmm.s.fInRendezvous
2146	&& ( (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2147	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2148	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2149	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2150	))
2151	return VBOXSTRICTRC_TODO(vmmR3EmtRendezvousRecursive(pVM, pVCpu, fFlags, pfnRendezvous, pvUser));
2152
2153	AssertLogRelMsgReturn(!pVCpu->vmm.s.fInRendezvous, ("fRendezvousFlags=%#x\n", pVM->vmm.s.fRendezvousFlags),
2154	VERR_DEADLOCK);
2155
2156	Log(("VMMR3EmtRendezvous: %#x EMT#%u, waiting for lock...\n", fFlags, pVCpu->idCpu));
2157	while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
2158	{
2159	if (VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS))
2160	{
2161	rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
2162	if ( rc != VINF_SUCCESS
2163	&& ( rcStrict == VINF_SUCCESS
2164	\|\| rcStrict > rc))
2165	rcStrict = rc;
2166	/** @todo Perhaps deal with termination here? */
2167	}
2168	ASMNopPause();
2169	}
2170	}
2171
2172	Log(("VMMR3EmtRendezvous: %#x EMT#%u\n", fFlags, pVCpu->idCpu));
2173	Assert(!VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS));
2174	Assert(!pVCpu->vmm.s.fInRendezvous);
2175	pVCpu->vmm.s.fInRendezvous = true;
2176
2177	/*
2178	* Clear the slate and setup the rendezvous. This is a semaphore ping-pong orgy. :-)
2179	*/
2180	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2181	{
2182	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
2183	AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2184	}
2185	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2186	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2187	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2188	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2189	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2190	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2191	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2192	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2193	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
2194	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2195	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2196
2197	/*
2198	* Set the FF and poke the other EMTs.
2199	*/
2200	VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
2201	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
2202
2203	/*
2204	* Do the same ourselves.
2205	*/
2206	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
2207
2208	/*
2209	* The caller waits for the other EMTs to be done and return before doing
2210	* the cleanup. This makes away with wakeup / reset races we would otherwise
2211	* risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
2212	*/
2213	for (;;)
2214	{
2215	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2216	AssertLogRelRC(rc);
2217	if (!pVM->vmm.s.fRendezvousRecursion)
2218	break;
2219	rcStrict2 = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict2);
2220	}
2221
2222	/*
2223	* Get the return code and clean up a little bit.
2224	*/
2225	VBOXSTRICTRC rcStrict3 = pVM->vmm.s.i32RendezvousStatus;
2226	ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
2227
2228	ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
2229	pVCpu->vmm.s.fInRendezvous = false;
2230
2231	/*
2232	* Merge rcStrict, rcStrict2 and rcStrict3.
2233	*/
2234	AssertRC(VBOXSTRICTRC_VAL(rcStrict));
2235	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
2236	if ( rcStrict2 != VINF_SUCCESS
2237	&& ( rcStrict == VINF_SUCCESS
2238	\|\| rcStrict > rcStrict2))
2239	rcStrict = rcStrict2;
2240	if ( rcStrict3 != VINF_SUCCESS
2241	&& ( rcStrict == VINF_SUCCESS
2242	\|\| rcStrict > rcStrict3))
2243	rcStrict = rcStrict3;
2244	Log(("VMMR3EmtRendezvous: %#x EMT#%u returns %Rrc\n", fFlags, pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
2245	}
2246
2247	AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
2248	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
2249	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
2250	VERR_IPE_UNEXPECTED_INFO_STATUS);
2251	return VBOXSTRICTRC_VAL(rcStrict);
2252	}
2253
2254
2255	/**
2256	* Interface for vmR3SetHaltMethodU.
2257	*
2258	* @param pVCpu The cross context virtual CPU structure of the
2259	* calling EMT.
2260	* @param fMayHaltInRing0 The new state.
2261	* @param cNsSpinBlockThreshold The spin-vs-blocking threashold.
2262	* @thread EMT(pVCpu)
2263	*
2264	* @todo Move the EMT handling to VMM (or EM). I soooooo regret that VM
2265	* component.
2266	*/
2267	VMMR3_INT_DECL(void) VMMR3SetMayHaltInRing0(PVMCPU pVCpu, bool fMayHaltInRing0, uint32_t cNsSpinBlockThreshold)
2268	{
2269	LogFlow(("VMMR3SetMayHaltInRing0(#%u, %d, %u)\n", pVCpu->idCpu, fMayHaltInRing0, cNsSpinBlockThreshold));
2270	pVCpu->vmm.s.fMayHaltInRing0 = fMayHaltInRing0;
2271	pVCpu->vmm.s.cNsSpinBlockThreshold = cNsSpinBlockThreshold;
2272	}
2273
2274
2275	/**
2276	* Read from the ring 0 jump buffer stack.
2277	*
2278	* @returns VBox status code.
2279	*
2280	* @param pVM The cross context VM structure.
2281	* @param idCpu The ID of the source CPU context (for the address).
2282	* @param R0Addr Where to start reading.
2283	* @param pvBuf Where to store the data we've read.
2284	* @param cbRead The number of bytes to read.
2285	*/
2286	VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
2287	{
2288	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
2289	AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
2290	AssertReturn(cbRead < ~(size_t)0 / 2, VERR_INVALID_PARAMETER);
2291
2292	int rc;
2293	#ifdef VMM_R0_SWITCH_STACK
2294	RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
2295	#else
2296	RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
2297	#endif
2298	if ( off < VMM_STACK_SIZE
2299	&& off + cbRead <= VMM_STACK_SIZE)
2300	{
2301	memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
2302	rc = VINF_SUCCESS;
2303	}
2304	else
2305	rc = VERR_INVALID_POINTER;
2306
2307	/* Supply the setjmp return RIP/EIP. */
2308	if ( pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation + sizeof(RTR0UINTPTR) > R0Addr
2309	&& pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation < R0Addr + cbRead)
2310	{
2311	uint8_t const pbSrc = (uint8_t const )&pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcValue;
2312	size_t cbSrc = sizeof(pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcValue);
2313	size_t offDst = 0;
2314	if (R0Addr < pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation)
2315	offDst = pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation - R0Addr;
2316	else if (R0Addr > pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation)
2317	{
2318	size_t offSrc = R0Addr - pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation;
2319	Assert(offSrc < cbSrc);
2320	pbSrc -= offSrc;
2321	cbSrc -= offSrc;
2322	}
2323	if (cbSrc > cbRead - offDst)
2324	cbSrc = cbRead - offDst;
2325	memcpy((uint8_t *)pvBuf + offDst, pbSrc, cbSrc);
2326
2327	if (cbSrc == cbRead)
2328	rc = VINF_SUCCESS;
2329	}
2330
2331	return rc;
2332	}
2333
2334
2335	/**
2336	* Used by the DBGF stack unwinder to initialize the register state.
2337	*
2338	* @param pUVM The user mode VM handle.
2339	* @param idCpu The ID of the CPU being unwound.
2340	* @param pState The unwind state to initialize.
2341	*/
2342	VMMR3_INT_DECL(void) VMMR3InitR0StackUnwindState(PUVM pUVM, VMCPUID idCpu, struct RTDBGUNWINDSTATE *pState)
2343	{
2344	PVMCPU pVCpu = VMMR3GetCpuByIdU(pUVM, idCpu);
2345	AssertReturnVoid(pVCpu);
2346
2347	/*
2348	* Locate the resume point on the stack.
2349	*/
2350	#ifdef VMM_R0_SWITCH_STACK
2351	uintptr_t off = pVCpu->vmm.s.CallRing3JmpBufR0.SpResume - MMHyperCCToR0(pVCpu->pVMR3, pVCpu->vmm.s.pbEMTStackR3);
2352	AssertReturnVoid(off < VMM_STACK_SIZE);
2353	#else
2354	uintptr_t off = 0;
2355	#endif
2356
2357	#ifdef RT_ARCH_AMD64
2358	/*
2359	* This code must match the .resume stuff in VMMR0JmpA-amd64.asm exactly.
2360	*/
2361	# ifdef VBOX_STRICT
2362	Assert((uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off] == UINT32_C(0x7eadf00d));
2363	off += 8; /* RESUME_MAGIC */
2364	# endif
2365	# ifdef RT_OS_WINDOWS
2366	off += 0xa0; /* XMM6 thru XMM15 */
2367	# endif
2368	pState->u.x86.uRFlags = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2369	off += 8;
2370	pState->u.x86.auRegs[X86_GREG_xBX] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2371	off += 8;
2372	# ifdef RT_OS_WINDOWS
2373	pState->u.x86.auRegs[X86_GREG_xSI] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2374	off += 8;
2375	pState->u.x86.auRegs[X86_GREG_xDI] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2376	off += 8;
2377	# endif
2378	pState->u.x86.auRegs[X86_GREG_x12] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2379	off += 8;
2380	pState->u.x86.auRegs[X86_GREG_x13] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2381	off += 8;
2382	pState->u.x86.auRegs[X86_GREG_x14] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2383	off += 8;
2384	pState->u.x86.auRegs[X86_GREG_x15] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2385	off += 8;
2386	pState->u.x86.auRegs[X86_GREG_xBP] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2387	off += 8;
2388	pState->uPc = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2389	off += 8;
2390
2391	#elif defined(RT_ARCH_X86)
2392	/*
2393	* This code must match the .resume stuff in VMMR0JmpA-x86.asm exactly.
2394	*/
2395	# ifdef VBOX_STRICT
2396	Assert((uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off] == UINT32_C(0x7eadf00d));
2397	off += 4; /* RESUME_MAGIC */
2398	# endif
2399	pState->u.x86.uRFlags = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2400	off += 4;
2401	pState->u.x86.auRegs[X86_GREG_xBX] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2402	off += 4;
2403	pState->u.x86.auRegs[X86_GREG_xSI] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2404	off += 4;
2405	pState->u.x86.auRegs[X86_GREG_xDI] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2406	off += 4;
2407	pState->u.x86.auRegs[X86_GREG_xBP] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2408	off += 4;
2409	pState->uPc = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2410	off += 4;
2411	#else
2412	# error "Port me"
2413	#endif
2414
2415	/*
2416	* This is all we really need here, though the above helps if the assembly
2417	* doesn't contain unwind info (currently only on win/64, so that is useful).
2418	*/
2419	pState->u.x86.auRegs[X86_GREG_xBP] = pVCpu->vmm.s.CallRing3JmpBufR0.SavedEbp;
2420	pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.CallRing3JmpBufR0.SpResume;
2421	}
2422
2423
2424	/**
2425	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2426	*
2427	* @returns VBox status code.
2428	* @param pVM The cross context VM structure.
2429	* @param uOperation Operation to execute.
2430	* @param u64Arg Constant argument.
2431	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2432	* details.
2433	*/
2434	VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2435	{
2436	PVMCPU pVCpu = VMMGetCpu(pVM);
2437	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
2438	return VMMR3CallR0Emt(pVM, pVCpu, (VMMR0OPERATION)uOperation, u64Arg, pReqHdr);
2439	}
2440
2441
2442	/**
2443	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2444	*
2445	* @returns VBox status code.
2446	* @param pVM The cross context VM structure.
2447	* @param pVCpu The cross context VM structure.
2448	* @param enmOperation Operation to execute.
2449	* @param u64Arg Constant argument.
2450	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2451	* details.
2452	*/
2453	VMMR3_INT_DECL(int) VMMR3CallR0Emt(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2454	{
2455	int rc;
2456	for (;;)
2457	{
2458	#ifdef NO_SUPCALLR0VMM
2459	rc = VERR_GENERAL_FAILURE;
2460	#else
2461	rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, enmOperation, u64Arg, pReqHdr);
2462	#endif
2463	/*
2464	* Flush the logs.
2465	*/
2466	#ifdef LOG_ENABLED
2467	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
2468	#endif
2469	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
2470	if (rc != VINF_VMM_CALL_HOST)
2471	break;
2472	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2473	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
2474	break;
2475	/* Resume R0 */
2476	}
2477
2478	AssertLogRelMsgReturn(rc == VINF_SUCCESS \|\| RT_FAILURE(rc),
2479	("enmOperation=%u rc=%Rrc\n", enmOperation, rc),
2480	VERR_IPE_UNEXPECTED_INFO_STATUS);
2481	return rc;
2482	}
2483
2484
2485	/**
2486	* Service a call to the ring-3 host code.
2487	*
2488	* @returns VBox status code.
2489	* @param pVM The cross context VM structure.
2490	* @param pVCpu The cross context virtual CPU structure.
2491	* @remarks Careful with critsects.
2492	*/
2493	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2494	{
2495	/*
2496	* We must also check for pending critsect exits or else we can deadlock
2497	* when entering other critsects here.
2498	*/
2499	if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PDM_CRITSECT))
2500	PDMCritSectBothFF(pVM, pVCpu);
2501
2502	switch (pVCpu->vmm.s.enmCallRing3Operation)
2503	{
2504	/*
2505	* Grow the PGM pool.
2506	*/
2507	case VMMCALLRING3_PGM_POOL_GROW:
2508	{
2509	pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM, pVCpu);
2510	break;
2511	}
2512
2513	/*
2514	* Maps an page allocation chunk into ring-3 so ring-0 can use it.
2515	*/
2516	case VMMCALLRING3_PGM_MAP_CHUNK:
2517	{
2518	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2519	break;
2520	}
2521
2522	/*
2523	* Allocates more handy pages.
2524	*/
2525	case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2526	{
2527	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2528	break;
2529	}
2530
2531	/*
2532	* Allocates a large page.
2533	*/
2534	case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2535	{
2536	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2537	break;
2538	}
2539
2540	/*
2541	* Signal a ring 0 hypervisor assertion.
2542	* Cancel the longjmp operation that's in progress.
2543	*/
2544	case VMMCALLRING3_VM_R0_ASSERTION:
2545	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2546	pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2547	#ifdef RT_ARCH_X86
2548	pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2549	#else
2550	pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2551	#endif
2552	#ifdef VMM_R0_SWITCH_STACK
2553	(uint64_t )pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2554	#endif
2555	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2556	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2557	return VERR_VMM_RING0_ASSERTION;
2558
2559	default:
2560	AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2561	return VERR_VMM_UNKNOWN_RING3_CALL;
2562	}
2563
2564	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2565	return VINF_SUCCESS;
2566	}
2567
2568
2569	/**
2570	* Displays the Force action Flags.
2571	*
2572	* @param pVM The cross context VM structure.
2573	* @param pHlp The output helpers.
2574	* @param pszArgs The additional arguments (ignored).
2575	*/
2576	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2577	{
2578	int c;
2579	uint32_t f;
2580	NOREF(pszArgs);
2581
2582	#define PRINT_FLAG(prf,flag) do { \
2583	if (f & (prf##flag)) \
2584	{ \
2585	static const char *s_psz = #flag; \
2586	if (!(c % 6)) \
2587	pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2588	else \
2589	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2590	c++; \
2591	f &= ~(prf##flag); \
2592	} \
2593	} while (0)
2594
2595	#define PRINT_GROUP(prf,grp,sfx) do { \
2596	if (f & (prf##grp##sfx)) \
2597	{ \
2598	static const char *s_psz = #grp; \
2599	if (!(c % 5)) \
2600	pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2601	else \
2602	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2603	c++; \
2604	} \
2605	} while (0)
2606
2607	/*
2608	* The global flags.
2609	*/
2610	const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2611	pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2612
2613	/* show the flag mnemonics */
2614	c = 0;
2615	f = fGlobalForcedActions;
2616	PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2617	PRINT_FLAG(VM_FF_,PDM_QUEUES);
2618	PRINT_FLAG(VM_FF_,PDM_DMA);
2619	PRINT_FLAG(VM_FF_,DBGF);
2620	PRINT_FLAG(VM_FF_,REQUEST);
2621	PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2622	PRINT_FLAG(VM_FF_,RESET);
2623	PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2624	PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2625	PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2626	PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2627	PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2628	if (f)
2629	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2630	else
2631	pHlp->pfnPrintf(pHlp, "\n");
2632
2633	/* the groups */
2634	c = 0;
2635	f = fGlobalForcedActions;
2636	PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2637	PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2638	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2639	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2640	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2641	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2642	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2643	PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2644	if (c)
2645	pHlp->pfnPrintf(pHlp, "\n");
2646
2647	/*
2648	* Per CPU flags.
2649	*/
2650	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2651	{
2652	PVMCPU pVCpu = pVM->apCpusR3[i];
2653	const uint64_t fLocalForcedActions = pVCpu->fLocalForcedActions;
2654	pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX64", i, fLocalForcedActions);
2655
2656	/* show the flag mnemonics */
2657	c = 0;
2658	f = fLocalForcedActions;
2659	PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2660	PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2661	PRINT_FLAG(VMCPU_FF_,TIMER);
2662	PRINT_FLAG(VMCPU_FF_,INTERRUPT_NMI);
2663	PRINT_FLAG(VMCPU_FF_,INTERRUPT_SMI);
2664	PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2665	PRINT_FLAG(VMCPU_FF_,UNHALT);
2666	PRINT_FLAG(VMCPU_FF_,IEM);
2667	PRINT_FLAG(VMCPU_FF_,UPDATE_APIC);
2668	PRINT_FLAG(VMCPU_FF_,DBGF);
2669	PRINT_FLAG(VMCPU_FF_,REQUEST);
2670	PRINT_FLAG(VMCPU_FF_,HM_UPDATE_CR3);
2671	PRINT_FLAG(VMCPU_FF_,HM_UPDATE_PAE_PDPES);
2672	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2673	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2674	PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2675	PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2676	PRINT_FLAG(VMCPU_FF_,BLOCK_NMIS);
2677	PRINT_FLAG(VMCPU_FF_,TO_R3);
2678	PRINT_FLAG(VMCPU_FF_,IOM);
2679	if (f)
2680	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX64\n", c ? "," : "", f);
2681	else
2682	pHlp->pfnPrintf(pHlp, "\n");
2683
2684	if (fLocalForcedActions & VMCPU_FF_INHIBIT_INTERRUPTS)
2685	pHlp->pfnPrintf(pHlp, " intr inhibit RIP: %RGp\n", EMGetInhibitInterruptsPC(pVCpu));
2686
2687	/* the groups */
2688	c = 0;
2689	f = fLocalForcedActions;
2690	PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2691	PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2692	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2693	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2694	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2695	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2696	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2697	PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2698	PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
2699	PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2700	if (c)
2701	pHlp->pfnPrintf(pHlp, "\n");
2702	}
2703
2704	#undef PRINT_FLAG
2705	#undef PRINT_GROUP
2706	}
2707

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source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 90997

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