1 | /* $Id: pipe-posix.cpp 26774 2010-02-25 02:30:14Z vboxsync $ */
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2 | /** @file
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3 | * IPRT - Anonymouse Pipes, POSIX Implementation.
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2010 Sun Microsystems, Inc.
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8 | *
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9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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10 | * available from http://www.215389.xyz. This file is free software;
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11 | * you can redistribute it and/or modify it under the terms of the GNU
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12 | * General Public License (GPL) as published by the Free Software
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13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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16 | *
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17 | * The contents of this file may alternatively be used under the terms
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18 | * of the Common Development and Distribution License Version 1.0
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19 | * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
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20 | * VirtualBox OSE distribution, in which case the provisions of the
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21 | * CDDL are applicable instead of those of the GPL.
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22 | *
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23 | * You may elect to license modified versions of this file under the
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24 | * terms and conditions of either the GPL or the CDDL or both.
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25 | *
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26 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
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27 | * Clara, CA 95054 USA or visit http://www.sun.com if you need
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28 | * additional information or have any questions.
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29 | */
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30 |
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31 |
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32 | /*******************************************************************************
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33 | * Header Files *
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34 | *******************************************************************************/
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35 | #include <iprt/pipe.h>
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36 | #include "internal/iprt.h"
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37 |
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38 | #include <iprt/asm.h>
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39 | #include <iprt/assert.h>
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40 | #include <iprt/err.h>
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41 | #include <iprt/mem.h>
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42 | #include <iprt/string.h>
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43 | #include <iprt/thread.h>
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44 | #include "internal/magics.h"
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45 |
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46 | #include <errno.h>
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47 | #include <fcntl.h>
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48 | #include <limits.h>
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49 | #include <unistd.h>
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50 | #include <sys/poll.h>
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51 | #include <signal.h>
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52 |
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53 |
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54 | /*******************************************************************************
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55 | * Structures and Typedefs *
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56 | *******************************************************************************/
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57 | typedef struct RTPIPEINTERNAL
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58 | {
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59 | /** Magic value (RTPIPE_MAGIC). */
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60 | uint32_t u32Magic;
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61 | /** The file descriptor. */
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62 | int fd;
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63 | /** Set if this is the read end, clear if it's the write end. */
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64 | bool fRead;
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65 | /** Atomically operated state variable.
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66 | *
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67 | * - Bits 0 thru 29 - Users of the new mode.
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68 | * - Bit 30 - The pipe mode, set indicates blocking.
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69 | * - Bit 31 - Set when we're switching the mode.
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70 | */
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71 | uint32_t volatile u32State;
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72 | } RTPIPEINTERNAL;
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73 |
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74 |
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75 | /*******************************************************************************
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76 | * Defined Constants And Macros *
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77 | *******************************************************************************/
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78 | /** @name RTPIPEINTERNAL::u32State defines
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79 | * @{ */
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80 | #define RTPIPE_POSIX_BLOCKING UINT32_C(0x40000000)
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81 | #define RTPIPE_POSIX_SWITCHING UINT32_C(0x80000000)
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82 | #define RTPIPE_POSIX_SWITCHING_BIT 31
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83 | #define RTPIPE_POSIX_USERS_MASK UINT32_C(0x3fffffff)
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84 | /** @} */
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85 |
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86 |
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87 | RTDECL(int) RTPipeCreate(PRTPIPE phPipeRead, PRTPIPE phPipeWrite, uint32_t fFlags)
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88 | {
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89 | AssertPtrReturn(phPipeRead, VERR_INVALID_POINTER);
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90 | AssertPtrReturn(phPipeWrite, VERR_INVALID_POINTER);
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91 | AssertReturn(!(fFlags & ~RTPIPE_C_VALID_MASK), VERR_INVALID_PARAMETER);
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92 |
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93 | /*
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94 | * Create the pipe and set the close-on-exec flag if requested.
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95 | */
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96 | int aFds[2] = {-1, -1};
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97 | if (pipe(aFds))
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98 | return RTErrConvertFromErrno(errno);
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99 |
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100 | int rc = VINF_SUCCESS;
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101 | if (!(fFlags & RTPIPE_C_INHERIT_READ))
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102 | {
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103 | if (fcntl(aFds[0], F_SETFD, FD_CLOEXEC))
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104 | rc = RTErrConvertFromErrno(errno);
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105 | }
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106 |
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107 | if (!(fFlags & RTPIPE_C_INHERIT_WRITE))
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108 | {
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109 | if (fcntl(aFds[1], F_SETFD, FD_CLOEXEC))
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110 | rc = RTErrConvertFromErrno(errno);
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111 | }
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112 |
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113 | if (RT_SUCCESS(rc))
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114 | {
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115 | /*
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116 | * Create the two handles.
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117 | */
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118 | RTPIPEINTERNAL *pThisR = (RTPIPEINTERNAL *)RTMemAlloc(sizeof(RTPIPEINTERNAL));
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119 | if (pThisR)
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120 | {
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121 | RTPIPEINTERNAL *pThisW = (RTPIPEINTERNAL *)RTMemAlloc(sizeof(RTPIPEINTERNAL));
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122 | if (pThisW)
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123 | {
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124 | pThisR->u32Magic = RTPIPE_MAGIC;
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125 | pThisW->u32Magic = RTPIPE_MAGIC;
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126 | pThisR->fd = aFds[0];
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127 | pThisW->fd = aFds[1];
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128 | pThisR->fRead = true;
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129 | pThisW->fRead = false;
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130 | pThisR->u32State = RTPIPE_POSIX_BLOCKING;
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131 | pThisW->u32State = RTPIPE_POSIX_BLOCKING;
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132 |
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133 | *phPipeRead = pThisR;
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134 | *phPipeWrite = pThisW;
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135 |
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136 | /*
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137 | * Before we leave, make sure to shut up SIGPIPE.
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138 | */
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139 | signal(SIGPIPE, SIG_IGN);
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140 | return VINF_SUCCESS;
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141 | }
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142 |
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143 | RTMemFree(pThisR);
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144 | }
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145 | }
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146 |
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147 | close(aFds[0]);
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148 | close(aFds[1]);
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149 | return rc;
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150 | }
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151 |
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152 |
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153 | RTDECL(int) RTPipeClose(RTPIPE hPipe)
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154 | {
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155 | RTPIPEINTERNAL *pThis = hPipe;
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156 | if (pThis == NIL_RTPIPE)
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157 | return VINF_SUCCESS;
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158 | AssertPtrReturn(pThis, VERR_INVALID_PARAMETER);
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159 | AssertReturn(pThis->u32Magic == RTPIPE_MAGIC, VERR_INVALID_HANDLE);
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160 |
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161 | /*
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162 | * Do the cleanup.
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163 | */
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164 | AssertReturn(ASMAtomicCmpXchgU32(&pThis->u32Magic, ~RTPIPE_MAGIC, RTPIPE_MAGIC), VERR_INVALID_HANDLE);
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165 |
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166 | int fd = pThis->fd;
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167 | pThis->fd = -1;
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168 | close(fd);
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169 |
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170 | if (ASMAtomicReadU32(&pThis->u32State) & RTPIPE_POSIX_USERS_MASK)
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171 | {
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172 | AssertFailed();
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173 | RTThreadSleep(1);
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174 | }
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175 |
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176 | RTMemFree(pThis);
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177 |
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178 | return VINF_SUCCESS;
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179 | }
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180 |
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181 |
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182 | RTDECL(RTHCINTPTR) RTPipeToNative(RTPIPE hPipe)
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183 | {
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184 | RTPIPEINTERNAL *pThis = hPipe;
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185 | AssertPtrReturn(pThis, (RTHCINTPTR)(unsigned int)-1);
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186 | AssertReturn(pThis->u32Magic == RTPIPE_MAGIC, (RTHCINTPTR)(unsigned int)-1);
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187 |
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188 | return pThis->fd;
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189 | }
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190 |
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191 |
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192 | /**
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193 | * Prepare blocking mode.
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194 | *
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195 | * @returns VINF_SUCCESS
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196 | * @retval VERR_WRONG_ORDER
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197 | * @retval VERR_INTERNAL_ERROR_4
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198 | *
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199 | * @param pThis The pipe handle.
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200 | */
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201 | static int rtPipeTryBlocking(RTPIPEINTERNAL *pThis)
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202 | {
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203 | /*
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204 | * Update the state.
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205 | */
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206 | for (;;)
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207 | {
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208 | uint32_t u32State = ASMAtomicReadU32(&pThis->u32State);
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209 | uint32_t const u32StateOld = u32State;
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210 | uint32_t const cUsers = (u32State & RTPIPE_POSIX_USERS_MASK);
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211 |
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212 | if (u32State & RTPIPE_POSIX_BLOCKING)
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213 | {
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214 | AssertReturn(cUsers < RTPIPE_POSIX_USERS_MASK / 2, VERR_INTERNAL_ERROR_4);
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215 | u32State &= ~RTPIPE_POSIX_USERS_MASK;
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216 | u32State |= cUsers + 1;
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217 | if (ASMAtomicCmpXchgU32(&pThis->u32State, u32State, u32StateOld))
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218 | {
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219 | if (u32State & RTPIPE_POSIX_SWITCHING)
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220 | break;
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221 | return VINF_SUCCESS;
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222 | }
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223 | }
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224 | else if (cUsers == 0)
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225 | {
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226 | u32State = 1 | RTPIPE_POSIX_SWITCHING | RTPIPE_POSIX_BLOCKING;
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227 | if (ASMAtomicCmpXchgU32(&pThis->u32State, u32State, u32StateOld))
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228 | break;
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229 | }
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230 | else
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231 | return VERR_WRONG_ORDER;
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232 | ASMNopPause();
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233 | }
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234 |
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235 | /*
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236 | * Do the switching.
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237 | */
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238 | int fFlags = fcntl(pThis->fd, F_GETFL, 0);
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239 | if (fFlags != -1)
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240 | {
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241 | if ( !(fFlags & O_NONBLOCK)
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242 | || fcntl(pThis->fd, F_SETFL, fFlags & ~O_NONBLOCK) != -1)
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243 | {
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244 | ASMAtomicBitClear(&pThis->u32State, RTPIPE_POSIX_SWITCHING_BIT);
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245 | return VINF_SUCCESS;
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246 | }
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247 | }
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248 |
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249 | ASMAtomicDecU32(&pThis->u32State);
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250 | return RTErrConvertFromErrno(errno);
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251 | }
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252 |
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253 |
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254 | /**
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255 | * Prepare non-blocking mode.
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256 | *
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257 | * @returns VINF_SUCCESS
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258 | * @retval VERR_WRONG_ORDER
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259 | * @retval VERR_INTERNAL_ERROR_4
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260 | *
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261 | * @param pThis The pipe handle.
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262 | */
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263 | static int rtPipeTryNonBlocking(RTPIPEINTERNAL *pThis)
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264 | {
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265 | /*
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266 | * Update the state.
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267 | */
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268 | for (;;)
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269 | {
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270 | uint32_t u32State = ASMAtomicReadU32(&pThis->u32State);
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271 | uint32_t const u32StateOld = u32State;
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272 | uint32_t const cUsers = (u32State & RTPIPE_POSIX_USERS_MASK);
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273 |
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274 | if (!(u32State & RTPIPE_POSIX_BLOCKING))
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275 | {
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276 | AssertReturn(cUsers < RTPIPE_POSIX_USERS_MASK / 2, VERR_INTERNAL_ERROR_4);
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277 | u32State &= ~RTPIPE_POSIX_USERS_MASK;
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278 | u32State |= cUsers + 1;
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279 | if (ASMAtomicCmpXchgU32(&pThis->u32State, u32State, u32StateOld))
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280 | {
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281 | if (u32State & RTPIPE_POSIX_SWITCHING)
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282 | break;
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283 | return VINF_SUCCESS;
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284 | }
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285 | }
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286 | else if (cUsers == 0)
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287 | {
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288 | u32State = 1 | RTPIPE_POSIX_SWITCHING;
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289 | if (ASMAtomicCmpXchgU32(&pThis->u32State, u32State, u32StateOld))
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290 | break;
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291 | }
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292 | else
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293 | return VERR_WRONG_ORDER;
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294 | ASMNopPause();
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295 | }
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296 |
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297 | /*
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298 | * Do the switching.
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299 | */
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300 | int fFlags = fcntl(pThis->fd, F_GETFL, 0);
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301 | if (fFlags != -1)
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302 | {
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303 | if ( (fFlags & O_NONBLOCK)
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304 | || fcntl(pThis->fd, F_SETFL, fFlags | O_NONBLOCK) != -1)
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305 | {
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306 | ASMAtomicBitClear(&pThis->u32State, RTPIPE_POSIX_SWITCHING_BIT);
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307 | return VINF_SUCCESS;
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308 | }
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309 | }
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310 |
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311 | ASMAtomicDecU32(&pThis->u32State);
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312 | return RTErrConvertFromErrno(errno);
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313 | }
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314 |
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315 |
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316 | /**
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317 | * Checks if the read pipe has a HUP condition.
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318 | *
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319 | * @returns true if HUP, false if no.
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320 | * @param pThis The pipe handle (read).
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321 | */
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322 | static bool rtPipePosixHasHup(RTPIPEINTERNAL *pThis)
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323 | {
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324 | Assert(pThis->fRead);
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325 |
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326 | struct pollfd PollFd;
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327 | RT_ZERO(PollFd);
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328 | PollFd.fd = pThis->fd;
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329 | PollFd.events = POLLHUP;
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330 | return poll(&PollFd, 1, 0) >= 1
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331 | && (PollFd.revents & POLLHUP);
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332 | }
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333 |
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334 |
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335 | RTDECL(int) RTPipeRead(RTPIPE hPipe, void *pvBuf, size_t cbToRead, size_t *pcbRead)
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336 | {
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337 | RTPIPEINTERNAL *pThis = hPipe;
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338 | AssertPtrReturn(pThis, VERR_INVALID_HANDLE);
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339 | AssertReturn(pThis->u32Magic == RTPIPE_MAGIC, VERR_INVALID_HANDLE);
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340 | AssertReturn(pThis->fRead, VERR_ACCESS_DENIED);
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341 | AssertPtr(pcbRead);
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342 | AssertPtr(pvBuf);
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343 |
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344 | int rc = rtPipeTryNonBlocking(pThis);
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345 | if (RT_SUCCESS(rc))
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346 | {
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347 | ssize_t cbRead = read(pThis->fd, pvBuf, RT_MIN(cbToRead, SSIZE_MAX));
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348 | if (cbRead >= 0)
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349 | {
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350 | if (cbRead || !cbToRead || !rtPipePosixHasHup(pThis))
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351 | *pcbRead = cbRead;
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352 | else
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353 | rc = VERR_BROKEN_PIPE;
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354 | }
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355 | else if (errno == EAGAIN)
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356 | {
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357 | *pcbRead = 0;
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358 | rc = VINF_TRY_AGAIN;
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359 | }
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360 | else
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361 | rc = RTErrConvertFromErrno(errno);
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362 |
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363 | ASMAtomicDecU32(&pThis->u32State);
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364 | }
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365 | return rc;
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366 | }
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367 |
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368 |
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369 | RTDECL(int) RTPipeReadBlocking(RTPIPE hPipe, void *pvBuf, size_t cbToRead)
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370 | {
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371 | RTPIPEINTERNAL *pThis = hPipe;
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372 | AssertPtrReturn(pThis, VERR_INVALID_HANDLE);
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373 | AssertReturn(pThis->u32Magic == RTPIPE_MAGIC, VERR_INVALID_HANDLE);
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374 | AssertReturn(pThis->fRead, VERR_ACCESS_DENIED);
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375 | AssertPtr(pvBuf);
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376 |
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377 | int rc = rtPipeTryBlocking(pThis);
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378 | if (RT_SUCCESS(rc))
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379 | {
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380 | do
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381 | {
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382 | ssize_t cbRead = read(pThis->fd, pvBuf, RT_MIN(cbToRead, SSIZE_MAX));
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383 | if (cbRead < 0)
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384 | {
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385 | rc = RTErrConvertFromErrno(errno);
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386 | break;
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387 | }
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388 | if (!cbRead && cbToRead > 0 && rtPipePosixHasHup(pThis))
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389 | {
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390 | rc = VERR_BROKEN_PIPE;
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391 | break;
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392 | }
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393 |
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394 | /* advance */
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395 | pvBuf = (char *)pvBuf + cbRead;
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396 | cbToRead -= cbRead;
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397 | } while (cbToRead > 0);
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398 |
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399 | ASMAtomicDecU32(&pThis->u32State);
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400 | }
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401 | return rc;
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402 | }
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403 |
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404 |
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405 | RTDECL(int) RTPipeWrite(RTPIPE hPipe, const void *pvBuf, size_t cbToWrite, size_t *pcbWritten)
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406 | {
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407 | RTPIPEINTERNAL *pThis = hPipe;
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408 | AssertPtrReturn(pThis, VERR_INVALID_HANDLE);
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409 | AssertReturn(pThis->u32Magic == RTPIPE_MAGIC, VERR_INVALID_HANDLE);
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410 | AssertReturn(!pThis->fRead, VERR_ACCESS_DENIED);
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411 | AssertPtr(pcbWritten);
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412 | AssertPtr(pvBuf);
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413 |
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414 | int rc = rtPipeTryNonBlocking(pThis);
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415 | if (RT_SUCCESS(rc))
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416 | {
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417 | ssize_t cbWritten = write(pThis->fd, pvBuf, RT_MIN(cbToWrite, SSIZE_MAX));
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418 | if (cbWritten >= 0)
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419 | *pcbWritten = cbWritten;
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420 | else if (errno == EAGAIN)
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421 | {
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422 | *pcbWritten = 0;;
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423 | rc = VINF_TRY_AGAIN;
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424 | }
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425 | else
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426 | rc = RTErrConvertFromErrno(errno);
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427 |
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428 | ASMAtomicDecU32(&pThis->u32State);
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429 | }
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430 | return rc;
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431 | }
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432 |
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433 |
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434 | RTDECL(int) RTPipeWriteBlocking(RTPIPE hPipe, const void *pvBuf, size_t cbToWrite)
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435 | {
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436 | RTPIPEINTERNAL *pThis = hPipe;
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437 | AssertPtrReturn(pThis, VERR_INVALID_HANDLE);
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438 | AssertReturn(pThis->u32Magic == RTPIPE_MAGIC, VERR_INVALID_HANDLE);
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439 | AssertReturn(!pThis->fRead, VERR_ACCESS_DENIED);
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440 | AssertPtr(pvBuf);
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441 |
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442 | int rc = rtPipeTryBlocking(pThis);
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443 | if (RT_SUCCESS(rc))
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444 | {
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445 | do
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446 | {
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447 | ssize_t cbWritten = write(pThis->fd, pvBuf, RT_MIN(cbToWrite, SSIZE_MAX));
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448 | if (cbWritten < 0)
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449 | {
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450 | rc = RTErrConvertFromErrno(errno);
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451 | break;
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452 | }
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---|
453 |
|
---|
454 | /* advance */
|
---|
455 | pvBuf = (char const *)pvBuf + cbWritten;
|
---|
456 | cbToWrite -= cbWritten;
|
---|
457 | } while (cbToWrite > 0);
|
---|
458 |
|
---|
459 | ASMAtomicDecU32(&pThis->u32State);
|
---|
460 | }
|
---|
461 | return rc;
|
---|
462 | }
|
---|
463 |
|
---|
464 |
|
---|
465 | RTDECL(int) RTPipeFlush(RTPIPE hPipe)
|
---|
466 | {
|
---|
467 | RTPIPEINTERNAL *pThis = hPipe;
|
---|
468 | AssertPtrReturn(pThis, VERR_INVALID_HANDLE);
|
---|
469 | AssertReturn(pThis->u32Magic == RTPIPE_MAGIC, VERR_INVALID_HANDLE);
|
---|
470 | AssertReturn(!pThis->fRead, VERR_ACCESS_DENIED);
|
---|
471 |
|
---|
472 | if (fsync(pThis->fd))
|
---|
473 | return RTErrConvertFromErrno(errno);
|
---|
474 | return VINF_SUCCESS;
|
---|
475 | }
|
---|
476 |
|
---|
477 |
|
---|
478 | RTDECL(int) RTPipeSelectOne(RTPIPE hPipe, RTMSINTERVAL cMillies)
|
---|
479 | {
|
---|
480 | RTPIPEINTERNAL *pThis = hPipe;
|
---|
481 | AssertPtrReturn(pThis, VERR_INVALID_HANDLE);
|
---|
482 | AssertReturn(pThis->u32Magic == RTPIPE_MAGIC, VERR_INVALID_HANDLE);
|
---|
483 |
|
---|
484 | struct pollfd PollFd;
|
---|
485 | RT_ZERO(PollFd);
|
---|
486 | PollFd.fd = pThis->fd;
|
---|
487 | PollFd.events = POLLHUP | POLLERR;
|
---|
488 | if (pThis->fRead)
|
---|
489 | PollFd.events |= POLLIN | POLLPRI;
|
---|
490 | else
|
---|
491 | PollFd.events |= POLLOUT;
|
---|
492 |
|
---|
493 | int timeout;
|
---|
494 | if ( cMillies == RT_INDEFINITE_WAIT
|
---|
495 | || cMillies >= INT_MAX /* lazy bird */)
|
---|
496 | timeout = -1;
|
---|
497 | else
|
---|
498 | timeout = cMillies;
|
---|
499 |
|
---|
500 | int rc = poll(&PollFd, 1, 0);
|
---|
501 | if (rc == -1)
|
---|
502 | return RTErrConvertFromErrno(errno);
|
---|
503 | return rc > 0 ? VINF_SUCCESS : VERR_TIMEOUT;
|
---|
504 | }
|
---|
505 |
|
---|