DevBusLogic.cpp@ 43642

Last change on this file since 43642 was 43642, checked in by vboxsync, 13 years ago
DevBusLogic: Added ISA compatible port I/O and a few commands.
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1	/* $Id: DevBusLogic.cpp 43642 2012-10-15 13:35:04Z vboxsync $ */
2	/** @file
3	* VBox storage devices: BusLogic SCSI host adapter BT-958.
4	*/
5
6	/*
7	* Copyright (C) 2006-2012 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.215389.xyz. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	/* Based on the Multi-Master Ultra SCSI Systems Technical Reference Manual */
19
20	/*******************************************************************************
21	* Header Files *
22	*******************************************************************************/
23
24	#define LOG_GROUP LOG_GROUP_DEV_BUSLOGIC
25	#include <VBox/vmm/pdmdev.h>
26	#include <VBox/vmm/pdmifs.h>
27	#include <VBox/vmm/pdmcritsect.h>
28	#include <VBox/scsi.h>
29	#include <iprt/asm.h>
30	#include <iprt/assert.h>
31	#include <iprt/string.h>
32	#include <iprt/log.h>
33	#ifdef IN_RING3
34	# include <iprt/alloc.h>
35	# include <iprt/memcache.h>
36	# include <iprt/param.h>
37	# include <iprt/uuid.h>
38	#endif
39
40	#include "VBoxSCSI.h"
41	#include "VBoxDD.h"
42
43	/* Maximum number of attached devices the adapter can handle. */
44	#define BUSLOGIC_MAX_DEVICES 16
45
46	/* Maximum number of scatter gather elements this device can handle. */
47	#define BUSLOGIC_MAX_SCATTER_GATHER_LIST_SIZE 128
48
49	/* Size of the command buffer. */
50	#define BUSLOGIC_COMMAND_SIZE_MAX 5
51
52	/* Size of the reply buffer. */
53	#define BUSLOGIC_REPLY_SIZE_MAX 64
54
55	/*
56	* Custom fixed I/O ports for BIOS controller access. Note that these should
57	* not be in the ISA range (below 400h) to avoid conflicts with ISA device
58	* probing. Addresses in the 300h-340h range should be especially avoided.
59	*/
60
61	#define BUSLOGIC_BIOS_IO_PORT 0x330
62
63	/** State saved version. */
64	#define BUSLOGIC_SAVED_STATE_MINOR_VERSION 2
65
66	/** Saved state version before the suspend on error feature was implemented. */
67	#define BUSLOGIC_SAVED_STATE_MINOR_PRE_ERROR_HANDLING 1
68
69	/** The duration of software-initiated reset. Not documented, set to 2 ms. */
70	#define BUSLOGIC_RESET_DURATION_NS (2000*1000)
71
72	/**
73	* State of a device attached to the buslogic host adapter.
74	*
75	* @implements PDMIBASE
76	* @implements PDMISCSIPORT
77	* @implements PDMILEDPORTS
78	*/
79	typedef struct BUSLOGICDEVICE
80	{
81	/** Pointer to the owning buslogic device instance. - R3 pointer */
82	R3PTRTYPE(struct BUSLOGIC *) pBusLogicR3;
83	/** Pointer to the owning buslogic device instance. - R0 pointer */
84	R0PTRTYPE(struct BUSLOGIC *) pBusLogicR0;
85	/** Pointer to the owning buslogic device instance. - RC pointer */
86	RCPTRTYPE(struct BUSLOGIC *) pBusLogicRC;
87
88	/** Flag whether device is present. */
89	bool fPresent;
90	/** LUN of the device. */
91	RTUINT iLUN;
92
93	#if HC_ARCH_BITS == 64
94	uint32_t Alignment0;
95	#endif
96
97	/** Our base interface. */
98	PDMIBASE IBase;
99	/** SCSI port interface. */
100	PDMISCSIPORT ISCSIPort;
101	/** Led interface. */
102	PDMILEDPORTS ILed;
103	/** Pointer to the attached driver's base interface. */
104	R3PTRTYPE(PPDMIBASE) pDrvBase;
105	/** Pointer to the underlying SCSI connector interface. */
106	R3PTRTYPE(PPDMISCSICONNECTOR) pDrvSCSIConnector;
107	/** The status LED state for this device. */
108	PDMLED Led;
109
110	#if HC_ARCH_BITS == 64
111	uint32_t Alignment1;
112	#endif
113
114	/** Number of outstanding tasks on the port. */
115	volatile uint32_t cOutstandingRequests;
116
117	} BUSLOGICDEVICE, *PBUSLOGICDEVICE;
118
119	/*
120	* Commands the BusLogic adapter supports.
121	*/
122	enum BUSLOGICCOMMAND
123	{
124	BUSLOGICCOMMAND_TEST_CMDC_INTERRUPT = 0x00,
125	BUSLOGICCOMMAND_INITIALIZE_MAILBOX = 0x01,
126	BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND = 0x02,
127	BUSLOGICCOMMAND_EXECUTE_BIOS_COMMAND = 0x03,
128	BUSLOGICCOMMAND_INQUIRE_BOARD_ID = 0x04,
129	BUSLOGICCOMMAND_ENABLE_OUTGOING_MAILBOX_AVAILABLE_INTERRUPT = 0x05,
130	BUSLOGICCOMMAND_SET_SCSI_SELECTION_TIMEOUT = 0x06,
131	BUSLOGICCOMMAND_SET_PREEMPT_TIME_ON_BUS = 0x07,
132	BUSLOGICCOMMAND_SET_TIME_OFF_BUS = 0x08,
133	BUSLOGICCOMMAND_SET_BUS_TRANSFER_RATE = 0x09,
134	BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_0_TO_7 = 0x0a,
135	BUSLOGICCOMMAND_INQUIRE_CONFIGURATION = 0x0b,
136	BUSLOGICCOMMAND_ENABLE_TARGET_MODE = 0x0c,
137	BUSLOGICCOMMAND_INQUIRE_SETUP_INFORMATION = 0x0d,
138	BUSLOGICCOMMAND_WRITE_ADAPTER_LOCAL_RAM = 0x1a,
139	BUSLOGICCOMMAND_READ_ADAPTER_LOCAL_RAM = 0x1b,
140	BUSLOGICCOMMAND_WRITE_BUSMASTER_CHIP_FIFO = 0x1c,
141	BUSLOGICCOMMAND_READ_BUSMASTER_CHIP_FIFO = 0x1d,
142	BUSLOGICCOMMAND_ECHO_COMMAND_DATA = 0x1f,
143	BUSLOGICCOMMAND_HOST_ADAPTER_DIAGNOSTIC = 0x20,
144	BUSLOGICCOMMAND_SET_ADAPTER_OPTIONS = 0x21,
145	BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_8_TO_15 = 0x23,
146	BUSLOGICCOMMAND_INQUIRE_TARGET_DEVICES = 0x24,
147	BUSLOGICCOMMAND_DISABLE_HOST_ADAPTER_INTERRUPT = 0x25,
148	BUSLOGICCOMMAND_EXT_BIOS_INFO = 0x28,
149	BUSLOGICCOMMAND_UNLOCK_MAILBOX = 0x29,
150	BUSLOGICCOMMAND_INITIALIZE_EXTENDED_MAILBOX = 0x81,
151	BUSLOGICCOMMAND_EXECUTE_SCSI_COMMAND = 0x83,
152	BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_3RD_LETTER = 0x84,
153	BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_LETTER = 0x85,
154	BUSLOGICCOMMAND_INQUIRE_PCI_HOST_ADAPTER_INFORMATION = 0x86,
155	BUSLOGICCOMMAND_INQUIRE_HOST_ADAPTER_MODEL_NUMBER = 0x8b,
156	BUSLOGICCOMMAND_INQUIRE_SYNCHRONOUS_PERIOD = 0x8c,
157	BUSLOGICCOMMAND_INQUIRE_EXTENDED_SETUP_INFORMATION = 0x8d,
158	BUSLOGICCOMMAND_ENABLE_STRICT_ROUND_ROBIN_MODE = 0x8f,
159	BUSLOGICCOMMAND_STORE_HOST_ADAPTER_LOCAL_RAM = 0x90,
160	BUSLOGICCOMMAND_FETCH_HOST_ADAPTER_LOCAL_RAM = 0x91,
161	BUSLOGICCOMMAND_STORE_LOCAL_DATA_IN_EEPROM = 0x92,
162	BUSLOGICCOMMAND_UPLOAD_AUTO_SCSI_CODE = 0x94,
163	BUSLOGICCOMMAND_MODIFY_IO_ADDRESS = 0x95,
164	BUSLOGICCOMMAND_SET_CCB_FORMAT = 0x96,
165	BUSLOGICCOMMAND_WRITE_INQUIRY_BUFFER = 0x9a,
166	BUSLOGICCOMMAND_READ_INQUIRY_BUFFER = 0x9b,
167	BUSLOGICCOMMAND_FLASH_ROM_UPLOAD_DOWNLOAD = 0xa7,
168	BUSLOGICCOMMAND_READ_SCAM_DATA = 0xa8,
169	BUSLOGICCOMMAND_WRITE_SCAM_DATA = 0xa9
170	} BUSLOGICCOMMAND;
171
172	#pragma pack(1)
173	/**
174	* Auto SCSI structure which is located
175	* in host adapter RAM and contains several
176	* configuration parameters.
177	*/
178	typedef struct AutoSCSIRam
179	{
180	uint8_t aInternalSignature[2];
181	uint8_t cbInformation;
182	uint8_t aHostAdaptertype[6];
183	uint8_t uReserved1;
184	bool fFloppyEnabled: 1;
185	bool fFloppySecondary: 1;
186	bool fLevelSensitiveInterrupt: 1;
187	unsigned char uReserved2: 2;
188	unsigned char uSystemRAMAreForBIOS: 3;
189	unsigned char uDMAChannel: 7;
190	bool fDMAAutoConfiguration: 1;
191	unsigned char uIrqChannel: 7;
192	bool fIrqAutoConfiguration: 1;
193	uint8_t uDMATransferRate;
194	uint8_t uSCSIId;
195	bool fLowByteTerminated: 1;
196	bool fParityCheckingEnabled: 1;
197	bool fHighByteTerminated: 1;
198	bool fNoisyCablingEnvironment: 1;
199	bool fFastSynchronousNeogtiation: 1;
200	bool fBusResetEnabled: 1;
201	bool fReserved3: 1;
202	bool fActiveNegotiationEnabled: 1;
203	uint8_t uBusOnDelay;
204	uint8_t uBusOffDelay;
205	bool fHostAdapterBIOSEnabled: 1;
206	bool fBIOSRedirectionOfInt19: 1;
207	bool fExtendedTranslation: 1;
208	bool fMapRemovableAsFixed: 1;
209	bool fReserved4: 1;
210	bool fBIOSSupportsMoreThan2Drives: 1;
211	bool fBIOSInterruptMode: 1;
212	bool fFlopticalSupport: 1;
213	uint16_t u16DeviceEnabledMask;
214	uint16_t u16WidePermittedMask;
215	uint16_t u16FastPermittedMask;
216	uint16_t u16SynchronousPermittedMask;
217	uint16_t u16DisconnectPermittedMask;
218	uint16_t u16SendStartUnitCommandMask;
219	uint16_t u16IgnoreInBIOSScanMask;
220	unsigned char uPCIInterruptPin: 2;
221	unsigned char uHostAdapterIoPortAddress: 2;
222	bool fStrictRoundRobinMode: 1;
223	bool fVesaBusSpeedGreaterThan33MHz: 1;
224	bool fVesaBurstWrite: 1;
225	bool fVesaBurstRead: 1;
226	uint16_t u16UltraPermittedMask;
227	uint32_t uReserved5;
228	uint8_t uReserved6;
229	uint8_t uAutoSCSIMaximumLUN;
230	bool fReserved7: 1;
231	bool fSCAMDominant: 1;
232	bool fSCAMenabled: 1;
233	bool fSCAMLevel2: 1;
234	unsigned char uReserved8: 4;
235	bool fInt13Extension: 1;
236	bool fReserved9: 1;
237	bool fCDROMBoot: 1;
238	unsigned char uReserved10: 5;
239	unsigned char uBootTargetId: 4;
240	unsigned char uBootChannel: 4;
241	bool fForceBusDeviceScanningOrder: 1;
242	unsigned char uReserved11: 7;
243	uint16_t u16NonTaggedToAlternateLunPermittedMask;
244	uint16_t u16RenegotiateSyncAfterCheckConditionMask;
245	uint8_t aReserved12[10];
246	uint8_t aManufacturingDiagnostic[2];
247	uint16_t u16Checksum;
248	} AutoSCSIRam, *PAutoSCSIRam;
249	AssertCompileSize(AutoSCSIRam, 64);
250	#pragma pack()
251
252	/**
253	* The local Ram.
254	*/
255	typedef union HostAdapterLocalRam
256	{
257	/* Byte view. */
258	uint8_t u8View[256];
259	/* Structured view. */
260	struct
261	{
262	/** Offset 0 - 63 is for BIOS. */
263	uint8_t u8Bios[64];
264	/** Auto SCSI structure. */
265	AutoSCSIRam autoSCSIData;
266	} structured;
267	} HostAdapterLocalRam, *PHostAdapterLocalRam;
268	AssertCompileSize(HostAdapterLocalRam, 256);
269
270	/* Compatible ISA base I/O port addresses. Disabled if zero. */
271	#define NUM_ISA_BASES 8
272	#define MAX_ISA_BASE (NUM_ISA_BASES - 1)
273	#define ISA_BASE_DISABLED 6
274
275	static uint16_t aISABases[NUM_ISA_BASES] = {
276	0x330, 0x334, 0x230, 0x234, 0x130, 0x134, 0, 0
277	};
278
279	/** Pointer to a task state structure. */
280	typedef struct BUSLOGICTASKSTATE *PBUSLOGICTASKSTATE;
281
282	/**
283	* Main BusLogic device state.
284	*
285	* @extends PCIDEVICE
286	* @implements PDMILEDPORTS
287	*/
288	typedef struct BUSLOGIC
289	{
290	/** The PCI device structure. */
291	PCIDEVICE dev;
292	/** Pointer to the device instance - HC ptr */
293	PPDMDEVINSR3 pDevInsR3;
294	/** Pointer to the device instance - R0 ptr */
295	PPDMDEVINSR0 pDevInsR0;
296	/** Pointer to the device instance - RC ptr. */
297	PPDMDEVINSRC pDevInsRC;
298
299	/** Whether R0 is enabled. */
300	bool fR0Enabled;
301	/** Whether RC is enabled. */
302	bool fGCEnabled;
303
304	/** Base address of the I/O ports. */
305	RTIOPORT IOPortBase;
306	/** Base address of the memory mapping. */
307	RTGCPHYS MMIOBase;
308	/** Status register - Readonly. */
309	volatile uint8_t regStatus;
310	/** Interrupt register - Readonly. */
311	volatile uint8_t regInterrupt;
312	/** Geometry register - Readonly. */
313	volatile uint8_t regGeometry;
314	/** Pending (delayed) interrupt. */
315	uint8_t uPendingIntr;
316
317	/** Local RAM for the fetch hostadapter local RAM request.
318	* I don't know how big the buffer really is but the maximum
319	* seems to be 256 bytes because the offset and count field in the command request
320	* are only one byte big.
321	*/
322	HostAdapterLocalRam LocalRam;
323
324	/** Command code the guest issued. */
325	uint8_t uOperationCode;
326	/** Buffer for the command parameters the adapter is currently receiving from the guest.
327	* Size of the largest command which is possible.
328	*/
329	uint8_t aCommandBuffer[BUSLOGIC_COMMAND_SIZE_MAX]; /* Size of the biggest request. */
330	/** Current position in the command buffer. */
331	uint8_t iParameter;
332	/** Parameters left until the command is complete. */
333	uint8_t cbCommandParametersLeft;
334
335	/** Whether we are using the RAM or reply buffer. */
336	bool fUseLocalRam;
337	/** Buffer to store reply data from the controller to the guest. */
338	uint8_t aReplyBuffer[BUSLOGIC_REPLY_SIZE_MAX]; /* Size of the biggest reply. */
339	/** Position in the buffer we are reading next. */
340	uint8_t iReply;
341	/** Bytes left until the reply buffer is empty. */
342	uint8_t cbReplyParametersLeft;
343
344	/** Flag whether IRQs are enabled. */
345	bool fIRQEnabled;
346	/** Flag whether the ISA I/O port range is disabled
347	* to prevent the BIOS to access the device. */
348	bool fISAEnabled; //@todo: unused, to be removed
349	/** Flag whether 24-bit mailboxes are in use (default is 32-bit). */
350	bool fMbxIs24Bit; //@todo: save?
351	/** ISA I/O port base (encoded in FW-compatible format). */
352	uint8_t uISABaseCode;
353
354	/** ISA I/O port base (disabled if zero). */
355	RTIOPORT IOISABase; //@todo: recalculate when restoring state
356	/** Default ISA I/O port base in FW-compatible format. */
357	uint8_t uDefaultISABaseCode;
358
359	/** Number of mailboxes the guest set up. */
360	uint32_t cMailbox;
361
362	#if HC_ARCH_BITS == 64
363	uint32_t Alignment0;
364	#endif
365
366	/** Time when HBA reset was last initiated. */ //@todo: does this need to be saved?
367	uint64_t u64ResetTime;
368	/** Physical base address of the outgoing mailboxes. */
369	RTGCPHYS GCPhysAddrMailboxOutgoingBase;
370	/** Current outgoing mailbox position. */
371	uint32_t uMailboxOutgoingPositionCurrent;
372	/** Number of mailboxes ready. */
373	volatile uint32_t cMailboxesReady;
374	/** Whether a notification to R3 was send. */
375	volatile bool fNotificationSend;
376
377	#if HC_ARCH_BITS == 64
378	uint32_t Alignment1;
379	#endif
380
381	/** Physical base address of the incoming mailboxes. */
382	RTGCPHYS GCPhysAddrMailboxIncomingBase;
383	/** Current incoming mailbox position. */
384	uint32_t uMailboxIncomingPositionCurrent;
385
386	/** Whether strict round robin is enabled. */
387	bool fStrictRoundRobinMode;
388	/** Whether the extended LUN CCB format is enabled for 32 possible logical units. */
389	bool fExtendedLunCCBFormat;
390
391	/** Queue to send tasks to R3. - HC ptr */
392	R3PTRTYPE(PPDMQUEUE) pNotifierQueueR3;
393	/** Queue to send tasks to R3. - HC ptr */
394	R0PTRTYPE(PPDMQUEUE) pNotifierQueueR0;
395	/** Queue to send tasks to R3. - RC ptr */
396	RCPTRTYPE(PPDMQUEUE) pNotifierQueueRC;
397
398	uint32_t Alignment2;
399
400	/** Critical section protecting access to the interrupt status register. */
401	PDMCRITSECT CritSectIntr;
402
403	/** Cache for task states. */
404	R3PTRTYPE(RTMEMCACHE) hTaskCache;
405
406	/** Device state for BIOS access. */
407	VBOXSCSI VBoxSCSI;
408
409	/** BusLogic device states. */
410	BUSLOGICDEVICE aDeviceStates[BUSLOGIC_MAX_DEVICES];
411
412	/** The base interface.
413	* @todo use PDMDEVINS::IBase */
414	PDMIBASE IBase;
415	/** Status Port - Leds interface. */
416	PDMILEDPORTS ILeds;
417	/** Partner of ILeds. */
418	R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;
419
420	#if HC_ARCH_BITS == 64
421	uint32_t Alignment3;
422	#endif
423
424	/** Indicates that PDMDevHlpAsyncNotificationCompleted should be called when
425	* a port is entering the idle state. */
426	bool volatile fSignalIdle;
427	/** Flag whether we have tasks which need to be processed again. */
428	bool volatile fRedo;
429	/** List of tasks which can be redone. */
430	R3PTRTYPE(volatile PBUSLOGICTASKSTATE) pTasksRedoHead;
431
432	#ifdef LOG_ENABLED
433	# if HC_ARCH_BITS == 64
434	uint32_t Alignment4;
435	# endif
436
437	volatile uint32_t cInMailboxesReady;
438	#endif
439
440	} BUSLOGIC, *PBUSLOGIC;
441
442	/** Register offsets in the I/O port space. */
443	#define BUSLOGIC_REGISTER_CONTROL 0 /* Writeonly */
444	/** Fields for the control register. */
445	# define BUSLOGIC_REGISTER_CONTROL_SCSI_BUSRESET RT_BIT(4)
446	# define BUSLOGIC_REGISTER_CONTROL_INTERRUPT_RESET RT_BIT(5)
447	# define BUSLOGIC_REGISTER_CONTROL_SOFT_RESET RT_BIT(6)
448	# define BUSLOGIC_REGISTER_CONTROL_HARD_RESET RT_BIT(7)
449
450	#define BUSLOGIC_REGISTER_STATUS 0 /* Readonly */
451	/** Fields for the status register. */
452	# define BUSLOGIC_REGISTER_STATUS_COMMAND_INVALID RT_BIT(0)
453	# define BUSLOGIC_REGISTER_STATUS_DATA_IN_REGISTER_READY RT_BIT(2)
454	# define BUSLOGIC_REGISTER_STATUS_COMMAND_PARAMETER_REGISTER_BUSY RT_BIT(3)
455	# define BUSLOGIC_REGISTER_STATUS_HOST_ADAPTER_READY RT_BIT(4)
456	# define BUSLOGIC_REGISTER_STATUS_INITIALIZATION_REQUIRED RT_BIT(5)
457	# define BUSLOGIC_REGISTER_STATUS_DIAGNOSTIC_FAILURE RT_BIT(6)
458	# define BUSLOGIC_REGISTER_STATUS_DIAGNOSTIC_ACTIVE RT_BIT(7)
459
460	#define BUSLOGIC_REGISTER_COMMAND 1 /* Writeonly */
461	#define BUSLOGIC_REGISTER_DATAIN 1 /* Readonly */
462	#define BUSLOGIC_REGISTER_INTERRUPT 2 /* Readonly */
463	/** Fields for the interrupt register. */
464	# define BUSLOGIC_REGISTER_INTERRUPT_INCOMING_MAILBOX_LOADED RT_BIT(0)
465	# define BUSLOGIC_REGISTER_INTERRUPT_OUTGOING_MAILBOX_AVAILABLE RT_BIT(1)
466	# define BUSLOGIC_REGISTER_INTERRUPT_COMMAND_COMPLETE RT_BIT(2)
467	# define BUSLOGIC_REGISTER_INTERRUPT_EXTERNAL_BUS_RESET RT_BIT(3)
468	# define BUSLOGIC_REGISTER_INTERRUPT_INTERRUPT_VALID RT_BIT(7)
469
470	#define BUSLOGIC_REGISTER_GEOMETRY 3 /* Readonly */
471	# define BUSLOGIC_REGISTER_GEOMETRY_EXTENTED_TRANSLATION_ENABLED RT_BIT(7)
472
473	/* Structure for the INQUIRE_PCI_HOST_ADAPTER_INFORMATION reply. */
474	typedef struct ReplyInquirePCIHostAdapterInformation
475	{
476	uint8_t IsaIOPort;
477	uint8_t IRQ;
478	unsigned char LowByteTerminated:1;
479	unsigned char HighByteTerminated:1;
480	unsigned char uReserved:2; /* Reserved. */
481	unsigned char JP1:1; /* Whatever that means. */
482	unsigned char JP2:1; /* Whatever that means. */
483	unsigned char JP3:1; /* Whatever that means. */
484	/** Whether the provided info is valid. */
485	unsigned char InformationIsValid: 1;
486	uint8_t uReserved2; /* Reserved. */
487	} ReplyInquirePCIHostAdapterInformation, *PReplyInquirePCIHostAdapterInformation;
488	AssertCompileSize(ReplyInquirePCIHostAdapterInformation, 4);
489
490	/* Structure for the INQUIRE_CONFIGURATION reply. */
491	typedef struct ReplyInquireConfiguration
492	{
493	unsigned char uReserved1: 5;
494	bool fDmaChannel5: 1;
495	bool fDmaChannel6: 1;
496	bool fDmaChannel7: 1;
497	bool fIrqChannel9: 1;
498	bool fIrqChannel10: 1;
499	bool fIrqChannel11: 1;
500	bool fIrqChannel12: 1;
501	unsigned char uReserved2: 1;
502	bool fIrqChannel14: 1;
503	bool fIrqChannel15: 1;
504	unsigned char uReserved3: 1;
505	unsigned char uHostAdapterId: 4;
506	unsigned char uReserved4: 4;
507	} ReplyInquireConfiguration, *PReplyInquireConfiguration;
508	AssertCompileSize(ReplyInquireConfiguration, 3);
509
510	/* Structure for the INQUIRE_SETUP_INFORMATION reply. */
511	typedef struct ReplyInquireSetupInformationSynchronousValue
512	{
513	unsigned char uOffset: 4;
514	unsigned char uTransferPeriod: 3;
515	bool fSynchronous: 1;
516	}ReplyInquireSetupInformationSynchronousValue, *PReplyInquireSetupInformationSynchronousValue;
517	AssertCompileSize(ReplyInquireSetupInformationSynchronousValue, 1);
518
519	typedef struct ReplyInquireSetupInformation
520	{
521	bool fSynchronousInitiationEnabled: 1;
522	bool fParityCheckingEnabled: 1;
523	unsigned char uReserved1: 6;
524	uint8_t uBusTransferRate;
525	uint8_t uPreemptTimeOnBus;
526	uint8_t uTimeOffBus;
527	uint8_t cMailbox;
528	uint8_t MailboxAddress[3];
529	ReplyInquireSetupInformationSynchronousValue SynchronousValuesId0To7[8];
530	uint8_t uDisconnectPermittedId0To7;
531	uint8_t uSignature;
532	uint8_t uCharacterD;
533	uint8_t uHostBusType;
534	uint8_t uWideTransferPermittedId0To7;
535	uint8_t uWideTransfersActiveId0To7;
536	ReplyInquireSetupInformationSynchronousValue SynchronousValuesId8To15[8];
537	uint8_t uDisconnectPermittedId8To15;
538	uint8_t uReserved2;
539	uint8_t uWideTransferPermittedId8To15;
540	uint8_t uWideTransfersActiveId8To15;
541	} ReplyInquireSetupInformation, *PReplyInquireSetupInformation;
542	AssertCompileSize(ReplyInquireSetupInformation, 34);
543
544	/* Structure for the INQUIRE_EXTENDED_SETUP_INFORMATION. */
545	#pragma pack(1)
546	typedef struct ReplyInquireExtendedSetupInformation
547	{
548	uint8_t uBusType;
549	uint8_t uBiosAddress;
550	uint16_t u16ScatterGatherLimit;
551	uint8_t cMailbox;
552	uint32_t uMailboxAddressBase;
553	unsigned char uReserved1: 2;
554	bool fFastEISA: 1;
555	unsigned char uReserved2: 3;
556	bool fLevelSensitiveInterrupt: 1;
557	unsigned char uReserved3: 1;
558	unsigned char aFirmwareRevision[3];
559	bool fHostWideSCSI: 1;
560	bool fHostDifferentialSCSI: 1;
561	bool fHostSupportsSCAM: 1;
562	bool fHostUltraSCSI: 1;
563	bool fHostSmartTermination: 1;
564	unsigned char uReserved4: 3;
565	} ReplyInquireExtendedSetupInformation, *PReplyInquireExtendedSetupInformation;
566	AssertCompileSize(ReplyInquireExtendedSetupInformation, 14);
567	#pragma pack()
568
569	/* Structure for the INITIALIZE EXTENDED MAILBOX request. */
570	#pragma pack(1)
571	typedef struct RequestInitializeExtendedMailbox
572	{
573	/** Number of mailboxes in guest memory. */
574	uint8_t cMailbox;
575	/** Physical address of the first mailbox. */
576	uint32_t uMailboxBaseAddress;
577	} RequestInitializeExtendedMailbox, *PRequestInitializeExtendedMailbox;
578	AssertCompileSize(RequestInitializeExtendedMailbox, 5);
579	#pragma pack()
580
581	/*
582	* Structure of a mailbox in guest memory.
583	* The incoming and outgoing mailbox have the same size
584	* but the incoming one has some more fields defined which
585	* are marked as reserved in the outgoing one.
586	* The last field is also different from the type.
587	* For outgoing mailboxes it is the action and
588	* for incoming ones the completion status code for the task.
589	* We use one structure for both types.
590	*/
591	#pragma pack(1)
592	typedef struct Mailbox
593	{
594	/** Physical address of the CCB structure in the guest memory. */
595	uint32_t u32PhysAddrCCB;
596	/** Type specific data. */
597	union
598	{
599	/** For outgoing mailboxes. */
600	struct
601	{
602	/** Reserved */
603	uint8_t uReserved[3];
604	/** Action code. */
605	uint8_t uActionCode;
606	} out;
607	/** For incoming mailboxes. */
608	struct
609	{
610	/** The host adapter status after finishing the request. */
611	uint8_t uHostAdapterStatus;
612	/** The status of the device which executed the request after executing it. */
613	uint8_t uTargetDeviceStatus;
614	/** Reserved. */
615	uint8_t uReserved;
616	/** The completion status code of the request. */
617	uint8_t uCompletionCode;
618	} in;
619	} u;
620	} Mailbox, *PMailbox;
621	AssertCompileSize(Mailbox, 8);
622	#pragma pack()
623
624	/*
625	* Action codes for outgoing mailboxes.
626	*/
627	enum BUSLOGIC_MAILBOX_OUTGOING_ACTION
628	{
629	BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE = 0x00,
630	BUSLOGIC_MAILBOX_OUTGOING_ACTION_START_COMMAND = 0x01,
631	BUSLOGIC_MAILBOX_OUTGOING_ACTION_ABORT_COMMAND = 0x02
632	};
633
634	/*
635	* Completion codes for incoming mailboxes.
636	*/
637	enum BUSLOGIC_MAILBOX_INCOMING_COMPLETION
638	{
639	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_FREE = 0x00,
640	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITHOUT_ERROR = 0x01,
641	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_ABORTED = 0x02,
642	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_ABORTED_NOT_FOUND = 0x03,
643	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR = 0x04,
644	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_INVALID_CCB = 0x05
645	};
646
647	/*
648	* Host adapter status for incoming mailboxes.
649	*/
650	enum BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS
651	{
652	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_CMD_COMPLETED = 0x00,
653	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_LINKED_CMD_COMPLETED = 0x0a,
654	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_LINKED_CMD_COMPLETED_WITH_FLAG = 0x0b,
655	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_DATA_UNDERUN = 0x0c,
656	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_SELECTION_TIMEOUT = 0x11,
657	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_DATA_OVERRUN = 0x12,
658	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_UNEXPECTED_BUS_FREE = 0x13,
659	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_BUS_PHASE_REQUESTED = 0x14,
660	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_OUTGOING_MAILBOX_ACTION_CODE = 0x15,
661	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_COMMAND_OPERATION_CODE = 0x16,
662	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_LINKED_CCB_HAS_INVALID_LUN = 0x17,
663	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_COMMAND_PARAMETER = 0x1a,
664	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_AUTO_REQUEST_SENSE_FAILED = 0x1b,
665	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_TAGGED_QUEUING_MESSAGE_REJECTED = 0x1c,
666	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_UNSUPPORTED_MESSAGE_RECEIVED = 0x1d,
667	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_HARDWARE_FAILED = 0x20,
668	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_TARGET_FAILED_RESPONSE_TO_ATN = 0x21,
669	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_ASSERTED_RST = 0x22,
670	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_OTHER_DEVICE_ASSERTED_RST = 0x23,
671	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_TARGET_DEVICE_RECONNECTED_IMPROPERLY = 0x24,
672	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_ASSERTED_BUS_DEVICE_RESET = 0x25,
673	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_ABORT_QUEUE_GENERATED = 0x26,
674	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_SOFTWARE_ERROR = 0x27,
675	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_HARDWARE_TIMEOUT_ERROR = 0x30,
676	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_PARITY_ERROR_DETECTED = 0x34
677	};
678
679	/*
680	* Device status codes for incoming mailboxes.
681	*/
682	enum BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS
683	{
684	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD = 0x00,
685	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_CHECK_CONDITION = 0x02,
686	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_DEVICE_BUSY = 0x08
687	};
688
689	/*
690	* Opcode types for CCB.
691	*/
692	enum BUSLOGIC_CCB_OPCODE
693	{
694	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB = 0x00,
695	BUSLOGIC_CCB_OPCODE_TARGET_CCB = 0x01,
696	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_SCATTER_GATHER = 0x02,
697	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH = 0x03,
698	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER = 0x04,
699	BUSLOGIC_CCB_OPCODE_BUS_DEVICE_RESET = 0x81
700	};
701
702	/*
703	* Data transfer direction.
704	*/
705	enum BUSLOGIC_CCB_DIRECTION
706	{
707	BUSLOGIC_CCB_DIRECTION_UNKNOWN = 0x00,
708	BUSLOGIC_CCB_DIRECTION_IN = 0x01,
709	BUSLOGIC_CCB_DIRECTION_OUT = 0x02,
710	BUSLOGIC_CCB_DIRECTION_NO_DATA = 0x03
711	};
712
713	/*
714	* The command control block for a SCSI request.
715	*/
716	#pragma pack(1)
717	typedef struct CommandControlBlock
718	{
719	/** Opcode. */
720	uint8_t uOpcode;
721	/** Reserved */
722	unsigned char uReserved1: 3;
723	/** Data direction for the request. */
724	unsigned char uDataDirection: 2;
725	/** Whether the request is tag queued. */
726	bool fTagQueued: 1;
727	/** Queue tag mode. */
728	unsigned char uQueueTag: 2;
729	/** Length of the SCSI CDB. */
730	uint8_t cbCDB;
731	/** Sense data length. */
732	uint8_t cbSenseData;
733	/** Data length. */
734	uint32_t cbData;
735	/** Data pointer.
736	* This points to the data region or a scatter gather list based on the opcode.
737	*/
738	uint32_t u32PhysAddrData;
739	/** Reserved. */
740	uint8_t uReserved2[2];
741	/** Host adapter status. */
742	uint8_t uHostAdapterStatus;
743	/** Device adapter status. */
744	uint8_t uDeviceStatus;
745	/** The device the request is send to. */
746	uint8_t uTargetId;
747	/*The LUN in the device. /
748	unsigned char uLogicalUnit: 5;
749	/** Legacy tag. */
750	bool fLegacyTagEnable: 1;
751	/** Legacy queue tag. */
752	unsigned char uLegacyQueueTag: 2;
753	/** The SCSI CDB. */
754	uint8_t aCDB[12]; /* A CDB can be 12 bytes long. */
755	/** Reserved. */
756	uint8_t uReserved3[6];
757	/** Sense data pointer. */
758	uint32_t u32PhysAddrSenseData;
759	} CommandControlBlock, *PCommandControlBlock;
760	AssertCompileSize(CommandControlBlock, 40);
761	#pragma pack()
762
763	#pragma pack(1)
764	typedef struct ScatterGatherEntry
765	{
766	uint32_t cbSegment;
767	uint32_t u32PhysAddrSegmentBase;
768	} ScatterGatherEntry, *PScatterGatherEntry;
769	AssertCompileSize(ScatterGatherEntry, 8);
770	#pragma pack()
771
772	/*
773	* Task state for a CCB request.
774	*/
775	typedef struct BUSLOGICTASKSTATE
776	{
777	/** Next in the redo list. */
778	PBUSLOGICTASKSTATE pRedoNext;
779	/** Device this task is assigned to. */
780	R3PTRTYPE(PBUSLOGICDEVICE) pTargetDeviceR3;
781	/** The command control block from the guest. */
782	CommandControlBlock CommandControlBlockGuest;
783	/** Mailbox read from guest memory. */
784	Mailbox MailboxGuest;
785	/** The SCSI request we pass to the underlying SCSI engine. */
786	PDMSCSIREQUEST PDMScsiRequest;
787	/** Data buffer segment */
788	RTSGSEG DataSeg;
789	/** Pointer to the R3 sense buffer. */
790	uint8_t *pbSenseBuffer;
791	/** Flag whether this is a request from the BIOS. */
792	bool fBIOS;
793	} BUSLOGICTASKSTATE;
794
795	#ifndef VBOX_DEVICE_STRUCT_TESTCASE
796
797	#define PDMIBASE_2_PBUSLOGICDEVICE(pInterface) ( (PBUSLOGICDEVICE)((uintptr_t)(pInterface) - RT_OFFSETOF(BUSLOGICDEVICE, IBase)) )
798	#define PDMISCSIPORT_2_PBUSLOGICDEVICE(pInterface) ( (PBUSLOGICDEVICE)((uintptr_t)(pInterface) - RT_OFFSETOF(BUSLOGICDEVICE, ISCSIPort)) )
799	#define PDMILEDPORTS_2_PBUSLOGICDEVICE(pInterface) ( (PBUSLOGICDEVICE)((uintptr_t)(pInterface) - RT_OFFSETOF(BUSLOGICDEVICE, ILed)) )
800	#define PDMIBASE_2_PBUSLOGIC(pInterface) ( (PBUSLOGIC)((uintptr_t)(pInterface) - RT_OFFSETOF(BUSLOGIC, IBase)) )
801	#define PDMILEDPORTS_2_PBUSLOGIC(pInterface) ( (PBUSLOGIC)((uintptr_t)(pInterface) - RT_OFFSETOF(BUSLOGIC, ILeds)) )
802
803	static int buslogicRegisterISARange(PBUSLOGIC pBusLogic, uint8_t uBaseCode);
804
805	/**
806	* Assert IRQ line of the BusLogic adapter.
807	*
808	* @returns nothing.
809	* @param pBusLogic Pointer to the BusLogic device instance.
810	* @param fSuppressIrq Flag to suppress IRQ generation regardless of fIRQEnabled
811	* @param uFlag Type of interrupt being generated.
812	*/
813	static void buslogicSetInterrupt(PBUSLOGIC pBusLogic, bool fSuppressIrq, uint8_t uIrqType)
814	{
815	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
816
817	/* The CMDC interrupt has priority over IMBL and MBOR. */
818	if (uIrqType & (BUSLOGIC_REGISTER_INTERRUPT_INCOMING_MAILBOX_LOADED \| BUSLOGIC_REGISTER_INTERRUPT_OUTGOING_MAILBOX_AVAILABLE))
819	{
820	if (!(pBusLogic->regInterrupt & BUSLOGIC_REGISTER_INTERRUPT_COMMAND_COMPLETE))
821	pBusLogic->regInterrupt \|= uIrqType; /* Report now. */
822	else
823	pBusLogic->uPendingIntr \|= uIrqType; /* Report later. */
824	}
825	else if (uIrqType & BUSLOGIC_REGISTER_INTERRUPT_COMMAND_COMPLETE)
826	{
827	Assert(!pBusLogic->regInterrupt);
828	pBusLogic->regInterrupt \|= uIrqType;
829	}
830	else
831	AssertMsgFailed(("Invalid interrupt state!\n"));
832
833	pBusLogic->regInterrupt \|= BUSLOGIC_REGISTER_INTERRUPT_INTERRUPT_VALID;
834	if (pBusLogic->fIRQEnabled && !fSuppressIrq)
835	PDMDevHlpPCISetIrq(pBusLogic->CTX_SUFF(pDevIns), 0, 1);
836	}
837
838	/**
839	* Deasserts the interrupt line of the BusLogic adapter.
840	*
841	* @returns nothing
842	* @param pBuslogic Pointer to the BusLogic device instance.
843	*/
844	static void buslogicClearInterrupt(PBUSLOGIC pBusLogic)
845	{
846	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
847	pBusLogic->regInterrupt = 0;
848	PDMDevHlpPCISetIrq(pBusLogic->CTX_SUFF(pDevIns), 0, 0);
849	/* If there's another pending interrupt, report it now. */
850	if (pBusLogic->uPendingIntr)
851	{
852	buslogicSetInterrupt(pBusLogic, false, pBusLogic->uPendingIntr);
853	pBusLogic->uPendingIntr = 0;
854	}
855	}
856
857	#if defined(IN_RING3)
858
859	/**
860	* Advances the mailbox pointer to the next slot.
861	*/
862	DECLINLINE(void) buslogicOutgoingMailboxAdvance(PBUSLOGIC pBusLogic)
863	{
864	pBusLogic->uMailboxOutgoingPositionCurrent = (pBusLogic->uMailboxOutgoingPositionCurrent + 1) % pBusLogic->cMailbox;
865	}
866
867	/**
868	* Returns the physical address of the next outgoing mailbox to process.
869	*/
870	DECLINLINE(RTGCPHYS) buslogicOutgoingMailboxGetGCPhys(PBUSLOGIC pBusLogic)
871	{
872	return pBusLogic->GCPhysAddrMailboxOutgoingBase + (pBusLogic->uMailboxOutgoingPositionCurrent * sizeof(Mailbox));
873	}
874
875	/**
876	* Initialize local RAM of host adapter with default values.
877	*
878	* @returns nothing.
879	* @param pBusLogic.
880	*/
881	static void buslogicInitializeLocalRam(PBUSLOGIC pBusLogic)
882	{
883	/*
884	* These values are mostly from what I think is right
885	* looking at the dmesg output from a Linux guest inside
886	* a VMware server VM.
887	*
888	* So they don't have to be right :)
889	*/
890	memset(pBusLogic->LocalRam.u8View, 0, sizeof(HostAdapterLocalRam));
891	pBusLogic->LocalRam.structured.autoSCSIData.fLevelSensitiveInterrupt = true;
892	pBusLogic->LocalRam.structured.autoSCSIData.fParityCheckingEnabled = true;
893	pBusLogic->LocalRam.structured.autoSCSIData.fExtendedTranslation = true; /* Same as in geometry register. */
894	pBusLogic->LocalRam.structured.autoSCSIData.u16DeviceEnabledMask = ~0; /* All enabled. Maybe mask out non present devices? */
895	pBusLogic->LocalRam.structured.autoSCSIData.u16WidePermittedMask = ~0;
896	pBusLogic->LocalRam.structured.autoSCSIData.u16FastPermittedMask = ~0;
897	pBusLogic->LocalRam.structured.autoSCSIData.u16SynchronousPermittedMask = ~0;
898	pBusLogic->LocalRam.structured.autoSCSIData.u16DisconnectPermittedMask = ~0;
899	pBusLogic->LocalRam.structured.autoSCSIData.fStrictRoundRobinMode = pBusLogic->fStrictRoundRobinMode;
900	pBusLogic->LocalRam.structured.autoSCSIData.u16UltraPermittedMask = ~0;
901	/* @todo calculate checksum? */
902	}
903
904	/**
905	* Do a hardware reset of the buslogic adapter.
906	*
907	* @returns VBox status code.
908	* @param pBusLogic Pointer to the BusLogic device instance.
909	* @param fResetIO Flag determining whether ISA I/O should be reset.
910	*/
911	static int buslogicHwReset(PBUSLOGIC pBusLogic, bool fResetIO)
912	{
913	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
914
915	/* Reset registers to default value. */
916	pBusLogic->regStatus = BUSLOGIC_REGISTER_STATUS_HOST_ADAPTER_READY \| BUSLOGIC_REGISTER_STATUS_INITIALIZATION_REQUIRED;
917	pBusLogic->regInterrupt = 0;
918	pBusLogic->uPendingIntr = 0;
919	pBusLogic->regGeometry = BUSLOGIC_REGISTER_GEOMETRY_EXTENTED_TRANSLATION_ENABLED;
920	pBusLogic->uOperationCode = 0xff; /* No command executing. */
921	pBusLogic->iParameter = 0;
922	pBusLogic->cbCommandParametersLeft = 0;
923	pBusLogic->fIRQEnabled = true;
924	pBusLogic->uMailboxOutgoingPositionCurrent = 0;
925	pBusLogic->uMailboxIncomingPositionCurrent = 0;
926
927	/* Guest-initiated HBA reset does not affect ISA port I/O. */
928	if (fResetIO)
929	{
930	buslogicRegisterISARange(pBusLogic, pBusLogic->uDefaultISABaseCode);
931	}
932	buslogicInitializeLocalRam(pBusLogic);
933	vboxscsiInitialize(&pBusLogic->VBoxSCSI);
934
935	return VINF_SUCCESS;
936	}
937	#endif
938
939	/**
940	* Resets the command state machine for the next command and notifies the guest.
941	*
942	* @returns nothing.
943	* @param pBusLogic Pointer to the BusLogic device instance
944	* @param fSuppressIrq Flag to suppress IRQ generation regardless of current state
945	*/
946	static void buslogicCommandComplete(PBUSLOGIC pBusLogic, bool fSuppressIrq)
947	{
948	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
949
950	pBusLogic->fUseLocalRam = false;
951	pBusLogic->regStatus \|= BUSLOGIC_REGISTER_STATUS_HOST_ADAPTER_READY;
952	pBusLogic->iReply = 0;
953
954	/* Modify I/O address does not generate an interrupt. */
955	if (pBusLogic->uOperationCode != BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND)
956	{
957	/* Notify that the command is complete. */
958	pBusLogic->regStatus &= ~BUSLOGIC_REGISTER_STATUS_DATA_IN_REGISTER_READY;
959	buslogicSetInterrupt(pBusLogic, fSuppressIrq, BUSLOGIC_REGISTER_INTERRUPT_COMMAND_COMPLETE);
960	}
961
962	pBusLogic->uOperationCode = 0xff;
963	pBusLogic->iParameter = 0;
964	}
965
966	#if defined(IN_RING3)
967	/**
968	* Initiates a hard reset which was issued from the guest.
969	*
970	* @returns nothing
971	* @param pBusLogic Pointer to the BusLogic device instance.
972	*/
973	static void buslogicIntiateHardReset(PBUSLOGIC pBusLogic)
974	{
975	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
976
977	/* Remember when the guest initiated a reset. */
978	pBusLogic->u64ResetTime = PDMDevHlpTMTimeVirtGetNano(pBusLogic->CTX_SUFF(pDevIns));
979
980	buslogicHwReset(pBusLogic, false);
981
982	/* We set the diagnostic active in the status register. */
983	pBusLogic->regStatus \|= BUSLOGIC_REGISTER_STATUS_DIAGNOSTIC_ACTIVE;
984	}
985
986	/**
987	* Send a mailbox with set status codes to the guest.
988	*
989	* @returns nothing.
990	* @param pBusLogic Pointer to the BusLogic device instance.
991	* @param pTaskState Pointer to the task state with the mailbox to send.
992	* @param uHostAdapterStatus The host adapter status code to set.
993	* @param uDeviceStatus The target device status to set.
994	* @param uMailboxCompletionCode Completion status code to set in the mailbox.
995	*/
996	static void buslogicSendIncomingMailbox(PBUSLOGIC pBusLogic, PBUSLOGICTASKSTATE pTaskState,
997	uint8_t uHostAdapterStatus, uint8_t uDeviceStatus,
998	uint8_t uMailboxCompletionCode)
999	{
1000	pTaskState->MailboxGuest.u.in.uHostAdapterStatus = uHostAdapterStatus;
1001	pTaskState->MailboxGuest.u.in.uTargetDeviceStatus = uDeviceStatus;
1002	pTaskState->MailboxGuest.u.in.uCompletionCode = uMailboxCompletionCode;
1003
1004	int rc = PDMCritSectEnter(&pBusLogic->CritSectIntr, VINF_SUCCESS);
1005	AssertRC(rc);
1006	RTGCPHYS GCPhysAddrMailboxIncoming = pBusLogic->GCPhysAddrMailboxIncomingBase + (pBusLogic->uMailboxIncomingPositionCurrent * sizeof(Mailbox));
1007	RTGCPHYS GCPhysAddrCCB = (RTGCPHYS)pTaskState->MailboxGuest.u32PhysAddrCCB;
1008
1009	LogFlowFunc(("Completing CCB %RGp\n", GCPhysAddrCCB));
1010
1011	/* Update CCB. */
1012	pTaskState->CommandControlBlockGuest.uHostAdapterStatus = uHostAdapterStatus;
1013	pTaskState->CommandControlBlockGuest.uDeviceStatus = uDeviceStatus;
1014	/* @todo: this is wrong - writing too much! */
1015	PDMDevHlpPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrCCB, &pTaskState->CommandControlBlockGuest, sizeof(CommandControlBlock));
1016
1017	#ifdef RT_STRICT
1018	Mailbox Tmp;
1019	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxIncoming, &Tmp, sizeof(Mailbox));
1020	Assert(Tmp.u.in.uCompletionCode == BUSLOGIC_MAILBOX_INCOMING_COMPLETION_FREE);
1021	#endif
1022
1023	/* Update mailbox. */
1024	PDMDevHlpPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxIncoming, &pTaskState->MailboxGuest, sizeof(Mailbox));
1025
1026	/* Advance to next mailbox position. */
1027	pBusLogic->uMailboxIncomingPositionCurrent++;
1028	if (pBusLogic->uMailboxIncomingPositionCurrent >= pBusLogic->cMailbox)
1029	pBusLogic->uMailboxIncomingPositionCurrent = 0;
1030
1031	#ifdef LOG_ENABLED
1032	ASMAtomicIncU32(&pBusLogic->cInMailboxesReady);
1033	#endif
1034
1035	buslogicSetInterrupt(pBusLogic, false, BUSLOGIC_REGISTER_INTERRUPT_INCOMING_MAILBOX_LOADED);
1036
1037	PDMCritSectLeave(&pBusLogic->CritSectIntr);
1038	}
1039
1040	#if defined(DEBUG)
1041	/**
1042	* Dumps the content of a mailbox for debugging purposes.
1043	*
1044	* @return nothing
1045	* @param pMailbox The mailbox to dump.
1046	* @param fOutgoing true if dumping the outgoing state.
1047	* false if dumping the incoming state.
1048	*/
1049	static void buslogicDumpMailboxInfo(PMailbox pMailbox, bool fOutgoing)
1050	{
1051	Log(("%s: Dump for %s mailbox:\n", __FUNCTION__, fOutgoing ? "outgoing" : "incoming"));
1052	Log(("%s: u32PhysAddrCCB=%#x\n", __FUNCTION__, pMailbox->u32PhysAddrCCB));
1053	if (fOutgoing)
1054	{
1055	Log(("%s: uActionCode=%u\n", __FUNCTION__, pMailbox->u.out.uActionCode));
1056	}
1057	else
1058	{
1059	Log(("%s: uHostAdapterStatus=%u\n", __FUNCTION__, pMailbox->u.in.uHostAdapterStatus));
1060	Log(("%s: uTargetDeviceStatus=%u\n", __FUNCTION__, pMailbox->u.in.uTargetDeviceStatus));
1061	Log(("%s: uCompletionCode=%u\n", __FUNCTION__, pMailbox->u.in.uCompletionCode));
1062	}
1063	}
1064
1065	/**
1066	* Dumps the content of a command control block for debugging purposes.
1067	*
1068	* @returns nothing.
1069	* @param pCCB Pointer to the command control block to dump.
1070	*/
1071	static void buslogicDumpCCBInfo(PCommandControlBlock pCCB)
1072	{
1073	Log(("%s: Dump for Command Control Block:\n", __FUNCTION__));
1074	Log(("%s: uOpCode=%#x\n", __FUNCTION__, pCCB->uOpcode));
1075	Log(("%s: uDataDirection=%u\n", __FUNCTION__, pCCB->uDataDirection));
1076	Log(("%s: fTagQueued=%d\n", __FUNCTION__, pCCB->fTagQueued));
1077	Log(("%s: uQueueTag=%u\n", __FUNCTION__, pCCB->uQueueTag));
1078	Log(("%s: cbCDB=%u\n", __FUNCTION__, pCCB->cbCDB));
1079	Log(("%s: cbSenseData=%u\n", __FUNCTION__, pCCB->cbSenseData));
1080	Log(("%s: cbData=%u\n", __FUNCTION__, pCCB->cbData));
1081	Log(("%s: u32PhysAddrData=%#x\n", __FUNCTION__, pCCB->u32PhysAddrData));
1082	Log(("%s: uHostAdapterStatus=%u\n", __FUNCTION__, pCCB->uHostAdapterStatus));
1083	Log(("%s: uDeviceStatus=%u\n", __FUNCTION__, pCCB->uDeviceStatus));
1084	Log(("%s: uTargetId=%u\n", __FUNCTION__, pCCB->uTargetId));
1085	Log(("%s: uLogicalUnit=%u\n", __FUNCTION__, pCCB->uLogicalUnit));
1086	Log(("%s: fLegacyTagEnable=%u\n", __FUNCTION__, pCCB->fLegacyTagEnable));
1087	Log(("%s: uLegacyQueueTag=%u\n", __FUNCTION__, pCCB->uLegacyQueueTag));
1088	Log(("%s: uCDB[0]=%#x\n", __FUNCTION__, pCCB->aCDB[0]));
1089	for (int i = 1; i < pCCB->cbCDB; i++)
1090	Log(("%s: uCDB[%d]=%u\n", __FUNCTION__, i, pCCB->aCDB[i]));
1091	Log(("%s: u32PhysAddrSenseData=%#x\n", __FUNCTION__, pCCB->u32PhysAddrSenseData));
1092	}
1093	#endif
1094
1095	/**
1096	* Allocate data buffer.
1097	*
1098	* @returns VBox status code.
1099	* @param pTaskState Pointer to the task state.
1100	*/
1101	static int buslogicDataBufferAlloc(PBUSLOGICTASKSTATE pTaskState)
1102	{
1103	PPDMDEVINS pDevIns = pTaskState->CTX_SUFF(pTargetDevice)->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
1104
1105	if ( (pTaskState->CommandControlBlockGuest.uDataDirection != BUSLOGIC_CCB_DIRECTION_NO_DATA)
1106	&& (pTaskState->CommandControlBlockGuest.cbData > 0))
1107	{
1108	/*
1109	* @todo: Check following assumption and what residual means.
1110	*
1111	* The BusLogic adapter can handle two different data buffer formats.
1112	* The first one is that the data pointer entry in the CCB points to
1113	* the buffer directly. In second mode the data pointer points to a
1114	* scatter gather list which describes the buffer.
1115	*/
1116	if ( (pTaskState->CommandControlBlockGuest.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_SCATTER_GATHER)
1117	\|\| (pTaskState->CommandControlBlockGuest.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER))
1118	{
1119	uint32_t cScatterGatherGCRead;
1120	uint32_t iScatterGatherEntry;
1121	ScatterGatherEntry aScatterGatherReadGC[32]; /* Number of scatter gather list entries read from guest memory. */
1122	uint32_t cScatterGatherGCLeft = pTaskState->CommandControlBlockGuest.cbData / sizeof(ScatterGatherEntry);
1123	RTGCPHYS GCPhysAddrScatterGatherCurrent = (RTGCPHYS)pTaskState->CommandControlBlockGuest.u32PhysAddrData;
1124	size_t cbDataToTransfer = 0;
1125
1126	/* Count number of bytes to transfer. */
1127	do
1128	{
1129	cScatterGatherGCRead = (cScatterGatherGCLeft < RT_ELEMENTS(aScatterGatherReadGC))
1130	? cScatterGatherGCLeft
1131	: RT_ELEMENTS(aScatterGatherReadGC);
1132	cScatterGatherGCLeft -= cScatterGatherGCRead;
1133
1134	/* Read the SG entries. */
1135	PDMDevHlpPhysRead(pDevIns, GCPhysAddrScatterGatherCurrent, &aScatterGatherReadGC[0],
1136	cScatterGatherGCRead * sizeof(ScatterGatherEntry));
1137
1138	for (iScatterGatherEntry = 0; iScatterGatherEntry < cScatterGatherGCRead; iScatterGatherEntry++)
1139	{
1140	RTGCPHYS GCPhysAddrDataBase;
1141
1142	Log(("%s: iScatterGatherEntry=%u\n", __FUNCTION__, iScatterGatherEntry));
1143
1144	GCPhysAddrDataBase = (RTGCPHYS)aScatterGatherReadGC[iScatterGatherEntry].u32PhysAddrSegmentBase;
1145	cbDataToTransfer += aScatterGatherReadGC[iScatterGatherEntry].cbSegment;
1146
1147	Log(("%s: GCPhysAddrDataBase=%RGp cbDataToTransfer=%u\n",
1148	__FUNCTION__, GCPhysAddrDataBase,
1149	aScatterGatherReadGC[iScatterGatherEntry].cbSegment));
1150	}
1151
1152	/* Set address to the next entries to read. */
1153	GCPhysAddrScatterGatherCurrent += cScatterGatherGCRead * sizeof(ScatterGatherEntry);
1154	} while (cScatterGatherGCLeft > 0);
1155
1156	Log(("%s: cbDataToTransfer=%d\n", __FUNCTION__, cbDataToTransfer));
1157
1158	/* Allocate buffer */
1159	pTaskState->DataSeg.cbSeg = cbDataToTransfer;
1160	pTaskState->DataSeg.pvSeg = RTMemAlloc(pTaskState->DataSeg.cbSeg);
1161	if (!pTaskState->DataSeg.pvSeg)
1162	return VERR_NO_MEMORY;
1163
1164	/* Copy the data if needed */
1165	if (pTaskState->CommandControlBlockGuest.uDataDirection == BUSLOGIC_CCB_DIRECTION_OUT)
1166	{
1167	cScatterGatherGCLeft = pTaskState->CommandControlBlockGuest.cbData / sizeof(ScatterGatherEntry);
1168	GCPhysAddrScatterGatherCurrent = (RTGCPHYS)pTaskState->CommandControlBlockGuest.u32PhysAddrData;
1169	uint8_t pbData = (uint8_t )pTaskState->DataSeg.pvSeg;
1170
1171	do
1172	{
1173	cScatterGatherGCRead = (cScatterGatherGCLeft < RT_ELEMENTS(aScatterGatherReadGC))
1174	? cScatterGatherGCLeft
1175	: RT_ELEMENTS(aScatterGatherReadGC);
1176	cScatterGatherGCLeft -= cScatterGatherGCRead;
1177
1178	/* Read the SG entries. */
1179	PDMDevHlpPhysRead(pDevIns, GCPhysAddrScatterGatherCurrent, &aScatterGatherReadGC[0],
1180	cScatterGatherGCRead * sizeof(ScatterGatherEntry));
1181
1182	for (iScatterGatherEntry = 0; iScatterGatherEntry < cScatterGatherGCRead; iScatterGatherEntry++)
1183	{
1184	RTGCPHYS GCPhysAddrDataBase;
1185
1186	Log(("%s: iScatterGatherEntry=%u\n", __FUNCTION__, iScatterGatherEntry));
1187
1188	GCPhysAddrDataBase = (RTGCPHYS)aScatterGatherReadGC[iScatterGatherEntry].u32PhysAddrSegmentBase;
1189	cbDataToTransfer = aScatterGatherReadGC[iScatterGatherEntry].cbSegment;
1190
1191	Log(("%s: GCPhysAddrDataBase=%RGp cbDataToTransfer=%u\n", __FUNCTION__, GCPhysAddrDataBase, cbDataToTransfer));
1192
1193	PDMDevHlpPhysRead(pDevIns, GCPhysAddrDataBase, pbData, cbDataToTransfer);
1194	pbData += cbDataToTransfer;
1195	}
1196
1197	/* Set address to the next entries to read. */
1198	GCPhysAddrScatterGatherCurrent += cScatterGatherGCRead * sizeof(ScatterGatherEntry);
1199	} while (cScatterGatherGCLeft > 0);
1200	}
1201
1202	}
1203	else if ( pTaskState->CommandControlBlockGuest.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB
1204	\|\| pTaskState->CommandControlBlockGuest.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH)
1205	{
1206	/* The buffer is not scattered. */
1207	RTGCPHYS GCPhysAddrDataBase = (RTGCPHYS)pTaskState->CommandControlBlockGuest.u32PhysAddrData;
1208
1209	AssertMsg(GCPhysAddrDataBase != 0, ("Physical address is 0\n"));
1210
1211	pTaskState->DataSeg.cbSeg = pTaskState->CommandControlBlockGuest.cbData;
1212	pTaskState->DataSeg.pvSeg = RTMemAlloc(pTaskState->DataSeg.cbSeg);
1213	if (!pTaskState->DataSeg.pvSeg)
1214	return VERR_NO_MEMORY;
1215
1216	Log(("Non scattered buffer:\n"));
1217	Log(("u32PhysAddrData=%#x\n", pTaskState->CommandControlBlockGuest.u32PhysAddrData));
1218	Log(("cbData=%u\n", pTaskState->CommandControlBlockGuest.cbData));
1219	Log(("GCPhysAddrDataBase=0x%RGp\n", GCPhysAddrDataBase));
1220
1221	/* Copy the data into the buffer. */
1222	PDMDevHlpPhysRead(pDevIns, GCPhysAddrDataBase, pTaskState->DataSeg.pvSeg, pTaskState->DataSeg.cbSeg);
1223	}
1224	}
1225
1226	return VINF_SUCCESS;
1227	}
1228
1229	/**
1230	* Free allocated resources used for the scatter gather list.
1231	*
1232	* @returns nothing.
1233	* @param pTaskState Pointer to the task state.
1234	*/
1235	static void buslogicDataBufferFree(PBUSLOGICTASKSTATE pTaskState)
1236	{
1237	PPDMDEVINS pDevIns = pTaskState->CTX_SUFF(pTargetDevice)->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
1238
1239	if ( (pTaskState->CommandControlBlockGuest.cbData > 0)
1240	&& ( (pTaskState->CommandControlBlockGuest.uDataDirection == BUSLOGIC_CCB_DIRECTION_IN)
1241	\|\| (pTaskState->CommandControlBlockGuest.uDataDirection == BUSLOGIC_CCB_DIRECTION_UNKNOWN)))
1242	{
1243	if ( (pTaskState->CommandControlBlockGuest.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_SCATTER_GATHER)
1244	\|\| (pTaskState->CommandControlBlockGuest.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER))
1245	{
1246	uint32_t cScatterGatherGCRead;
1247	uint32_t iScatterGatherEntry;
1248	ScatterGatherEntry aScatterGatherReadGC[32]; /* Number of scatter gather list entries read from guest memory. */
1249	uint32_t cScatterGatherGCLeft = pTaskState->CommandControlBlockGuest.cbData / sizeof(ScatterGatherEntry);
1250	RTGCPHYS GCPhysAddrScatterGatherCurrent = (RTGCPHYS)pTaskState->CommandControlBlockGuest.u32PhysAddrData;
1251	uint8_t pbData = (uint8_t )pTaskState->DataSeg.pvSeg;
1252
1253	do
1254	{
1255	cScatterGatherGCRead = (cScatterGatherGCLeft < RT_ELEMENTS(aScatterGatherReadGC))
1256	? cScatterGatherGCLeft
1257	: RT_ELEMENTS(aScatterGatherReadGC);
1258	cScatterGatherGCLeft -= cScatterGatherGCRead;
1259
1260	/* Read the SG entries. */
1261	PDMDevHlpPhysRead(pDevIns, GCPhysAddrScatterGatherCurrent, &aScatterGatherReadGC[0],
1262	cScatterGatherGCRead * sizeof(ScatterGatherEntry));
1263
1264	for (iScatterGatherEntry = 0; iScatterGatherEntry < cScatterGatherGCRead; iScatterGatherEntry++)
1265	{
1266	RTGCPHYS GCPhysAddrDataBase;
1267	size_t cbDataToTransfer;
1268
1269	Log(("%s: iScatterGatherEntry=%u\n", __FUNCTION__, iScatterGatherEntry));
1270
1271	GCPhysAddrDataBase = (RTGCPHYS)aScatterGatherReadGC[iScatterGatherEntry].u32PhysAddrSegmentBase;
1272	cbDataToTransfer = aScatterGatherReadGC[iScatterGatherEntry].cbSegment;
1273
1274	Log(("%s: GCPhysAddrDataBase=%RGp cbDataToTransfer=%u\n", __FUNCTION__, GCPhysAddrDataBase, cbDataToTransfer));
1275
1276	PDMDevHlpPhysWrite(pDevIns, GCPhysAddrDataBase, pbData, cbDataToTransfer);
1277	pbData += cbDataToTransfer;
1278	}
1279
1280	/* Set address to the next entries to read. */
1281	GCPhysAddrScatterGatherCurrent += cScatterGatherGCRead * sizeof(ScatterGatherEntry);
1282	} while (cScatterGatherGCLeft > 0);
1283
1284	}
1285	else if ( pTaskState->CommandControlBlockGuest.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB
1286	\|\| pTaskState->CommandControlBlockGuest.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH)
1287	{
1288	/* The buffer is not scattered. */
1289	RTGCPHYS GCPhysAddrDataBase = (RTGCPHYS)pTaskState->CommandControlBlockGuest.u32PhysAddrData;
1290
1291	AssertMsg(GCPhysAddrDataBase != 0, ("Physical address is 0\n"));
1292
1293	Log(("Non scattered buffer:\n"));
1294	Log(("u32PhysAddrData=%#x\n", pTaskState->CommandControlBlockGuest.u32PhysAddrData));
1295	Log(("cbData=%u\n", pTaskState->CommandControlBlockGuest.cbData));
1296	Log(("GCPhysAddrDataBase=0x%RGp\n", GCPhysAddrDataBase));
1297
1298	/* Copy the data into the guest memory. */
1299	PDMDevHlpPhysWrite(pDevIns, GCPhysAddrDataBase, pTaskState->DataSeg.pvSeg, pTaskState->DataSeg.cbSeg);
1300	}
1301	}
1302
1303	RTMemFree(pTaskState->DataSeg.pvSeg);
1304	pTaskState->DataSeg.pvSeg = NULL;
1305	pTaskState->DataSeg.cbSeg = 0;
1306	}
1307
1308	/**
1309	* Free the sense buffer.
1310	*
1311	* @returns nothing.
1312	* @param pTaskState Pointer to the task state.
1313	* @param fCopy If sense data should be copied to guest memory.
1314	*/
1315	static void buslogicSenseBufferFree(PBUSLOGICTASKSTATE pTaskState, bool fCopy)
1316	{
1317	PPDMDEVINS pDevIns = pTaskState->CTX_SUFF(pTargetDevice)->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
1318	RTGCPHYS GCPhysAddrSenseBuffer = (RTGCPHYS)pTaskState->CommandControlBlockGuest.u32PhysAddrSenseData;
1319	uint32_t cbSenseBuffer = pTaskState->CommandControlBlockGuest.cbSenseData;
1320
1321	/* Copy into guest memory. */
1322	if (fCopy)
1323	PDMDevHlpPhysWrite(pDevIns, GCPhysAddrSenseBuffer, pTaskState->pbSenseBuffer, cbSenseBuffer);
1324
1325	RTMemFree(pTaskState->pbSenseBuffer);
1326	pTaskState->pbSenseBuffer = NULL;
1327	}
1328
1329	/**
1330	* Alloc the sense buffer.
1331	*
1332	* @returns VBox status code.
1333	* @param pTaskState Pointer to the task state.
1334	* @note Current assumption is that the sense buffer is not scattered and does not cross a page boundary.
1335	*/
1336	static int buslogicSenseBufferAlloc(PBUSLOGICTASKSTATE pTaskState)
1337	{
1338	PPDMDEVINS pDevIns = pTaskState->CTX_SUFF(pTargetDevice)->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
1339	uint32_t cbSenseBuffer = pTaskState->CommandControlBlockGuest.cbSenseData;
1340
1341	pTaskState->pbSenseBuffer = (uint8_t *)RTMemAllocZ(cbSenseBuffer);
1342	if (!pTaskState->pbSenseBuffer)
1343	return VERR_NO_MEMORY;
1344
1345	return VINF_SUCCESS;
1346	}
1347	#endif /* IN_RING3 */
1348
1349	/**
1350	* Parses the command buffer and executes it.
1351	*
1352	* @returns VBox status code.
1353	* @param pBusLogic Pointer to the BusLogic device instance.
1354	*/
1355	static int buslogicProcessCommand(PBUSLOGIC pBusLogic)
1356	{
1357	int rc = VINF_SUCCESS;
1358	bool fSuppressIrq = false;
1359
1360	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
1361	AssertMsg(pBusLogic->uOperationCode != 0xff, ("There is no command to execute\n"));
1362
1363	switch (pBusLogic->uOperationCode)
1364	{
1365	case BUSLOGICCOMMAND_TEST_CMDC_INTERRUPT:
1366	/* Valid command, no reply. */
1367	pBusLogic->cbReplyParametersLeft = 0;
1368	break;
1369	case BUSLOGICCOMMAND_INQUIRE_PCI_HOST_ADAPTER_INFORMATION:
1370	{
1371	PReplyInquirePCIHostAdapterInformation pReply = (PReplyInquirePCIHostAdapterInformation)pBusLogic->aReplyBuffer;
1372	memset(pReply, 0, sizeof(ReplyInquirePCIHostAdapterInformation));
1373
1374	/* It seems VMware does not provide valid information here too, lets do the same :) */
1375	pReply->InformationIsValid = 0;
1376	pReply->IsaIOPort = pBusLogic->uISABaseCode;
1377	pReply->IRQ = PCIDevGetInterruptLine(&pBusLogic->dev);
1378	pBusLogic->cbReplyParametersLeft = sizeof(ReplyInquirePCIHostAdapterInformation);
1379	break;
1380	}
1381	case BUSLOGICCOMMAND_MODIFY_IO_ADDRESS:
1382	{
1383	/* Modify the ISA-compatible I/O port base. Note that this technically
1384	* violates the PCI spec, as this address is not reported through PCI.
1385	* However, it is required for compatibility with old drivers.
1386	*/
1387	#ifdef IN_RING3
1388	Log(("ISA I/O for PCI (code %x)\n", pBusLogic->aCommandBuffer[0]));
1389	buslogicRegisterISARange(pBusLogic, pBusLogic->aCommandBuffer[0]);
1390	pBusLogic->cbReplyParametersLeft = 0;
1391	fSuppressIrq = true;
1392	break;
1393	#else
1394	AssertMsgFailed(("Must never get here!\n"));
1395	#endif
1396	}
1397	case BUSLOGICCOMMAND_INQUIRE_BOARD_ID:
1398	{
1399	/* The special option byte is important: If it is '0' or 'B', Windows NT drivers
1400	* for Adaptec AHA-154x may claim the adapter. The BusLogic drivers will claim
1401	* the adapter only when the byte is not '0' or 'B'.
1402	*/
1403	pBusLogic->aReplyBuffer[0] = 'A'; /* Firmware option bytes */
1404	pBusLogic->aReplyBuffer[1] = 'A'; /* Special option byte */
1405
1406	/* We report version 5.07B. This reply will provide the first two digits. */
1407	pBusLogic->aReplyBuffer[2] = '5'; /* Major version 5 */
1408	pBusLogic->aReplyBuffer[3] = '0'; /* Minor version 0 */
1409	pBusLogic->cbReplyParametersLeft = 4; /* Reply is 4 bytes long */
1410	break;
1411	}
1412	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_3RD_LETTER:
1413	{
1414	pBusLogic->aReplyBuffer[0] = '7';
1415	pBusLogic->cbReplyParametersLeft = 1;
1416	break;
1417	}
1418	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_LETTER:
1419	{
1420	pBusLogic->aReplyBuffer[0] = 'B';
1421	pBusLogic->cbReplyParametersLeft = 1;
1422	break;
1423	}
1424	case BUSLOGICCOMMAND_SET_ADAPTER_OPTIONS:
1425	/* The parameter list length is determined by the first byte of the command buffer. */
1426	if (pBusLogic->iParameter == 1)
1427	{
1428	/* First pass - set the number of following parameter bytes. */
1429	pBusLogic->cbCommandParametersLeft = pBusLogic->aCommandBuffer[0];
1430	Log(("Set HA options: %u bytes follow\n", pBusLogic->cbCommandParametersLeft));
1431	}
1432	else
1433	{
1434	/* Second pass - process received data. */
1435	Log(("Set HA options: received %u bytes\n", pBusLogic->aCommandBuffer[0]));
1436	/* We ignore the data - it only concerns the SCSI hardware protocol. */
1437	}
1438	pBusLogic->cbReplyParametersLeft = 0;
1439	break;
1440
1441	case BUSLOGICCOMMAND_INQUIRE_HOST_ADAPTER_MODEL_NUMBER:
1442	{
1443	/* The reply length is set by the guest and is found in the first byte of the command buffer. */
1444	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
1445	memset(pBusLogic->aReplyBuffer, ' ', pBusLogic->cbReplyParametersLeft);
1446	const char aModelName[] = "958";
1447	int cCharsToTransfer = (pBusLogic->cbReplyParametersLeft <= (sizeof(aModelName) - 1))
1448	? pBusLogic->cbReplyParametersLeft
1449	: sizeof(aModelName) - 1;
1450
1451	for (int i = 0; i < cCharsToTransfer; i++)
1452	pBusLogic->aReplyBuffer[i] = aModelName[i];
1453
1454	break;
1455	}
1456	case BUSLOGICCOMMAND_INQUIRE_CONFIGURATION:
1457	{
1458	uint8_t uPciIrq = PCIDevGetInterruptLine(&pBusLogic->dev);
1459
1460	pBusLogic->cbReplyParametersLeft = sizeof(ReplyInquireConfiguration);
1461	PReplyInquireConfiguration pReply = (PReplyInquireConfiguration)pBusLogic->aReplyBuffer;
1462	memset(pReply, 0, sizeof(ReplyInquireConfiguration));
1463
1464	pReply->uHostAdapterId = 7; /* The controller has always 7 as ID. */
1465	//@todo: What should the DMA channel be?
1466	pReply->fDmaChannel6 = 1;
1467	/* The PCI IRQ is not necessarily representable in this structure.
1468	* If that is the case, the guest likely won't function correctly,
1469	* therefore we log a warning.
1470	*/
1471	switch (uPciIrq) {
1472	case 9: pReply->fIrqChannel9 = 1; break;
1473	case 10: pReply->fIrqChannel10 = 1; break;
1474	case 11: pReply->fIrqChannel11 = 1; break;
1475	case 12: pReply->fIrqChannel12 = 1; break;
1476	case 14: pReply->fIrqChannel14 = 1; break;
1477	case 15: pReply->fIrqChannel15 = 1; break;
1478	default:
1479	LogRel(("Warning: PCI IRQ %d cannot be represented as ISA!\n", uPciIrq));
1480	break;
1481	}
1482	break;
1483	}
1484	case BUSLOGICCOMMAND_INQUIRE_EXTENDED_SETUP_INFORMATION:
1485	{
1486	/* Some Adaptec AHA-154x drivers (e.g. OS/2) execute this command and expect
1487	* it to fail. If it succeeds, the drivers refuse to load. However, some newer
1488	* Adaptec 154x models supposedly support it too??
1489	*/
1490
1491	/* The reply length is set by the guest and is found in the first byte of the command buffer. */
1492	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
1493	PReplyInquireExtendedSetupInformation pReply = (PReplyInquireExtendedSetupInformation)pBusLogic->aReplyBuffer;
1494	memset(pReply, 0, sizeof(ReplyInquireExtendedSetupInformation));
1495
1496	//@todo: should this reflect the RAM contents (AutoSCSIRam)?
1497	pReply->uBusType = 'E'; /* EISA style */
1498	pReply->u16ScatterGatherLimit = 8192;
1499	pReply->cMailbox = pBusLogic->cMailbox;
1500	pReply->uMailboxAddressBase = (uint32_t)pBusLogic->GCPhysAddrMailboxOutgoingBase;
1501	pReply->fLevelSensitiveInterrupt = true;
1502	pReply->fHostWideSCSI = true;
1503	pReply->fHostUltraSCSI = true;
1504	memcpy(pReply->aFirmwareRevision, "07B", sizeof(pReply->aFirmwareRevision));
1505
1506	break;
1507	}
1508	case BUSLOGICCOMMAND_INQUIRE_SETUP_INFORMATION:
1509	{
1510	/* The reply length is set by the guest and is found in the first byte of the command buffer. */
1511	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
1512	PReplyInquireSetupInformation pReply = (PReplyInquireSetupInformation)pBusLogic->aReplyBuffer;
1513	memset(pReply, 0, sizeof(ReplyInquireSetupInformation));
1514	pReply->cMailbox = pBusLogic->cMailbox;
1515	pReply->uSignature = 'B';
1516	/* The 'D' signature prevents Adaptec's OS/2 drivers from getting too
1517	* friendly with BusLogic hardware and upsetting the HBA state.
1518	*/
1519	pReply->uCharacterD = 'D'; /* BusLogic model. */
1520	pReply->uHostBusType = 'F'; /* PCI bus. */
1521	break;
1522	}
1523	case BUSLOGICCOMMAND_FETCH_HOST_ADAPTER_LOCAL_RAM:
1524	{
1525	/*
1526	* First element in the command buffer contains start offset to read from
1527	* and second one the number of bytes to read.
1528	*/
1529	uint8_t uOffset = pBusLogic->aCommandBuffer[0];
1530	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[1];
1531
1532	pBusLogic->fUseLocalRam = true;
1533	pBusLogic->iReply = uOffset;
1534	break;
1535	}
1536	case BUSLOGICCOMMAND_INITIALIZE_EXTENDED_MAILBOX:
1537	{
1538	PRequestInitializeExtendedMailbox pRequest = (PRequestInitializeExtendedMailbox)pBusLogic->aCommandBuffer;
1539
1540	pBusLogic->cMailbox = pRequest->cMailbox;
1541	pBusLogic->GCPhysAddrMailboxOutgoingBase = (RTGCPHYS)pRequest->uMailboxBaseAddress;
1542	/* The area for incoming mailboxes is right after the last entry of outgoing mailboxes. */
1543	pBusLogic->GCPhysAddrMailboxIncomingBase = (RTGCPHYS)pRequest->uMailboxBaseAddress + (pBusLogic->cMailbox * sizeof(Mailbox));
1544
1545	Log(("GCPhysAddrMailboxOutgoingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxOutgoingBase));
1546	Log(("GCPhysAddrMailboxIncomingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxIncomingBase));
1547	Log(("cMailboxes=%u (32-bit mode)\n", pBusLogic->cMailbox));
1548	LogRel(("Initialized 32-bit mailbox, %d entries at %08x\n", pRequest->cMailbox, pRequest->uMailboxBaseAddress));
1549
1550	pBusLogic->regStatus &= ~BUSLOGIC_REGISTER_STATUS_INITIALIZATION_REQUIRED;
1551	pBusLogic->cbReplyParametersLeft = 0;
1552	break;
1553	}
1554	case BUSLOGICCOMMAND_ENABLE_STRICT_ROUND_ROBIN_MODE:
1555	{
1556	if (pBusLogic->aCommandBuffer[0] == 0)
1557	pBusLogic->fStrictRoundRobinMode = false;
1558	else if (pBusLogic->aCommandBuffer[0] == 1)
1559	pBusLogic->fStrictRoundRobinMode = true;
1560	else
1561	AssertMsgFailed(("Invalid round robin mode %d\n", pBusLogic->aCommandBuffer[0]));
1562
1563	pBusLogic->cbReplyParametersLeft = 0;
1564	break;
1565	}
1566	case BUSLOGICCOMMAND_SET_CCB_FORMAT:
1567	{
1568	if (pBusLogic->aCommandBuffer[0] == 0)
1569	pBusLogic->fExtendedLunCCBFormat = false;
1570	else if (pBusLogic->aCommandBuffer[0] == 1)
1571	pBusLogic->fExtendedLunCCBFormat = true;
1572	else
1573	AssertMsgFailed(("Invalid CCB format %d\n", pBusLogic->aCommandBuffer[0]));
1574
1575	pBusLogic->cbReplyParametersLeft = 0;
1576	break;
1577	}
1578	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_0_TO_7:
1579	/* This is supposed to send TEST UNIT READY to each target/LUN.
1580	* We cheat and skip that, since we already know what's attached
1581	*/
1582	memset(pBusLogic->aReplyBuffer, 0, 8);
1583	for (int i = 0; i < 8; ++i)
1584	{
1585	if (pBusLogic->aDeviceStates[i].fPresent)
1586	pBusLogic->aReplyBuffer[i] = 1;
1587	}
1588	pBusLogic->aReplyBuffer[7] = 0; /* HA hardcoded at ID 7. */
1589	pBusLogic->cbReplyParametersLeft = 8;
1590	break;
1591	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_8_TO_15:
1592	/* See note about cheating above. */
1593	memset(pBusLogic->aReplyBuffer, 0, 8);
1594	for (int i = 0; i < 8; ++i)
1595	{
1596	if (pBusLogic->aDeviceStates[i + 8].fPresent)
1597	pBusLogic->aReplyBuffer[i] = 1;
1598	}
1599	pBusLogic->cbReplyParametersLeft = 8;
1600	break;
1601	case BUSLOGICCOMMAND_INQUIRE_TARGET_DEVICES:
1602	{
1603	/* Each bit which is set in the 16bit wide variable means a present device. */
1604	uint16_t u16TargetsPresentMask = 0;
1605
1606	for (uint8_t i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates); i++)
1607	{
1608	if (pBusLogic->aDeviceStates[i].fPresent)
1609	u16TargetsPresentMask \|= (1 << i);
1610	}
1611	pBusLogic->aReplyBuffer[0] = (uint8_t)u16TargetsPresentMask;
1612	pBusLogic->aReplyBuffer[1] = (uint8_t)(u16TargetsPresentMask >> 8);
1613	pBusLogic->cbReplyParametersLeft = 2;
1614	break;
1615	}
1616	case BUSLOGICCOMMAND_INQUIRE_SYNCHRONOUS_PERIOD:
1617	{
1618	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
1619
1620	for (uint8_t i = 0; i < pBusLogic->cbReplyParametersLeft; i++)
1621	pBusLogic->aReplyBuffer[i] = 0; /* @todo Figure if we need something other here. It's not needed for the linux driver */
1622
1623	break;
1624	}
1625	case BUSLOGICCOMMAND_DISABLE_HOST_ADAPTER_INTERRUPT:
1626	{
1627	if (pBusLogic->aCommandBuffer[0] == 0)
1628	pBusLogic->fIRQEnabled = false;
1629	else
1630	pBusLogic->fIRQEnabled = true;
1631	/* No interrupt signaled regardless of enable/disable. */
1632	fSuppressIrq = true;
1633	break;
1634	}
1635	case BUSLOGICCOMMAND_ECHO_COMMAND_DATA:
1636	{
1637	pBusLogic->aReplyBuffer[0] = pBusLogic->aCommandBuffer[0];
1638	pBusLogic->cbReplyParametersLeft = 1;
1639	break;
1640	}
1641	case BUSLOGICCOMMAND_SET_PREEMPT_TIME_ON_BUS:
1642	{
1643	pBusLogic->cbReplyParametersLeft = 0;
1644	pBusLogic->LocalRam.structured.autoSCSIData.uBusOnDelay = pBusLogic->aCommandBuffer[0];
1645	Log(("Bus-on time: %d\n", pBusLogic->aCommandBuffer[0]));
1646	break;
1647	}
1648	case BUSLOGICCOMMAND_SET_TIME_OFF_BUS:
1649	{
1650	pBusLogic->cbReplyParametersLeft = 0;
1651	pBusLogic->LocalRam.structured.autoSCSIData.uBusOffDelay = pBusLogic->aCommandBuffer[0];
1652	Log(("Bus-off time: %d\n", pBusLogic->aCommandBuffer[0]));
1653	break;
1654	}
1655	case BUSLOGICCOMMAND_SET_BUS_TRANSFER_RATE:
1656	{
1657	pBusLogic->cbReplyParametersLeft = 0;
1658	pBusLogic->LocalRam.structured.autoSCSIData.uDMATransferRate = pBusLogic->aCommandBuffer[0];
1659	Log(("Bus transfer rate: %02X\n", pBusLogic->aCommandBuffer[0]));
1660	break;
1661	}
1662	default:
1663	AssertMsgFailed(("Invalid command %#x\n", pBusLogic->uOperationCode));
1664	case BUSLOGICCOMMAND_EXT_BIOS_INFO:
1665	case BUSLOGICCOMMAND_UNLOCK_MAILBOX:
1666	/* Commands valid for Adaptec 154xC which we don't handle since
1667	* we pretend being 154xB compatible. Just mark the command as invalid.
1668	*/
1669	Log(("Command %#x not valid for this adapter\n", pBusLogic->uOperationCode));
1670	pBusLogic->cbReplyParametersLeft = 0;
1671	pBusLogic->regStatus \|= BUSLOGIC_REGISTER_STATUS_COMMAND_INVALID;
1672	break;
1673	case BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND: /* Should be handled already. */
1674	AssertMsgFailed(("Invalid mailbox execute state!\n"));
1675	}
1676
1677	Log(("uOperationCode=%#x, cbReplyParametersLeft=%d\n", pBusLogic->uOperationCode, pBusLogic->cbReplyParametersLeft));
1678
1679	/* Set the data in ready bit in the status register in case the command has a reply. */
1680	if (pBusLogic->cbReplyParametersLeft)
1681	pBusLogic->regStatus \|= BUSLOGIC_REGISTER_STATUS_DATA_IN_REGISTER_READY;
1682	else if (!pBusLogic->cbCommandParametersLeft)
1683	buslogicCommandComplete(pBusLogic, fSuppressIrq);
1684
1685	return rc;
1686	}
1687
1688	/**
1689	* Read a register from the BusLogic adapter.
1690	*
1691	* @returns VBox status code.
1692	* @param pBusLogic Pointer to the BusLogic instance data.
1693	* @param iRegister The index of the register to read.
1694	* @param pu32 Where to store the register content.
1695	*/
1696	static int buslogicRegisterRead(PBUSLOGIC pBusLogic, unsigned iRegister, uint32_t *pu32)
1697	{
1698	int rc = VINF_SUCCESS;
1699
1700	switch (iRegister)
1701	{
1702	case BUSLOGIC_REGISTER_STATUS:
1703	{
1704	*pu32 = pBusLogic->regStatus;
1705
1706	/* If the diagnostic active bit is set, we are in a guest-initiated
1707	* hard or soft reset. If the guest reads the status register and
1708	* waits for the host adapter ready bit to be set, we terminate the
1709	* reset right away. However, guests may also expect the reset
1710	* condition to clear automatically after a period of time.
1711	*/
1712	if (pBusLogic->regStatus & BUSLOGIC_REGISTER_STATUS_DIAGNOSTIC_ACTIVE)
1713	{
1714	uint64_t u64AccessTime = PDMDevHlpTMTimeVirtGetNano(pBusLogic->CTX_SUFF(pDevIns));
1715
1716	pBusLogic->regStatus &= ~BUSLOGIC_REGISTER_STATUS_DIAGNOSTIC_ACTIVE;
1717	pBusLogic->regStatus \|= BUSLOGIC_REGISTER_STATUS_HOST_ADAPTER_READY;
1718	if (u64AccessTime - pBusLogic->u64ResetTime > BUSLOGIC_RESET_DURATION_NS)
1719	{
1720	/* Let the guest see the ready condition right away. */
1721	*pu32 &= ~BUSLOGIC_REGISTER_STATUS_DIAGNOSTIC_ACTIVE;
1722	*pu32 \|= BUSLOGIC_REGISTER_STATUS_HOST_ADAPTER_READY;
1723	pBusLogic->u64ResetTime = 0;
1724	}
1725	}
1726	break;
1727	}
1728	case BUSLOGIC_REGISTER_DATAIN:
1729	{
1730	if (pBusLogic->fUseLocalRam)
1731	*pu32 = pBusLogic->LocalRam.u8View[pBusLogic->iReply];
1732	else
1733	*pu32 = pBusLogic->aReplyBuffer[pBusLogic->iReply];
1734
1735	/* Careful about underflow - guest can read data register even if
1736	* no data is available.
1737	*/
1738	if (pBusLogic->cbReplyParametersLeft)
1739	{
1740	pBusLogic->iReply++;
1741	pBusLogic->cbReplyParametersLeft--;
1742	if (!pBusLogic->cbReplyParametersLeft)
1743	{
1744	/*
1745	* Reply finished, set command complete bit, unset data-in ready bit and
1746	* interrupt the guest if enabled.
1747	*/
1748	buslogicCommandComplete(pBusLogic, false);
1749	}
1750	}
1751	LogFlowFunc(("data=%02x, iReply=%d, cbReplyParametersLeft=%u\n", *pu32,
1752	pBusLogic->iReply, pBusLogic->cbReplyParametersLeft));
1753	break;
1754	}
1755	case BUSLOGIC_REGISTER_INTERRUPT:
1756	{
1757	*pu32 = pBusLogic->regInterrupt;
1758	break;
1759	}
1760	case BUSLOGIC_REGISTER_GEOMETRY:
1761	{
1762	*pu32 = pBusLogic->regGeometry;
1763	break;
1764	}
1765	default:
1766	*pu32 = UINT32_C(0xffffffff);
1767	}
1768
1769	Log2(("%s: pu32=%p:{%.*Rhxs} iRegister=%d rc=%Rrc\n",
1770	__FUNCTION__, pu32, 1, pu32, iRegister, rc));
1771
1772	return rc;
1773	}
1774
1775	/**
1776	* Write a value to a register.
1777	*
1778	* @returns VBox status code.
1779	* @param pBusLogic Pointer to the BusLogic instance data.
1780	* @param iRegister The index of the register to read.
1781	* @param uVal The value to write.
1782	*/
1783	static int buslogicRegisterWrite(PBUSLOGIC pBusLogic, unsigned iRegister, uint8_t uVal)
1784	{
1785	int rc = VINF_SUCCESS;
1786
1787	switch (iRegister)
1788	{
1789	case BUSLOGIC_REGISTER_CONTROL:
1790	{
1791	rc = PDMCritSectEnter(&pBusLogic->CritSectIntr, VINF_IOM_R3_IOPORT_WRITE);
1792	if (rc != VINF_SUCCESS)
1793	return rc;
1794
1795	#ifdef LOG_ENABLED
1796	uint32_t cMailboxesReady = ASMAtomicXchgU32(&pBusLogic->cInMailboxesReady, 0);
1797	Log(("%u incoming mailboxes were ready when this interrupt was cleared\n", cMailboxesReady));
1798	#endif
1799
1800	if (uVal & BUSLOGIC_REGISTER_CONTROL_INTERRUPT_RESET)
1801	buslogicClearInterrupt(pBusLogic);
1802
1803	PDMCritSectLeave(&pBusLogic->CritSectIntr);
1804
1805	if ((uVal & BUSLOGIC_REGISTER_CONTROL_HARD_RESET) \|\| (uVal & BUSLOGIC_REGISTER_CONTROL_SOFT_RESET))
1806	{
1807	#ifdef IN_RING3
1808	buslogicIntiateHardReset(pBusLogic);
1809	#else
1810	rc = VINF_IOM_R3_IOPORT_WRITE;
1811	#endif
1812	}
1813
1814	break;
1815	}
1816	case BUSLOGIC_REGISTER_COMMAND:
1817	{
1818	/* Fast path for mailbox execution command. */
1819	if ((uVal == BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND) && (pBusLogic->uOperationCode == 0xff))
1820	{
1821	ASMAtomicIncU32(&pBusLogic->cMailboxesReady);
1822	if (!ASMAtomicXchgBool(&pBusLogic->fNotificationSend, true))
1823	{
1824	/* Send new notification to the queue. */
1825	PPDMQUEUEITEMCORE pItem = PDMQueueAlloc(pBusLogic->CTX_SUFF(pNotifierQueue));
1826	AssertMsg(pItem, ("Allocating item for queue failed\n"));
1827	PDMQueueInsert(pBusLogic->CTX_SUFF(pNotifierQueue), (PPDMQUEUEITEMCORE)pItem);
1828	}
1829
1830	return rc;
1831	}
1832
1833	/*
1834	* Check if we are already fetch command parameters from the guest.
1835	* If not we initialize executing a new command.
1836	*/
1837	if (pBusLogic->uOperationCode == 0xff)
1838	{
1839	pBusLogic->uOperationCode = uVal;
1840	pBusLogic->iParameter = 0;
1841
1842	/* Mark host adapter as busy and clear the invalid status bit. */
1843	pBusLogic->regStatus &= ~(BUSLOGIC_REGISTER_STATUS_HOST_ADAPTER_READY \| BUSLOGIC_REGISTER_STATUS_COMMAND_INVALID);
1844
1845	/* Get the number of bytes for parameters from the command code. */
1846	switch (pBusLogic->uOperationCode)
1847	{
1848	case BUSLOGICCOMMAND_TEST_CMDC_INTERRUPT:
1849	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_LETTER:
1850	case BUSLOGICCOMMAND_INQUIRE_BOARD_ID:
1851	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_3RD_LETTER:
1852	case BUSLOGICCOMMAND_INQUIRE_PCI_HOST_ADAPTER_INFORMATION:
1853	case BUSLOGICCOMMAND_INQUIRE_CONFIGURATION:
1854	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_0_TO_7:
1855	case BUSLOGICCOMMAND_INQUIRE_TARGET_DEVICES:
1856	pBusLogic->cbCommandParametersLeft = 0;
1857	break;
1858	case BUSLOGICCOMMAND_MODIFY_IO_ADDRESS:
1859	case BUSLOGICCOMMAND_INQUIRE_EXTENDED_SETUP_INFORMATION:
1860	case BUSLOGICCOMMAND_INQUIRE_SETUP_INFORMATION:
1861	case BUSLOGICCOMMAND_INQUIRE_HOST_ADAPTER_MODEL_NUMBER:
1862	case BUSLOGICCOMMAND_ENABLE_STRICT_ROUND_ROBIN_MODE:
1863	case BUSLOGICCOMMAND_SET_CCB_FORMAT:
1864	case BUSLOGICCOMMAND_INQUIRE_SYNCHRONOUS_PERIOD:
1865	case BUSLOGICCOMMAND_DISABLE_HOST_ADAPTER_INTERRUPT:
1866	case BUSLOGICCOMMAND_ECHO_COMMAND_DATA:
1867	case BUSLOGICCOMMAND_SET_PREEMPT_TIME_ON_BUS:
1868	case BUSLOGICCOMMAND_SET_TIME_OFF_BUS:
1869	case BUSLOGICCOMMAND_SET_BUS_TRANSFER_RATE:
1870	pBusLogic->cbCommandParametersLeft = 1;
1871	break;
1872	case BUSLOGICCOMMAND_FETCH_HOST_ADAPTER_LOCAL_RAM:
1873	pBusLogic->cbCommandParametersLeft = 2;
1874	break;
1875	case BUSLOGICCOMMAND_INITIALIZE_EXTENDED_MAILBOX:
1876	pBusLogic->cbCommandParametersLeft = sizeof(RequestInitializeExtendedMailbox);
1877	break;
1878	case BUSLOGICCOMMAND_SET_ADAPTER_OPTIONS:
1879	/* There must be at least one byte following this command. */
1880	pBusLogic->cbCommandParametersLeft = 1;
1881	break;
1882	case BUSLOGICCOMMAND_EXT_BIOS_INFO:
1883	case BUSLOGICCOMMAND_UNLOCK_MAILBOX:
1884	/* Invalid commands. */
1885	pBusLogic->cbCommandParametersLeft = 0;
1886	break;
1887	case BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND: /* Should not come here anymore. */
1888	default:
1889	AssertMsgFailed(("Invalid operation code %#x\n", uVal));
1890	}
1891	}
1892	else
1893	{
1894	#ifndef IN_RING3
1895	/* This command must be executed in R3 as it rehooks the ISA I/O port. */
1896	if (pBusLogic->uOperationCode == BUSLOGICCOMMAND_MODIFY_IO_ADDRESS)
1897	{
1898	rc = VINF_IOM_R3_IOPORT_WRITE;
1899	break;
1900	}
1901	#endif
1902	/*
1903	* The real adapter would set the Command register busy bit in the status register.
1904	* The guest has to wait until it is unset.
1905	* We don't need to do it because the guest does not continue execution while we are in this
1906	* function.
1907	*/
1908	pBusLogic->aCommandBuffer[pBusLogic->iParameter] = uVal;
1909	pBusLogic->iParameter++;
1910	pBusLogic->cbCommandParametersLeft--;
1911	}
1912
1913	/* Start execution of command if there are no parameters left. */
1914	if (!pBusLogic->cbCommandParametersLeft)
1915	{
1916	rc = buslogicProcessCommand(pBusLogic);
1917	AssertMsgRC(rc, ("Processing command failed rc=%Rrc\n", rc));
1918	}
1919	break;
1920	}
1921
1922	/* On BusLogic adapters, the interrupt and geometry registers are R/W.
1923	* That is different from Adaptec 154x where those are read only.
1924	*/
1925	case BUSLOGIC_REGISTER_INTERRUPT:
1926	pBusLogic->regInterrupt = uVal;
1927	break;
1928
1929	case BUSLOGIC_REGISTER_GEOMETRY:
1930	pBusLogic->regGeometry = uVal;
1931	break;
1932
1933	default:
1934	AssertMsgFailed(("Register not available\n"));
1935	rc = VERR_IOM_IOPORT_UNUSED;
1936	}
1937
1938	return rc;
1939	}
1940
1941	/**
1942	* Memory mapped I/O Handler for read operations.
1943	*
1944	* @returns VBox status code.
1945	*
1946	* @param pDevIns The device instance.
1947	* @param pvUser User argument.
1948	* @param GCPhysAddr Physical address (in GC) where the read starts.
1949	* @param pv Where to store the result.
1950	* @param cb Number of bytes read.
1951	*/
1952	PDMBOTHCBDECL(int) buslogicMMIORead(PPDMDEVINS pDevIns, void *pvUser,
1953	RTGCPHYS GCPhysAddr, void *pv, unsigned cb)
1954	{
1955	/* the linux driver does not make use of the MMIO area. */
1956	AssertMsgFailed(("MMIO Read\n"));
1957	return VINF_SUCCESS;
1958	}
1959
1960	/**
1961	* Memory mapped I/O Handler for write operations.
1962	*
1963	* @returns VBox status code.
1964	*
1965	* @param pDevIns The device instance.
1966	* @param pvUser User argument.
1967	* @param GCPhysAddr Physical address (in GC) where the read starts.
1968	* @param pv Where to fetch the result.
1969	* @param cb Number of bytes to write.
1970	*/
1971	PDMBOTHCBDECL(int) buslogicMMIOWrite(PPDMDEVINS pDevIns, void *pvUser,
1972	RTGCPHYS GCPhysAddr, void const *pv, unsigned cb)
1973	{
1974	/* the linux driver does not make use of the MMIO area. */
1975	AssertMsgFailed(("MMIO Write\n"));
1976	return VINF_SUCCESS;
1977	}
1978
1979	/**
1980	* Port I/O Handler for IN operations.
1981	*
1982	* @returns VBox status code.
1983	*
1984	* @param pDevIns The device instance.
1985	* @param pvUser User argument.
1986	* @param uPort Port number used for the IN operation.
1987	* @param pu32 Where to store the result.
1988	* @param cb Number of bytes read.
1989	*/
1990	PDMBOTHCBDECL(int) buslogicIOPortRead (PPDMDEVINS pDevIns, void *pvUser,
1991	RTIOPORT Port, uint32_t *pu32, unsigned cb)
1992	{
1993	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
1994	unsigned iRegister = Port % 4;
1995
1996	Assert(cb == 1);
1997
1998	return buslogicRegisterRead(pBusLogic, iRegister, pu32);
1999	}
2000
2001	/**
2002	* Port I/O Handler for OUT operations.
2003	*
2004	* @returns VBox status code.
2005	*
2006	* @param pDevIns The device instance.
2007	* @param pvUser User argument.
2008	* @param uPort Port number used for the IN operation.
2009	* @param u32 The value to output.
2010	* @param cb The value size in bytes.
2011	*/
2012	PDMBOTHCBDECL(int) buslogicIOPortWrite (PPDMDEVINS pDevIns, void *pvUser,
2013	RTIOPORT Port, uint32_t u32, unsigned cb)
2014	{
2015	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2016	int rc = VINF_SUCCESS;
2017	unsigned iRegister = Port % 4;
2018	uint8_t uVal = (uint8_t)u32;
2019
2020	Assert(cb == 1);
2021
2022	rc = buslogicRegisterWrite(pBusLogic, iRegister, (uint8_t)uVal);
2023
2024	Log2(("#%d %s: pvUser=%#p cb=%d u32=%#x Port=%#x rc=%Rrc\n",
2025	pDevIns->iInstance, __FUNCTION__, pvUser, cb, u32, Port, rc));
2026
2027	return rc;
2028	}
2029
2030	#ifdef IN_RING3
2031
2032	static int buslogicPrepareBIOSSCSIRequest(PBUSLOGIC pBusLogic)
2033	{
2034	int rc;
2035	PBUSLOGICTASKSTATE pTaskState;
2036	uint32_t uTargetDevice;
2037
2038	rc = RTMemCacheAllocEx(pBusLogic->hTaskCache, (void **)&pTaskState);
2039	AssertMsgRCReturn(rc, ("Getting task from cache failed rc=%Rrc\n", rc), rc);
2040
2041	pTaskState->fBIOS = true;
2042
2043	rc = vboxscsiSetupRequest(&pBusLogic->VBoxSCSI, &pTaskState->PDMScsiRequest, &uTargetDevice);
2044	AssertMsgRCReturn(rc, ("Setting up SCSI request failed rc=%Rrc\n", rc), rc);
2045
2046	pTaskState->PDMScsiRequest.pvUser = pTaskState;
2047
2048	pTaskState->CTX_SUFF(pTargetDevice) = &pBusLogic->aDeviceStates[uTargetDevice];
2049
2050	if (!pTaskState->CTX_SUFF(pTargetDevice)->fPresent)
2051	{
2052	/* Device is not present. */
2053	AssertMsg(pTaskState->PDMScsiRequest.pbCDB[0] == SCSI_INQUIRY,
2054	("Device is not present but command is not inquiry\n"));
2055
2056	SCSIINQUIRYDATA ScsiInquiryData;
2057
2058	memset(&ScsiInquiryData, 0, sizeof(SCSIINQUIRYDATA));
2059	ScsiInquiryData.u5PeripheralDeviceType = SCSI_INQUIRY_DATA_PERIPHERAL_DEVICE_TYPE_UNKNOWN;
2060	ScsiInquiryData.u3PeripheralQualifier = SCSI_INQUIRY_DATA_PERIPHERAL_QUALIFIER_NOT_CONNECTED_NOT_SUPPORTED;
2061
2062	memcpy(pBusLogic->VBoxSCSI.pBuf, &ScsiInquiryData, 5);
2063
2064	rc = vboxscsiRequestFinished(&pBusLogic->VBoxSCSI, &pTaskState->PDMScsiRequest);
2065	AssertMsgRCReturn(rc, ("Finishing BIOS SCSI request failed rc=%Rrc\n", rc), rc);
2066
2067	RTMemCacheFree(pBusLogic->hTaskCache, pTaskState);
2068	}
2069	else
2070	{
2071	LogFlowFunc(("before increment %u\n", pTaskState->CTX_SUFF(pTargetDevice)->cOutstandingRequests));
2072	ASMAtomicIncU32(&pTaskState->CTX_SUFF(pTargetDevice)->cOutstandingRequests);
2073	LogFlowFunc(("after increment %u\n", pTaskState->CTX_SUFF(pTargetDevice)->cOutstandingRequests));
2074
2075	rc = pTaskState->CTX_SUFF(pTargetDevice)->pDrvSCSIConnector->pfnSCSIRequestSend(pTaskState->CTX_SUFF(pTargetDevice)->pDrvSCSIConnector,
2076	&pTaskState->PDMScsiRequest);
2077	AssertMsgRC(rc, ("Sending request to SCSI layer failed rc=%Rrc\n", rc));
2078	}
2079
2080	return rc;
2081	}
2082
2083
2084	/**
2085	* Port I/O Handler for IN operations - BIOS port.
2086	*
2087	* @returns VBox status code.
2088	*
2089	* @param pDevIns The device instance.
2090	* @param pvUser User argument.
2091	* @param uPort Port number used for the IN operation.
2092	* @param pu32 Where to store the result.
2093	* @param cb Number of bytes read.
2094	*/
2095	static int buslogicBIOSIOPortRead(PPDMDEVINS pDevIns, void *pvUser,
2096	RTIOPORT Port, uint32_t *pu32, unsigned cb)
2097	{
2098	int rc;
2099	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2100
2101	Assert(cb == 1);
2102
2103	rc = vboxscsiReadRegister(&pBusLogic->VBoxSCSI, (Port - BUSLOGIC_BIOS_IO_PORT), pu32);
2104
2105	//Log2(("%s: pu32=%p:{%.*Rhxs} iRegister=%d rc=%Rrc\n",
2106	// __FUNCTION__, pu32, 1, pu32, (Port - BUSLOGIC_BIOS_IO_PORT), rc));
2107
2108	return rc;
2109	}
2110
2111	/**
2112	* Port I/O Handler for OUT operations - BIOS port.
2113	*
2114	* @returns VBox status code.
2115	*
2116	* @param pDevIns The device instance.
2117	* @param pvUser User argument.
2118	* @param uPort Port number used for the IN operation.
2119	* @param u32 The value to output.
2120	* @param cb The value size in bytes.
2121	*/
2122	static int buslogicBIOSIOPortWrite(PPDMDEVINS pDevIns, void *pvUser,
2123	RTIOPORT Port, uint32_t u32, unsigned cb)
2124	{
2125	int rc;
2126	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2127
2128	Log2(("#%d %s: pvUser=%#p cb=%d u32=%#x Port=%#x\n",
2129	pDevIns->iInstance, __FUNCTION__, pvUser, cb, u32, Port));
2130
2131	Assert(cb == 1);
2132
2133	rc = vboxscsiWriteRegister(&pBusLogic->VBoxSCSI, (Port - BUSLOGIC_BIOS_IO_PORT), (uint8_t)u32);
2134	if (rc == VERR_MORE_DATA)
2135	{
2136	rc = buslogicPrepareBIOSSCSIRequest(pBusLogic);
2137	AssertRC(rc);
2138	}
2139	else if (RT_FAILURE(rc))
2140	AssertMsgFailed(("Writing BIOS register failed %Rrc\n", rc));
2141
2142	return VINF_SUCCESS;
2143	}
2144
2145	/**
2146	* Port I/O Handler for primary port range OUT string operations.
2147	* @see FNIOMIOPORTOUTSTRING for details.
2148	*/
2149	static DECLCALLBACK(int) buslogicBIOSIOPortWriteStr(PPDMDEVINS pDevIns, void pvUser, RTIOPORT Port, RTGCPTR pGCPtrSrc, PRTGCUINTREG pcTransfer, unsigned cb)
2150	{
2151	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2152	int rc;
2153
2154	Log2(("#%d %s: pvUser=%#p cb=%d Port=%#x\n",
2155	pDevIns->iInstance, __FUNCTION__, pvUser, cb, Port));
2156
2157	rc = vboxscsiWriteString(pDevIns, &pBusLogic->VBoxSCSI, (Port - BUSLOGIC_BIOS_IO_PORT),
2158	pGCPtrSrc, pcTransfer, cb);
2159	if (rc == VERR_MORE_DATA)
2160	{
2161	rc = buslogicPrepareBIOSSCSIRequest(pBusLogic);
2162	AssertRC(rc);
2163	}
2164	else if (RT_FAILURE(rc))
2165	AssertMsgFailed(("Writing BIOS register failed %Rrc\n", rc));
2166
2167	return rc;
2168	}
2169
2170	/**
2171	* Port I/O Handler for primary port range IN string operations.
2172	* @see FNIOMIOPORTINSTRING for details.
2173	*/
2174	static DECLCALLBACK(int) buslogicBIOSIOPortReadStr(PPDMDEVINS pDevIns, void pvUser, RTIOPORT Port, RTGCPTR pGCPtrDst, PRTGCUINTREG pcTransfer, unsigned cb)
2175	{
2176	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2177
2178	LogFlowFunc(("#%d %s: pvUser=%#p cb=%d Port=%#x\n",
2179	pDevIns->iInstance, __FUNCTION__, pvUser, cb, Port));
2180
2181	return vboxscsiReadString(pDevIns, &pBusLogic->VBoxSCSI, (Port - BUSLOGIC_BIOS_IO_PORT),
2182	pGCPtrDst, pcTransfer, cb);
2183	}
2184
2185	/**
2186	* Update the ISA I/O range.
2187	*
2188	* @returns nothing.
2189	* @param pBusLogic Pointer to the BusLogic device instance.
2190	* @param uBaseCode Encoded ISA I/O base; only low 3 bits are used.
2191	*/
2192	static int buslogicRegisterISARange(PBUSLOGIC pBusLogic, uint8_t uBaseCode)
2193	{
2194	uint8_t uCode = uBaseCode & MAX_ISA_BASE;
2195	uint16_t uNewBase = aISABases[uCode];
2196	int rc = VINF_SUCCESS;
2197
2198	LogFlowFunc(("ISA I/O code %02X, new base %X\n", uBaseCode, uNewBase));
2199
2200	/* Check if the same port range is already registered. */
2201	if (uNewBase != pBusLogic->IOISABase)
2202	{
2203	/* Unregister the old range, if any. */
2204	if (pBusLogic->IOISABase)
2205	rc = PDMDevHlpIOPortDeregister(pBusLogic->CTX_SUFF(pDevIns), pBusLogic->IOISABase, 4);
2206
2207	if (RT_SUCCESS(rc))
2208	{
2209	pBusLogic->IOISABase = 0; /* First mark as unregistered. */
2210	pBusLogic->uISABaseCode = ISA_BASE_DISABLED;
2211
2212	if (uNewBase)
2213	{
2214	/* Register the new range if requested. */
2215	rc = PDMDevHlpIOPortRegister(pBusLogic->CTX_SUFF(pDevIns), uNewBase, 4, NULL,
2216	buslogicIOPortWrite, buslogicIOPortRead,
2217	NULL, NULL,
2218	"BusLogic ISA");
2219	if (RT_SUCCESS(rc))
2220	{
2221	pBusLogic->IOISABase = uNewBase;
2222	pBusLogic->uISABaseCode = uCode;
2223	}
2224	}
2225	}
2226	if (RT_SUCCESS(rc))
2227	{
2228	if (uNewBase)
2229	{
2230	Log(("ISA I/O base: %x\n", uNewBase));
2231	LogRel(("buslogic: ISA I/O base: %x\n", uNewBase));
2232	}
2233	else
2234	{
2235	Log(("Disabling ISA I/O ports.\n"));
2236	LogRel(("buslogic: ISA I/O disabled\n"));
2237	}
2238	}
2239
2240	}
2241	return rc;
2242	}
2243
2244	static void buslogicWarningDiskFull(PPDMDEVINS pDevIns)
2245	{
2246	int rc;
2247	LogRel(("BusLogic#%d: Host disk full\n", pDevIns->iInstance));
2248	rc = PDMDevHlpVMSetRuntimeError(pDevIns, VMSETRTERR_FLAGS_SUSPEND \| VMSETRTERR_FLAGS_NO_WAIT, "DevBusLogic_DISKFULL",
2249	N_("Host system reported disk full. VM execution is suspended. You can resume after freeing some space"));
2250	AssertRC(rc);
2251	}
2252
2253	static void buslogicWarningFileTooBig(PPDMDEVINS pDevIns)
2254	{
2255	int rc;
2256	LogRel(("BusLogic#%d: File too big\n", pDevIns->iInstance));
2257	rc = PDMDevHlpVMSetRuntimeError(pDevIns, VMSETRTERR_FLAGS_SUSPEND \| VMSETRTERR_FLAGS_NO_WAIT, "DevBusLogic_FILETOOBIG",
2258	N_("Host system reported that the file size limit of the host file system has been exceeded. VM execution is suspended. You need to move your virtual hard disk to a filesystem which allows bigger files"));
2259	AssertRC(rc);
2260	}
2261
2262	static void buslogicWarningISCSI(PPDMDEVINS pDevIns)
2263	{
2264	int rc;
2265	LogRel(("BusLogic#%d: iSCSI target unavailable\n", pDevIns->iInstance));
2266	rc = PDMDevHlpVMSetRuntimeError(pDevIns, VMSETRTERR_FLAGS_SUSPEND \| VMSETRTERR_FLAGS_NO_WAIT, "DevBusLogic_ISCSIDOWN",
2267	N_("The iSCSI target has stopped responding. VM execution is suspended. You can resume when it is available again"));
2268	AssertRC(rc);
2269	}
2270
2271	static void buslogicWarningUnknown(PPDMDEVINS pDevIns, int rc)
2272	{
2273	int rc2;
2274	LogRel(("BusLogic#%d: Unknown but recoverable error has occurred (rc=%Rrc)\n", pDevIns->iInstance, rc));
2275	rc2 = PDMDevHlpVMSetRuntimeError(pDevIns, VMSETRTERR_FLAGS_SUSPEND \| VMSETRTERR_FLAGS_NO_WAIT, "DevBusLogic_UNKNOWN",
2276	N_("An unknown but recoverable I/O error has occurred (rc=%Rrc). VM execution is suspended. You can resume when the error is fixed"), rc);
2277	AssertRC(rc2);
2278	}
2279
2280	static void buslogicRedoSetWarning(PBUSLOGIC pThis, int rc)
2281	{
2282	if (rc == VERR_DISK_FULL)
2283	buslogicWarningDiskFull(pThis->CTX_SUFF(pDevIns));
2284	else if (rc == VERR_FILE_TOO_BIG)
2285	buslogicWarningFileTooBig(pThis->CTX_SUFF(pDevIns));
2286	else if (rc == VERR_BROKEN_PIPE \|\| rc == VERR_NET_CONNECTION_REFUSED)
2287	{
2288	/* iSCSI connection abort (first error) or failure to reestablish
2289	* connection (second error). Pause VM. On resume we'll retry. */
2290	buslogicWarningISCSI(pThis->CTX_SUFF(pDevIns));
2291	}
2292	else
2293	buslogicWarningUnknown(pThis->CTX_SUFF(pDevIns), rc);
2294	}
2295
2296
2297	static DECLCALLBACK(int) buslogicMMIOMap(PPCIDEVICE pPciDev, /unsigned/ int iRegion,
2298	RTGCPHYS GCPhysAddress, uint32_t cb,
2299	PCIADDRESSSPACE enmType)
2300	{
2301	PPDMDEVINS pDevIns = pPciDev->pDevIns;
2302	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2303	int rc = VINF_SUCCESS;
2304
2305	Log2(("%s: registering MMIO area at GCPhysAddr=%RGp cb=%u\n", __FUNCTION__, GCPhysAddress, cb));
2306
2307	Assert(cb >= 32);
2308
2309	if (enmType == PCI_ADDRESS_SPACE_MEM)
2310	{
2311	/* We use the assigned size here, because we currently only support page aligned MMIO ranges. */
2312	rc = PDMDevHlpMMIORegister(pDevIns, GCPhysAddress, cb, NULL /pvUser/,
2313	IOMMMIO_FLAGS_READ_PASSTHRU \| IOMMMIO_FLAGS_WRITE_PASSTHRU,
2314	buslogicMMIOWrite, buslogicMMIORead, "BusLogic MMIO");
2315	if (RT_FAILURE(rc))
2316	return rc;
2317
2318	if (pThis->fR0Enabled)
2319	{
2320	rc = PDMDevHlpMMIORegisterR0(pDevIns, GCPhysAddress, cb, NIL_RTR0PTR /pvUser/,
2321	"buslogicMMIOWrite", "buslogicMMIORead");
2322	if (RT_FAILURE(rc))
2323	return rc;
2324	}
2325
2326	if (pThis->fGCEnabled)
2327	{
2328	rc = PDMDevHlpMMIORegisterRC(pDevIns, GCPhysAddress, cb, NIL_RTRCPTR /pvUser/,
2329	"buslogicMMIOWrite", "buslogicMMIORead");
2330	if (RT_FAILURE(rc))
2331	return rc;
2332	}
2333
2334	pThis->MMIOBase = GCPhysAddress;
2335	}
2336	else if (enmType == PCI_ADDRESS_SPACE_IO)
2337	{
2338	rc = PDMDevHlpIOPortRegister(pDevIns, (RTIOPORT)GCPhysAddress, 32,
2339	NULL, buslogicIOPortWrite, buslogicIOPortRead, NULL, NULL, "BusLogic PCI");
2340	if (RT_FAILURE(rc))
2341	return rc;
2342
2343	if (pThis->fR0Enabled)
2344	{
2345	rc = PDMDevHlpIOPortRegisterR0(pDevIns, (RTIOPORT)GCPhysAddress, 32,
2346	0, "buslogicIOPortWrite", "buslogicIOPortRead", NULL, NULL, "BusLogic PCI");
2347	if (RT_FAILURE(rc))
2348	return rc;
2349	}
2350
2351	if (pThis->fGCEnabled)
2352	{
2353	rc = PDMDevHlpIOPortRegisterRC(pDevIns, (RTIOPORT)GCPhysAddress, 32,
2354	0, "buslogicIOPortWrite", "buslogicIOPortRead", NULL, NULL, "BusLogic PCI");
2355	if (RT_FAILURE(rc))
2356	return rc;
2357	}
2358
2359	pThis->IOPortBase = (RTIOPORT)GCPhysAddress;
2360	}
2361	else
2362	AssertMsgFailed(("Invalid enmType=%d\n", enmType));
2363
2364	return rc;
2365	}
2366
2367	static DECLCALLBACK(int) buslogicDeviceSCSIRequestCompleted(PPDMISCSIPORT pInterface, PPDMSCSIREQUEST pSCSIRequest,
2368	int rcCompletion, bool fRedo, int rcReq)
2369	{
2370	int rc;
2371	PBUSLOGICTASKSTATE pTaskState = (PBUSLOGICTASKSTATE)pSCSIRequest->pvUser;
2372	PBUSLOGICDEVICE pBusLogicDevice = pTaskState->CTX_SUFF(pTargetDevice);
2373	PBUSLOGIC pBusLogic = pBusLogicDevice->CTX_SUFF(pBusLogic);
2374
2375	LogFlowFunc(("before decrement %u\n", pBusLogicDevice->cOutstandingRequests));
2376	ASMAtomicDecU32(&pBusLogicDevice->cOutstandingRequests);
2377	LogFlowFunc(("after decrement %u\n", pBusLogicDevice->cOutstandingRequests));
2378
2379	if (fRedo)
2380	{
2381	if (!pTaskState->fBIOS)
2382	{
2383	buslogicDataBufferFree(pTaskState);
2384
2385	if (pTaskState->pbSenseBuffer)
2386	buslogicSenseBufferFree(pTaskState, false /* fCopy */);
2387	}
2388
2389	/* Add to the list. */
2390	do
2391	{
2392	pTaskState->pRedoNext = ASMAtomicReadPtrT(&pBusLogic->pTasksRedoHead, PBUSLOGICTASKSTATE);
2393	} while (!ASMAtomicCmpXchgPtr(&pBusLogic->pTasksRedoHead, pTaskState, pTaskState->pRedoNext));
2394
2395	/* Suspend the VM if not done already. */
2396	if (!ASMAtomicXchgBool(&pBusLogic->fRedo, true))
2397	buslogicRedoSetWarning(pBusLogic, rcReq);
2398	}
2399	else
2400	{
2401	if (pTaskState->fBIOS)
2402	{
2403	rc = vboxscsiRequestFinished(&pBusLogic->VBoxSCSI, pSCSIRequest);
2404	AssertMsgRC(rc, ("Finishing BIOS SCSI request failed rc=%Rrc\n", rc));
2405	}
2406	else
2407	{
2408	buslogicDataBufferFree(pTaskState);
2409
2410	if (pTaskState->pbSenseBuffer)
2411	buslogicSenseBufferFree(pTaskState, (rcCompletion != SCSI_STATUS_OK));
2412
2413	if (rcCompletion == SCSI_STATUS_OK)
2414	buslogicSendIncomingMailbox(pBusLogic, pTaskState,
2415	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_CMD_COMPLETED,
2416	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
2417	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITHOUT_ERROR);
2418	else if (rcCompletion == SCSI_STATUS_CHECK_CONDITION)
2419	buslogicSendIncomingMailbox(pBusLogic, pTaskState,
2420	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_CMD_COMPLETED,
2421	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_CHECK_CONDITION,
2422	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
2423	else
2424	AssertMsgFailed(("invalid completion status %d\n", rcCompletion));
2425	}
2426	/* Remove task from the cache. */
2427	RTMemCacheFree(pBusLogic->hTaskCache, pTaskState);
2428	}
2429
2430	if (pBusLogicDevice->cOutstandingRequests == 0 && pBusLogic->fSignalIdle)
2431	PDMDevHlpAsyncNotificationCompleted(pBusLogic->pDevInsR3);
2432
2433	return VINF_SUCCESS;
2434	}
2435
2436	static DECLCALLBACK(int) buslogicQueryDeviceLocation(PPDMISCSIPORT pInterface, const char **ppcszController,
2437	uint32_t piInstance, uint32_t piLUN)
2438	{
2439	PBUSLOGICDEVICE pBusLogicDevice = PDMISCSIPORT_2_PBUSLOGICDEVICE(pInterface);
2440	PPDMDEVINS pDevIns = pBusLogicDevice->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
2441
2442	AssertPtrReturn(ppcszController, VERR_INVALID_POINTER);
2443	AssertPtrReturn(piInstance, VERR_INVALID_POINTER);
2444	AssertPtrReturn(piLUN, VERR_INVALID_POINTER);
2445
2446	*ppcszController = pDevIns->pReg->szName;
2447	*piInstance = pDevIns->iInstance;
2448	*piLUN = pBusLogicDevice->iLUN;
2449
2450	return VINF_SUCCESS;
2451	}
2452
2453	static int buslogicDeviceSCSIRequestSetup(PBUSLOGIC pBusLogic, PBUSLOGICTASKSTATE pTaskState)
2454	{
2455	int rc = VINF_SUCCESS;
2456
2457	/* Fetch the CCB from guest memory. */
2458	RTGCPHYS GCPhysAddrCCB = (RTGCPHYS)pTaskState->MailboxGuest.u32PhysAddrCCB;
2459	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrCCB,
2460	&pTaskState->CommandControlBlockGuest, sizeof(CommandControlBlock));
2461
2462	PBUSLOGICDEVICE pTargetDevice = &pBusLogic->aDeviceStates[pTaskState->CommandControlBlockGuest.uTargetId];
2463	pTaskState->CTX_SUFF(pTargetDevice) = pTargetDevice;
2464
2465	#ifdef DEBUG
2466	buslogicDumpCCBInfo(&pTaskState->CommandControlBlockGuest);
2467	#endif
2468
2469	/* Alloc required buffers. */
2470	rc = buslogicDataBufferAlloc(pTaskState);
2471	AssertMsgRC(rc, ("Alloc failed rc=%Rrc\n", rc));
2472
2473	if (pTaskState->CommandControlBlockGuest.cbSenseData)
2474	{
2475	rc = buslogicSenseBufferAlloc(pTaskState);
2476	AssertMsgRC(rc, ("Mapping sense buffer failed rc=%Rrc\n", rc));
2477	}
2478
2479	/* Check if device is present on bus. If not return error immediately and don't process this further. */
2480	if (!pBusLogic->aDeviceStates[pTaskState->CommandControlBlockGuest.uTargetId].fPresent)
2481	{
2482	buslogicDataBufferFree(pTaskState);
2483
2484	if (pTaskState->pbSenseBuffer)
2485	buslogicSenseBufferFree(pTaskState, true);
2486
2487	buslogicSendIncomingMailbox(pBusLogic, pTaskState,
2488	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_SELECTION_TIMEOUT,
2489	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
2490	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
2491
2492	RTMemCacheFree(pBusLogic->hTaskCache, pTaskState);
2493	}
2494	else
2495	{
2496	/* Setup SCSI request. */
2497	pTaskState->PDMScsiRequest.uLogicalUnit = pTaskState->CommandControlBlockGuest.uLogicalUnit;
2498
2499	if (pTaskState->CommandControlBlockGuest.uDataDirection == BUSLOGIC_CCB_DIRECTION_UNKNOWN)
2500	pTaskState->PDMScsiRequest.uDataDirection = PDMSCSIREQUESTTXDIR_UNKNOWN;
2501	else if (pTaskState->CommandControlBlockGuest.uDataDirection == BUSLOGIC_CCB_DIRECTION_IN)
2502	pTaskState->PDMScsiRequest.uDataDirection = PDMSCSIREQUESTTXDIR_FROM_DEVICE;
2503	else if (pTaskState->CommandControlBlockGuest.uDataDirection == BUSLOGIC_CCB_DIRECTION_OUT)
2504	pTaskState->PDMScsiRequest.uDataDirection = PDMSCSIREQUESTTXDIR_TO_DEVICE;
2505	else if (pTaskState->CommandControlBlockGuest.uDataDirection == BUSLOGIC_CCB_DIRECTION_NO_DATA)
2506	pTaskState->PDMScsiRequest.uDataDirection = PDMSCSIREQUESTTXDIR_NONE;
2507	else
2508	AssertMsgFailed(("Invalid data direction type %d\n", pTaskState->CommandControlBlockGuest.uDataDirection));
2509
2510	pTaskState->PDMScsiRequest.cbCDB = pTaskState->CommandControlBlockGuest.cbCDB;
2511	pTaskState->PDMScsiRequest.pbCDB = pTaskState->CommandControlBlockGuest.aCDB;
2512	if (pTaskState->DataSeg.cbSeg)
2513	{
2514	pTaskState->PDMScsiRequest.cbScatterGather = pTaskState->DataSeg.cbSeg;
2515	pTaskState->PDMScsiRequest.cScatterGatherEntries = 1;
2516	pTaskState->PDMScsiRequest.paScatterGatherHead = &pTaskState->DataSeg;
2517	}
2518	else
2519	{
2520	pTaskState->PDMScsiRequest.cbScatterGather = 0;
2521	pTaskState->PDMScsiRequest.cScatterGatherEntries = 0;
2522	pTaskState->PDMScsiRequest.paScatterGatherHead = NULL;
2523	}
2524	pTaskState->PDMScsiRequest.cbSenseBuffer = pTaskState->CommandControlBlockGuest.cbSenseData;
2525	pTaskState->PDMScsiRequest.pbSenseBuffer = pTaskState->pbSenseBuffer;
2526	pTaskState->PDMScsiRequest.pvUser = pTaskState;
2527
2528	ASMAtomicIncU32(&pTargetDevice->cOutstandingRequests);
2529	rc = pTargetDevice->pDrvSCSIConnector->pfnSCSIRequestSend(pTargetDevice->pDrvSCSIConnector, &pTaskState->PDMScsiRequest);
2530	AssertMsgRC(rc, ("Sending request to SCSI layer failed rc=%Rrc\n", rc));
2531	}
2532
2533	return rc;
2534	}
2535
2536	/**
2537	* Read mailbox from the guest and execute command.
2538	*
2539	* @returns VBox status code.
2540	* @param pBusLogic Pointer to the BusLogic instance data.
2541	*/
2542	static int buslogicProcessMailboxNext(PBUSLOGIC pBusLogic)
2543	{
2544	PBUSLOGICTASKSTATE pTaskState = NULL;
2545	RTGCPHYS GCPhysAddrMailboxCurrent;
2546	int rc;
2547
2548	rc = RTMemCacheAllocEx(pBusLogic->hTaskCache, (void **)&pTaskState);
2549	AssertMsgReturn(RT_SUCCESS(rc) && (pTaskState != NULL), ("Failed to get task state from cache\n"), rc);
2550
2551	pTaskState->fBIOS = false;
2552
2553	if (!pBusLogic->fStrictRoundRobinMode)
2554	{
2555	/* Search for a filled mailbox - stop if we have scanned all mailboxes. */
2556	uint8_t uMailboxPosCur = pBusLogic->uMailboxOutgoingPositionCurrent;
2557
2558	do
2559	{
2560	/* Fetch mailbox from guest memory. */
2561	GCPhysAddrMailboxCurrent = buslogicOutgoingMailboxGetGCPhys(pBusLogic);
2562
2563	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxCurrent,
2564	&pTaskState->MailboxGuest, sizeof(Mailbox));
2565
2566	/* Check the next mailbox. */
2567	buslogicOutgoingMailboxAdvance(pBusLogic);
2568	} while ( pTaskState->MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE
2569	&& uMailboxPosCur != pBusLogic->uMailboxOutgoingPositionCurrent);
2570	}
2571	else
2572	{
2573	/* Fetch mailbox from guest memory. */
2574	GCPhysAddrMailboxCurrent = buslogicOutgoingMailboxGetGCPhys(pBusLogic);
2575
2576	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxCurrent,
2577	&pTaskState->MailboxGuest, sizeof(Mailbox));
2578	}
2579
2580	/*
2581	* Check if the mailbox is actually loaded.
2582	* It might be possible that the guest notified us without
2583	* a loaded mailbox. Do nothing in that case but leave a
2584	* log entry.
2585	*/
2586	if (pTaskState->MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE)
2587	{
2588	Log(("No loaded mailbox left\n"));
2589	RTMemCacheFree(pBusLogic->hTaskCache, pTaskState);
2590	return VERR_NO_DATA;
2591	}
2592
2593	LogFlow(("Got loaded mailbox at slot %u, CCB phys %RGp\n", pBusLogic->uMailboxOutgoingPositionCurrent, (RTGCPHYS)pTaskState->MailboxGuest.u32PhysAddrCCB));
2594	#ifdef DEBUG
2595	buslogicDumpMailboxInfo(&pTaskState->MailboxGuest, true);
2596	#endif
2597
2598	/* We got the mailbox, mark it as free in the guest. */
2599	uint8_t uActionCode = BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE;
2600	PDMDevHlpPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxCurrent + RT_OFFSETOF(Mailbox, u.out.uActionCode), &uActionCode, sizeof(uActionCode));
2601
2602	if (pTaskState->MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_START_COMMAND)
2603	rc = buslogicDeviceSCSIRequestSetup(pBusLogic, pTaskState);
2604	else if (pTaskState->MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_ABORT_COMMAND)
2605	{
2606	AssertMsgFailed(("Not implemented yet\n"));
2607	}
2608	else
2609	AssertMsgFailed(("Invalid outgoing mailbox action code %u\n", pTaskState->MailboxGuest.u.out.uActionCode));
2610
2611	AssertRC(rc);
2612
2613	/* Advance to the next mailbox. */
2614	if (pBusLogic->fStrictRoundRobinMode)
2615	buslogicOutgoingMailboxAdvance(pBusLogic);
2616
2617	return rc;
2618	}
2619
2620	/**
2621	* Transmit queue consumer
2622	* Queue a new async task.
2623	*
2624	* @returns Success indicator.
2625	* If false the item will not be removed and the flushing will stop.
2626	* @param pDevIns The device instance.
2627	* @param pItem The item to consume. Upon return this item will be freed.
2628	*/
2629	static DECLCALLBACK(bool) buslogicNotifyQueueConsumer(PPDMDEVINS pDevIns, PPDMQUEUEITEMCORE pItem)
2630	{
2631	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2632
2633	/* Reset notification send flag now. */
2634	Assert(pBusLogic->fNotificationSend);
2635	ASMAtomicXchgBool(&pBusLogic->fNotificationSend, false);
2636	ASMAtomicXchgU32(&pBusLogic->cMailboxesReady, 0); /* @todo: Actually not required anymore but to stay compatible with older saved states. */
2637
2638	/* Process mailboxes. */
2639	int rc;
2640	do
2641	{
2642	rc = buslogicProcessMailboxNext(pBusLogic);
2643	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_NO_DATA, ("Processing mailbox failed rc=%Rrc\n", rc));
2644	} while (RT_SUCCESS(rc));
2645
2646	return true;
2647	}
2648
2649	/**
2650	* Kicks the controller to process pending tasks after the VM was resumed
2651	* or loaded from a saved state.
2652	*
2653	* @returns nothing.
2654	* @param pThis The BusLogic device instance.
2655	*/
2656	static void buslogicKick(PBUSLOGIC pThis)
2657	{
2658	if (pThis->fRedo)
2659	{
2660	pThis->fRedo = false;
2661	if (pThis->VBoxSCSI.fBusy)
2662	{
2663
2664	/* The BIOS had a request active when we got suspended. Resume it. */
2665	int rc = buslogicPrepareBIOSSCSIRequest(pThis);
2666	AssertRC(rc);
2667	}
2668	else
2669	{
2670	/* Queue all pending tasks again. */
2671	PBUSLOGICTASKSTATE pTaskState = pThis->pTasksRedoHead;
2672
2673	pThis->pTasksRedoHead = NULL;
2674
2675	while (pTaskState)
2676	{
2677	PBUSLOGICTASKSTATE pCur = pTaskState;
2678
2679	int rc = buslogicDeviceSCSIRequestSetup(pThis, pCur);
2680	AssertRC(rc);
2681
2682	pTaskState = pTaskState->pRedoNext;
2683	}
2684	}
2685	}
2686	}
2687
2688	static DECLCALLBACK(int) buslogicLiveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uPass)
2689	{
2690	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2691
2692	/* Save the device config. */
2693	for (unsigned i = 0; i < RT_ELEMENTS(pThis->aDeviceStates); i++)
2694	SSMR3PutBool(pSSM, pThis->aDeviceStates[i].fPresent);
2695
2696	return VINF_SSM_DONT_CALL_AGAIN;
2697	}
2698
2699	static DECLCALLBACK(int) buslogicSaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
2700	{
2701	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2702
2703	/* Every device first. */
2704	for (unsigned i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates); i++)
2705	{
2706	PBUSLOGICDEVICE pDevice = &pBusLogic->aDeviceStates[i];
2707
2708	AssertMsg(!pDevice->cOutstandingRequests,
2709	("There are still outstanding requests on this device\n"));
2710	SSMR3PutBool(pSSM, pDevice->fPresent);
2711	SSMR3PutU32(pSSM, pDevice->cOutstandingRequests);
2712	}
2713	/* Now the main device state. */
2714	SSMR3PutU8 (pSSM, pBusLogic->regStatus);
2715	SSMR3PutU8 (pSSM, pBusLogic->regInterrupt);
2716	SSMR3PutU8 (pSSM, pBusLogic->regGeometry);
2717	SSMR3PutMem (pSSM, &pBusLogic->LocalRam, sizeof(pBusLogic->LocalRam));
2718	SSMR3PutU8 (pSSM, pBusLogic->uOperationCode);
2719	SSMR3PutMem (pSSM, &pBusLogic->aCommandBuffer, sizeof(pBusLogic->aCommandBuffer));
2720	SSMR3PutU8 (pSSM, pBusLogic->iParameter);
2721	SSMR3PutU8 (pSSM, pBusLogic->cbCommandParametersLeft);
2722	SSMR3PutBool (pSSM, pBusLogic->fUseLocalRam);
2723	SSMR3PutMem (pSSM, pBusLogic->aReplyBuffer, sizeof(pBusLogic->aReplyBuffer));
2724	SSMR3PutU8 (pSSM, pBusLogic->iReply);
2725	SSMR3PutU8 (pSSM, pBusLogic->cbReplyParametersLeft);
2726	SSMR3PutBool (pSSM, pBusLogic->fIRQEnabled);
2727	SSMR3PutU8 (pSSM, pBusLogic->uISABaseCode);
2728	SSMR3PutU32 (pSSM, pBusLogic->cMailbox);
2729	SSMR3PutGCPhys(pSSM, pBusLogic->GCPhysAddrMailboxOutgoingBase);
2730	SSMR3PutU32 (pSSM, pBusLogic->uMailboxOutgoingPositionCurrent);
2731	SSMR3PutU32 (pSSM, pBusLogic->cMailboxesReady);
2732	SSMR3PutBool (pSSM, pBusLogic->fNotificationSend);
2733	SSMR3PutGCPhys(pSSM, pBusLogic->GCPhysAddrMailboxIncomingBase);
2734	SSMR3PutU32 (pSSM, pBusLogic->uMailboxIncomingPositionCurrent);
2735	SSMR3PutBool (pSSM, pBusLogic->fStrictRoundRobinMode);
2736	SSMR3PutBool (pSSM, pBusLogic->fExtendedLunCCBFormat);
2737	/* Now the data for the BIOS interface. */
2738	SSMR3PutU8 (pSSM, pBusLogic->VBoxSCSI.regIdentify);
2739	SSMR3PutU8 (pSSM, pBusLogic->VBoxSCSI.uTargetDevice);
2740	SSMR3PutU8 (pSSM, pBusLogic->VBoxSCSI.uTxDir);
2741	SSMR3PutU8 (pSSM, pBusLogic->VBoxSCSI.cbCDB);
2742	SSMR3PutMem (pSSM, pBusLogic->VBoxSCSI.aCDB, sizeof(pBusLogic->VBoxSCSI.aCDB));
2743	SSMR3PutU8 (pSSM, pBusLogic->VBoxSCSI.iCDB);
2744	SSMR3PutU32 (pSSM, pBusLogic->VBoxSCSI.cbBuf);
2745	SSMR3PutU32 (pSSM, pBusLogic->VBoxSCSI.iBuf);
2746	SSMR3PutBool (pSSM, pBusLogic->VBoxSCSI.fBusy);
2747	SSMR3PutU8 (pSSM, pBusLogic->VBoxSCSI.enmState);
2748	if (pBusLogic->VBoxSCSI.cbBuf)
2749	SSMR3PutMem(pSSM, pBusLogic->VBoxSCSI.pBuf, pBusLogic->VBoxSCSI.cbBuf);
2750
2751	/*
2752	* Save the physical addresses of the command control blocks of still pending tasks.
2753	* They are processed again on resume.
2754	*
2755	* The number of pending tasks needs to be determined first.
2756	*/
2757	uint32_t cTasks = 0;
2758
2759	PBUSLOGICTASKSTATE pTaskState = pBusLogic->pTasksRedoHead;
2760	if (pBusLogic->fRedo)
2761	{
2762	while (pTaskState)
2763	{
2764	cTasks++;
2765	pTaskState = pTaskState->pRedoNext;
2766	}
2767	}
2768	SSMR3PutU32(pSSM, cTasks);
2769
2770	/* Write the address of every task now. */
2771	pTaskState = pBusLogic->pTasksRedoHead;
2772	while (pTaskState)
2773	{
2774	SSMR3PutU32(pSSM, pTaskState->MailboxGuest.u32PhysAddrCCB);
2775	pTaskState = pTaskState->pRedoNext;
2776	}
2777
2778	return SSMR3PutU32(pSSM, ~0);
2779	}
2780
2781	static DECLCALLBACK(int) buslogicLoadDone(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
2782	{
2783	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2784
2785	buslogicRegisterISARange(pThis, pThis->uISABaseCode);
2786	buslogicKick(pThis);
2787	return VINF_SUCCESS;
2788	}
2789
2790	static DECLCALLBACK(int) buslogicLoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
2791	{
2792	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2793	int rc = VINF_SUCCESS;
2794
2795	/* We support saved states only from this and older versions. */
2796	if (uVersion > BUSLOGIC_SAVED_STATE_MINOR_VERSION)
2797	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
2798
2799	/* Every device first. */
2800	for (unsigned i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates); i++)
2801	{
2802	PBUSLOGICDEVICE pDevice = &pBusLogic->aDeviceStates[i];
2803
2804	AssertMsg(!pDevice->cOutstandingRequests,
2805	("There are still outstanding requests on this device\n"));
2806	bool fPresent;
2807	rc = SSMR3GetBool(pSSM, &fPresent);
2808	AssertRCReturn(rc, rc);
2809	if (pDevice->fPresent != fPresent)
2810	return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Target %u config mismatch: config=%RTbool state=%RTbool"), i, pDevice->fPresent, fPresent);
2811
2812	if (uPass == SSM_PASS_FINAL)
2813	SSMR3GetU32(pSSM, (uint32_t *)&pDevice->cOutstandingRequests);
2814	}
2815
2816	if (uPass != SSM_PASS_FINAL)
2817	return VINF_SUCCESS;
2818
2819	/* Now the main device state. */
2820	SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->regStatus);
2821	SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->regInterrupt);
2822	SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->regGeometry);
2823	SSMR3GetMem (pSSM, &pBusLogic->LocalRam, sizeof(pBusLogic->LocalRam));
2824	SSMR3GetU8 (pSSM, &pBusLogic->uOperationCode);
2825	SSMR3GetMem (pSSM, &pBusLogic->aCommandBuffer, sizeof(pBusLogic->aCommandBuffer));
2826	SSMR3GetU8 (pSSM, &pBusLogic->iParameter);
2827	SSMR3GetU8 (pSSM, &pBusLogic->cbCommandParametersLeft);
2828	SSMR3GetBool (pSSM, &pBusLogic->fUseLocalRam);
2829	SSMR3GetMem (pSSM, pBusLogic->aReplyBuffer, sizeof(pBusLogic->aReplyBuffer));
2830	SSMR3GetU8 (pSSM, &pBusLogic->iReply);
2831	SSMR3GetU8 (pSSM, &pBusLogic->cbReplyParametersLeft);
2832	SSMR3GetBool (pSSM, &pBusLogic->fIRQEnabled);
2833	SSMR3GetU8 (pSSM, &pBusLogic->uISABaseCode);
2834	SSMR3GetU32 (pSSM, &pBusLogic->cMailbox);
2835	SSMR3GetGCPhys(pSSM, &pBusLogic->GCPhysAddrMailboxOutgoingBase);
2836	SSMR3GetU32 (pSSM, &pBusLogic->uMailboxOutgoingPositionCurrent);
2837	SSMR3GetU32 (pSSM, (uint32_t *)&pBusLogic->cMailboxesReady);
2838	SSMR3GetBool (pSSM, (bool *)&pBusLogic->fNotificationSend);
2839	SSMR3GetGCPhys(pSSM, &pBusLogic->GCPhysAddrMailboxIncomingBase);
2840	SSMR3GetU32 (pSSM, &pBusLogic->uMailboxIncomingPositionCurrent);
2841	SSMR3GetBool (pSSM, &pBusLogic->fStrictRoundRobinMode);
2842	SSMR3GetBool (pSSM, &pBusLogic->fExtendedLunCCBFormat);
2843	/* Now the data for the BIOS interface. */
2844	SSMR3GetU8 (pSSM, &pBusLogic->VBoxSCSI.regIdentify);
2845	SSMR3GetU8 (pSSM, &pBusLogic->VBoxSCSI.uTargetDevice);
2846	SSMR3GetU8 (pSSM, &pBusLogic->VBoxSCSI.uTxDir);
2847	SSMR3GetU8 (pSSM, &pBusLogic->VBoxSCSI.cbCDB);
2848	SSMR3GetMem (pSSM, pBusLogic->VBoxSCSI.aCDB, sizeof(pBusLogic->VBoxSCSI.aCDB));
2849	SSMR3GetU8 (pSSM, &pBusLogic->VBoxSCSI.iCDB);
2850	SSMR3GetU32 (pSSM, &pBusLogic->VBoxSCSI.cbBuf);
2851	SSMR3GetU32 (pSSM, &pBusLogic->VBoxSCSI.iBuf);
2852	SSMR3GetBool(pSSM, (bool *)&pBusLogic->VBoxSCSI.fBusy);
2853	SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->VBoxSCSI.enmState);
2854	if (pBusLogic->VBoxSCSI.cbBuf)
2855	{
2856	pBusLogic->VBoxSCSI.pBuf = (uint8_t *)RTMemAllocZ(pBusLogic->VBoxSCSI.cbBuf);
2857	if (!pBusLogic->VBoxSCSI.pBuf)
2858	{
2859	LogRel(("BusLogic: Out of memory during restore.\n"));
2860	return PDMDEV_SET_ERROR(pDevIns, VERR_NO_MEMORY,
2861	N_("BusLogic: Out of memory during restore\n"));
2862	}
2863	SSMR3GetMem(pSSM, pBusLogic->VBoxSCSI.pBuf, pBusLogic->VBoxSCSI.cbBuf);
2864	}
2865
2866	if (pBusLogic->VBoxSCSI.fBusy)
2867	pBusLogic->fRedo = true;
2868
2869	if (uVersion > BUSLOGIC_SAVED_STATE_MINOR_PRE_ERROR_HANDLING)
2870	{
2871	/* Check if there are pending tasks saved. */
2872	uint32_t cTasks = 0;
2873
2874	SSMR3GetU32(pSSM, &cTasks);
2875
2876	if (cTasks)
2877	pBusLogic->fRedo = true;
2878
2879	for (uint32_t i = 0; i < cTasks; i++)
2880	{
2881	PBUSLOGICTASKSTATE pTaskState = (PBUSLOGICTASKSTATE)RTMemCacheAlloc(pBusLogic->hTaskCache);
2882	if (!pTaskState)
2883	{
2884	rc = VERR_NO_MEMORY;
2885	break;
2886	}
2887
2888	rc = SSMR3GetU32(pSSM, &pTaskState->MailboxGuest.u32PhysAddrCCB);
2889	if (RT_FAILURE(rc))
2890	{
2891	RTMemCacheFree(pBusLogic->hTaskCache, pTaskState);
2892	break;
2893	}
2894
2895	/* Link into the list. */
2896	pTaskState->pRedoNext = pBusLogic->pTasksRedoHead;
2897	pBusLogic->pTasksRedoHead = pTaskState;
2898	}
2899	}
2900
2901	if (RT_SUCCESS(rc))
2902	{
2903	uint32_t u32;
2904	rc = SSMR3GetU32(pSSM, &u32);
2905	if (RT_SUCCESS(rc))
2906	AssertMsgReturn(u32 == ~0U, ("%#x\n", u32), VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2907	}
2908
2909	return rc;
2910	}
2911
2912	/**
2913	* Gets the pointer to the status LED of a device - called from the SCSi driver.
2914	*
2915	* @returns VBox status code.
2916	* @param pInterface Pointer to the interface structure containing the called function pointer.
2917	* @param iLUN The unit which status LED we desire. Always 0 here as the driver
2918	* doesn't know about other LUN's.
2919	* @param ppLed Where to store the LED pointer.
2920	*/
2921	static DECLCALLBACK(int) buslogicDeviceQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
2922	{
2923	PBUSLOGICDEVICE pDevice = PDMILEDPORTS_2_PBUSLOGICDEVICE(pInterface);
2924	if (iLUN == 0)
2925	{
2926	*ppLed = &pDevice->Led;
2927	Assert((*ppLed)->u32Magic == PDMLED_MAGIC);
2928	return VINF_SUCCESS;
2929	}
2930	return VERR_PDM_LUN_NOT_FOUND;
2931	}
2932
2933	/**
2934	* @interface_method_impl{PDMIBASE,pfnQueryInterface}
2935	*/
2936	static DECLCALLBACK(void ) buslogicDeviceQueryInterface(PPDMIBASE pInterface, const char pszIID)
2937	{
2938	PBUSLOGICDEVICE pDevice = PDMIBASE_2_PBUSLOGICDEVICE(pInterface);
2939	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pDevice->IBase);
2940	PDMIBASE_RETURN_INTERFACE(pszIID, PDMISCSIPORT, &pDevice->ISCSIPort);
2941	PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pDevice->ILed);
2942	return NULL;
2943	}
2944
2945	/**
2946	* Gets the pointer to the status LED of a unit.
2947	*
2948	* @returns VBox status code.
2949	* @param pInterface Pointer to the interface structure containing the called function pointer.
2950	* @param iLUN The unit which status LED we desire.
2951	* @param ppLed Where to store the LED pointer.
2952	*/
2953	static DECLCALLBACK(int) buslogicStatusQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
2954	{
2955	PBUSLOGIC pBusLogic = PDMILEDPORTS_2_PBUSLOGIC(pInterface);
2956	if (iLUN < BUSLOGIC_MAX_DEVICES)
2957	{
2958	*ppLed = &pBusLogic->aDeviceStates[iLUN].Led;
2959	Assert((*ppLed)->u32Magic == PDMLED_MAGIC);
2960	return VINF_SUCCESS;
2961	}
2962	return VERR_PDM_LUN_NOT_FOUND;
2963	}
2964
2965	/**
2966	* @interface_method_impl{PDMIBASE,pfnQueryInterface}
2967	*/
2968	static DECLCALLBACK(void ) buslogicStatusQueryInterface(PPDMIBASE pInterface, const char pszIID)
2969	{
2970	PBUSLOGIC pThis = PDMIBASE_2_PBUSLOGIC(pInterface);
2971	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->IBase);
2972	PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pThis->ILeds);
2973	return NULL;
2974	}
2975
2976	/* -=-=-=-=- Helper -=-=-=-=- */
2977
2978	/**
2979	* Checks if all asynchronous I/O is finished.
2980	*
2981	* Used by buslogicReset, buslogicSuspend and buslogicPowerOff.
2982	*
2983	* @returns true if quiesced, false if busy.
2984	* @param pDevIns The device instance.
2985	*/
2986	static bool buslogicR3AllAsyncIOIsFinished(PPDMDEVINS pDevIns)
2987	{
2988	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2989
2990	for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aDeviceStates); i++)
2991	{
2992	PBUSLOGICDEVICE pThisDevice = &pThis->aDeviceStates[i];
2993	if (pThisDevice->pDrvBase)
2994	{
2995	if (pThisDevice->cOutstandingRequests != 0)
2996	return false;
2997	}
2998	}
2999
3000	return true;
3001	}
3002
3003	/**
3004	* Callback employed by buslogicR3Suspend and buslogicR3PowerOff..
3005	*
3006	* @returns true if we've quiesced, false if we're still working.
3007	* @param pDevIns The device instance.
3008	*/
3009	static DECLCALLBACK(bool) buslogicR3IsAsyncSuspendOrPowerOffDone(PPDMDEVINS pDevIns)
3010	{
3011	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3012	return false;
3013
3014	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3015	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3016	return true;
3017	}
3018
3019	/**
3020	* Common worker for ahciR3Suspend and ahciR3PowerOff.
3021	*/
3022	static void buslogicR3SuspendOrPowerOff(PPDMDEVINS pDevIns, bool fPowerOff)
3023	{
3024	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3025
3026	ASMAtomicWriteBool(&pThis->fSignalIdle, true);
3027	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3028	PDMDevHlpSetAsyncNotification(pDevIns, buslogicR3IsAsyncSuspendOrPowerOffDone);
3029	else
3030	{
3031	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3032
3033	AssertMsg(!pThis->fNotificationSend, ("The PDM Queue should be empty at this point\n"));
3034
3035	if (pThis->fRedo)
3036	{
3037	if (fPowerOff)
3038	{
3039	/* Free tasks which would have been queued again on resume. */
3040	PBUSLOGICTASKSTATE pTaskState = pThis->pTasksRedoHead;
3041
3042	pThis->pTasksRedoHead = NULL;
3043
3044	while (pTaskState)
3045	{
3046	PBUSLOGICTASKSTATE pFree;
3047
3048	pFree = pTaskState;
3049	pTaskState = pTaskState->pRedoNext;
3050
3051	RTMemCacheFree(pThis->hTaskCache, pFree);
3052	}
3053	pThis->fRedo = false;
3054	}
3055	else if (pThis->VBoxSCSI.fBusy)
3056	{
3057	/* Destroy the task because the BIOS interface has all necessary information. */
3058	Assert(pThis->pTasksRedoHead->fBIOS);
3059	Assert(!pThis->pTasksRedoHead->pRedoNext);
3060
3061	RTMemCacheFree(pThis->hTaskCache, pThis->pTasksRedoHead);
3062	pThis->pTasksRedoHead = NULL;
3063	}
3064	}
3065	}
3066	}
3067
3068	/**
3069	* Suspend notification.
3070	*
3071	* @param pDevIns The device instance data.
3072	*/
3073	static DECLCALLBACK(void) buslogicSuspend(PPDMDEVINS pDevIns)
3074	{
3075	Log(("buslogicSuspend\n"));
3076	buslogicR3SuspendOrPowerOff(pDevIns, false /* fPoweroff */);
3077	}
3078
3079	/**
3080	* Resume notification.
3081	*
3082	* @param pDevIns The device instance data.
3083	*/
3084	static DECLCALLBACK(void) buslogicResume(PPDMDEVINS pDevIns)
3085	{
3086	Log(("buslogicResume\n"));
3087	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3088	buslogicKick(pThis);
3089	}
3090
3091
3092	/**
3093	* Detach notification.
3094	*
3095	* One harddisk at one port has been unplugged.
3096	* The VM is suspended at this point.
3097	*
3098	* @param pDevIns The device instance.
3099	* @param iLUN The logical unit which is being detached.
3100	* @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
3101	*/
3102	static DECLCALLBACK(void) buslogicDetach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
3103	{
3104	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3105	PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[iLUN];
3106
3107	Log(("%s:\n", __FUNCTION__));
3108
3109	AssertMsg(fFlags & PDM_TACH_FLAGS_NOT_HOT_PLUG,
3110	("BusLogic: Device does not support hotplugging\n"));
3111
3112	/*
3113	* Zero some important members.
3114	*/
3115	pDevice->pDrvBase = NULL;
3116	pDevice->fPresent = false;
3117	pDevice->pDrvSCSIConnector = NULL;
3118	}
3119
3120	/**
3121	* Attach command.
3122	*
3123	* This is called when we change block driver.
3124	*
3125	* @returns VBox status code.
3126	* @param pDevIns The device instance.
3127	* @param iLUN The logical unit which is being detached.
3128	* @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
3129	*/
3130	static DECLCALLBACK(int) buslogicAttach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
3131	{
3132	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3133	PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[iLUN];
3134	int rc;
3135
3136	AssertMsgReturn(fFlags & PDM_TACH_FLAGS_NOT_HOT_PLUG,
3137	("BusLogic: Device does not support hotplugging\n"),
3138	VERR_INVALID_PARAMETER);
3139
3140	/* the usual paranoia */
3141	AssertRelease(!pDevice->pDrvBase);
3142	AssertRelease(!pDevice->pDrvSCSIConnector);
3143	Assert(pDevice->iLUN == iLUN);
3144
3145	/*
3146	* Try attach the block device and get the interfaces,
3147	* required as well as optional.
3148	*/
3149	rc = PDMDevHlpDriverAttach(pDevIns, pDevice->iLUN, &pDevice->IBase, &pDevice->pDrvBase, NULL);
3150	if (RT_SUCCESS(rc))
3151	{
3152	/* Get SCSI connector interface. */
3153	pDevice->pDrvSCSIConnector = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMISCSICONNECTOR);
3154	AssertMsgReturn(pDevice->pDrvSCSIConnector, ("Missing SCSI interface below\n"), VERR_PDM_MISSING_INTERFACE);
3155	pDevice->fPresent = true;
3156	}
3157	else
3158	AssertMsgFailed(("Failed to attach LUN#%d. rc=%Rrc\n", pDevice->iLUN, rc));
3159
3160	if (RT_FAILURE(rc))
3161	{
3162	pDevice->pDrvBase = NULL;
3163	pDevice->pDrvSCSIConnector = NULL;
3164	}
3165	return rc;
3166	}
3167
3168	/**
3169	* Callback employed by buslogicR3Reset.
3170	*
3171	* @returns true if we've quiesced, false if we're still working.
3172	* @param pDevIns The device instance.
3173	*/
3174	static DECLCALLBACK(bool) buslogicR3IsAsyncResetDone(PPDMDEVINS pDevIns)
3175	{
3176	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3177
3178	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3179	return false;
3180	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3181
3182	buslogicHwReset(pThis, true);
3183	return true;
3184	}
3185
3186	/**
3187	* @copydoc FNPDMDEVRESET
3188	*/
3189	static DECLCALLBACK(void) buslogicReset(PPDMDEVINS pDevIns)
3190	{
3191	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3192
3193	ASMAtomicWriteBool(&pThis->fSignalIdle, true);
3194	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3195	PDMDevHlpSetAsyncNotification(pDevIns, buslogicR3IsAsyncResetDone);
3196	else
3197	{
3198	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3199	buslogicHwReset(pThis, true);
3200	}
3201	}
3202
3203	static DECLCALLBACK(void) buslogicRelocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)
3204	{
3205	uint32_t i;
3206	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3207
3208	pBusLogic->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
3209	pBusLogic->pNotifierQueueRC = PDMQueueRCPtr(pBusLogic->pNotifierQueueR3);
3210
3211	for (i = 0; i < BUSLOGIC_MAX_DEVICES; i++)
3212	{
3213	PBUSLOGICDEVICE pDevice = &pBusLogic->aDeviceStates[i];
3214
3215	pDevice->pBusLogicRC = PDMINS_2_DATA_RCPTR(pDevIns);
3216	}
3217
3218	}
3219
3220	/**
3221	* Poweroff notification.
3222	*
3223	* @param pDevIns Pointer to the device instance
3224	*/
3225	static DECLCALLBACK(void) buslogicPowerOff(PPDMDEVINS pDevIns)
3226	{
3227	Log(("buslogicPowerOff\n"));
3228	buslogicR3SuspendOrPowerOff(pDevIns, true /* fPoweroff */);
3229	}
3230
3231	/**
3232	* Destroy a driver instance.
3233	*
3234	* Most VM resources are freed by the VM. This callback is provided so that any non-VM
3235	* resources can be freed correctly.
3236	*
3237	* @param pDevIns The device instance data.
3238	*/
3239	static DECLCALLBACK(int) buslogicDestruct(PPDMDEVINS pDevIns)
3240	{
3241	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3242	PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns);
3243
3244	PDMR3CritSectDelete(&pThis->CritSectIntr);
3245
3246	/*
3247	* Free all tasks which are still hanging around
3248	* (Power off after the VM was suspended).
3249	*/
3250	if (pThis->fRedo)
3251	{
3252	/* Free tasks which would have been queued again on resume. */
3253	PBUSLOGICTASKSTATE pTaskState = pThis->pTasksRedoHead;
3254
3255	pThis->pTasksRedoHead = NULL;
3256
3257	while (pTaskState)
3258	{
3259	PBUSLOGICTASKSTATE pFree;
3260
3261	pFree = pTaskState;
3262	pTaskState = pTaskState->pRedoNext;
3263
3264	RTMemCacheFree(pThis->hTaskCache, pFree);
3265	}
3266	pThis->fRedo = false;
3267	}
3268
3269	int rc = RTMemCacheDestroy(pThis->hTaskCache);
3270	AssertMsgRC(rc, ("Destroying task cache failed rc=%Rrc\n", rc));
3271
3272	return rc;
3273	}
3274
3275	/**
3276	* @interface_method_impl{PDMDEVREG,pfnConstruct}
3277	*/
3278	static DECLCALLBACK(int) buslogicConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
3279	{
3280	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3281	int rc = VINF_SUCCESS;
3282	bool fBootable = true;
3283	char achISACompat[16];
3284	PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
3285
3286	/*
3287	* Validate and read configuration.
3288	*/
3289	if (!CFGMR3AreValuesValid(pCfg,
3290	"GCEnabled\0"
3291	"R0Enabled\0"
3292	"Bootable\0"
3293	"ISACompat\0"))
3294	return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
3295	N_("BusLogic configuration error: unknown option specified"));
3296
3297	rc = CFGMR3QueryBoolDef(pCfg, "GCEnabled", &pThis->fGCEnabled, true);
3298	if (RT_FAILURE(rc))
3299	return PDMDEV_SET_ERROR(pDevIns, rc,
3300	N_("BusLogic configuration error: failed to read GCEnabled as boolean"));
3301	Log(("%s: fGCEnabled=%d\n", __FUNCTION__, pThis->fGCEnabled));
3302
3303	rc = CFGMR3QueryBoolDef(pCfg, "R0Enabled", &pThis->fR0Enabled, true);
3304	if (RT_FAILURE(rc))
3305	return PDMDEV_SET_ERROR(pDevIns, rc,
3306	N_("BusLogic configuration error: failed to read R0Enabled as boolean"));
3307	Log(("%s: fR0Enabled=%d\n", __FUNCTION__, pThis->fR0Enabled));
3308	rc = CFGMR3QueryBoolDef(pCfg, "Bootable", &fBootable, true);
3309	if (RT_FAILURE(rc))
3310	return PDMDEV_SET_ERROR(pDevIns, rc,
3311	N_("BusLogic configuration error: failed to read Bootable as boolean"));
3312	Log(("%s: fBootable=%RTbool\n", __FUNCTION__, fBootable));
3313	rc = CFGMR3QueryStringDef(pCfg, "ISACompat", achISACompat, sizeof(achISACompat), "Alternate");
3314	if (RT_FAILURE(rc))
3315	return PDMDEV_SET_ERROR(pDevIns, rc,
3316	N_("BusLogic configuration error: failed to read ISACompat as string"));
3317	Log(("%s: ISACompat=%s\n", __FUNCTION__, achISACompat));
3318
3319	/* Grok the ISACompat setting. */
3320	if (!strcmp(achISACompat, "Disabled"))
3321	pThis->uDefaultISABaseCode = ISA_BASE_DISABLED;
3322	else if (!strcmp(achISACompat, "Primary"))
3323	pThis->uDefaultISABaseCode = 0; /* I/O base at 330h. */
3324	else if (!strcmp(achISACompat, "Alternate"))
3325	pThis->uDefaultISABaseCode = 1; /* I/O base at 334h. */
3326	else
3327	return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
3328	N_("BusLogic configuration error: invalid ISACompat setting"));
3329
3330	pThis->pDevInsR3 = pDevIns;
3331	pThis->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
3332	pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
3333	pThis->IBase.pfnQueryInterface = buslogicStatusQueryInterface;
3334	pThis->ILeds.pfnQueryStatusLed = buslogicStatusQueryStatusLed;
3335
3336	PCIDevSetVendorId (&pThis->dev, 0x104b); /* BusLogic */
3337	PCIDevSetDeviceId (&pThis->dev, 0x1040); /* BT-958 */
3338	PCIDevSetCommand (&pThis->dev, 0x0003);
3339	PCIDevSetRevisionId (&pThis->dev, 0x01);
3340	PCIDevSetClassProg (&pThis->dev, 0x00); /* SCSI */
3341	PCIDevSetClassSub (&pThis->dev, 0x00); /* SCSI */
3342	PCIDevSetClassBase (&pThis->dev, 0x01); /* Mass storage */
3343	PCIDevSetBaseAddress (&pThis->dev, 0, true /IO/, false /Pref/, false /64-bit/, 0x00000000);
3344	PCIDevSetBaseAddress (&pThis->dev, 1, false /IO/, false /Pref/, false /64-bit/, 0x00000000);
3345	PCIDevSetSubSystemVendorId(&pThis->dev, 0x104b);
3346	PCIDevSetSubSystemId (&pThis->dev, 0x1040);
3347	PCIDevSetInterruptLine (&pThis->dev, 0x00);
3348	PCIDevSetInterruptPin (&pThis->dev, 0x01);
3349
3350	/*
3351	* Register the PCI device and its I/O regions.
3352	*/
3353	rc = PDMDevHlpPCIRegister (pDevIns, &pThis->dev);
3354	if (RT_FAILURE(rc))
3355	return rc;
3356
3357	rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0, 32, PCI_ADDRESS_SPACE_IO, buslogicMMIOMap);
3358	if (RT_FAILURE(rc))
3359	return rc;
3360
3361	rc = PDMDevHlpPCIIORegionRegister(pDevIns, 1, 32, PCI_ADDRESS_SPACE_MEM, buslogicMMIOMap);
3362	if (RT_FAILURE(rc))
3363	return rc;
3364
3365	if (fBootable)
3366	{
3367	/* Register I/O port space for BIOS access. */
3368	rc = PDMDevHlpIOPortRegister(pDevIns, BUSLOGIC_BIOS_IO_PORT, 3, NULL,
3369	buslogicBIOSIOPortWrite, buslogicBIOSIOPortRead,
3370	buslogicBIOSIOPortWriteStr, buslogicBIOSIOPortReadStr,
3371	"BusLogic BIOS");
3372	if (RT_FAILURE(rc))
3373	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot register BIOS I/O handlers"));
3374	}
3375
3376	/* Set up the compatibility I/O range. */
3377	rc = buslogicRegisterISARange(pThis, pThis->uDefaultISABaseCode);
3378	if (RT_FAILURE(rc))
3379	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot register ISA I/O handlers"));
3380
3381	/* Initialize task cache. */
3382	rc = RTMemCacheCreate(&pThis->hTaskCache, sizeof(BUSLOGICTASKSTATE), 0, UINT32_MAX,
3383	NULL, NULL, NULL, 0);
3384	if (RT_FAILURE(rc))
3385	return PDMDEV_SET_ERROR(pDevIns, rc,
3386	N_("BusLogic: Failed to initialize task cache\n"));
3387
3388	/* Initialize task queue. */
3389	rc = PDMDevHlpQueueCreate(pDevIns, sizeof(PDMQUEUEITEMCORE), 5, 0,
3390	buslogicNotifyQueueConsumer, true, "BusLogicTask", &pThis->pNotifierQueueR3);
3391	if (RT_FAILURE(rc))
3392	return rc;
3393	pThis->pNotifierQueueR0 = PDMQueueR0Ptr(pThis->pNotifierQueueR3);
3394	pThis->pNotifierQueueRC = PDMQueueRCPtr(pThis->pNotifierQueueR3);
3395
3396	rc = PDMDevHlpCritSectInit(pDevIns, &pThis->CritSectIntr, RT_SRC_POS, "BusLogic-Intr#%u", pDevIns->iInstance);
3397	if (RT_FAILURE(rc))
3398	return PDMDEV_SET_ERROR(pDevIns, rc,
3399	N_("BusLogic: cannot create critical section"));
3400
3401	/* Initialize per device state. */
3402	for (unsigned i = 0; i < RT_ELEMENTS(pThis->aDeviceStates); i++)
3403	{
3404	char szName[24];
3405	PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[i];
3406
3407	RTStrPrintf(szName, sizeof(szName), "Device%d", i);
3408
3409	/* Initialize static parts of the device. */
3410	pDevice->iLUN = i;
3411	pDevice->pBusLogicR3 = pThis;
3412	pDevice->pBusLogicR0 = PDMINS_2_DATA_R0PTR(pDevIns);
3413	pDevice->pBusLogicRC = PDMINS_2_DATA_RCPTR(pDevIns);
3414	pDevice->Led.u32Magic = PDMLED_MAGIC;
3415	pDevice->IBase.pfnQueryInterface = buslogicDeviceQueryInterface;
3416	pDevice->ISCSIPort.pfnSCSIRequestCompleted = buslogicDeviceSCSIRequestCompleted;
3417	pDevice->ISCSIPort.pfnQueryDeviceLocation = buslogicQueryDeviceLocation;
3418	pDevice->ILed.pfnQueryStatusLed = buslogicDeviceQueryStatusLed;
3419
3420	/* Attach SCSI driver. */
3421	rc = PDMDevHlpDriverAttach(pDevIns, pDevice->iLUN, &pDevice->IBase, &pDevice->pDrvBase, szName);
3422	if (RT_SUCCESS(rc))
3423	{
3424	/* Get SCSI connector interface. */
3425	pDevice->pDrvSCSIConnector = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMISCSICONNECTOR);
3426	AssertMsgReturn(pDevice->pDrvSCSIConnector, ("Missing SCSI interface below\n"), VERR_PDM_MISSING_INTERFACE);
3427
3428	pDevice->fPresent = true;
3429	}
3430	else if (rc == VERR_PDM_NO_ATTACHED_DRIVER)
3431	{
3432	pDevice->pDrvBase = NULL;
3433	pDevice->fPresent = false;
3434	rc = VINF_SUCCESS;
3435	Log(("BusLogic: no driver attached to device %s\n", szName));
3436	}
3437	else
3438	{
3439	AssertLogRelMsgFailed(("BusLogic: Failed to attach %s\n", szName));
3440	return rc;
3441	}
3442	}
3443
3444	/*
3445	* Attach status driver (optional).
3446	*/
3447	PPDMIBASE pBase;
3448	rc = PDMDevHlpDriverAttach(pDevIns, PDM_STATUS_LUN, &pThis->IBase, &pBase, "Status Port");
3449	if (RT_SUCCESS(rc))
3450	pThis->pLedsConnector = PDMIBASE_QUERY_INTERFACE(pBase, PDMILEDCONNECTORS);
3451	else if (rc != VERR_PDM_NO_ATTACHED_DRIVER)
3452	{
3453	AssertMsgFailed(("Failed to attach to status driver. rc=%Rrc\n", rc));
3454	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot attach to status driver"));
3455	}
3456
3457	rc = PDMDevHlpSSMRegisterEx(pDevIns, BUSLOGIC_SAVED_STATE_MINOR_VERSION, sizeof(*pThis), NULL,
3458	NULL, buslogicLiveExec, NULL,
3459	NULL, buslogicSaveExec, NULL,
3460	NULL, buslogicLoadExec, buslogicLoadDone);
3461	if (RT_FAILURE(rc))
3462	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot register save state handlers"));
3463
3464	rc = buslogicHwReset(pThis, true);
3465	AssertMsgRC(rc, ("hardware reset of BusLogic host adapter failed rc=%Rrc\n", rc));
3466
3467	return rc;
3468	}
3469
3470	/**
3471	* The device registration structure.
3472	*/
3473	const PDMDEVREG g_DeviceBusLogic =
3474	{
3475	/* u32Version */
3476	PDM_DEVREG_VERSION,
3477	/* szName */
3478	"buslogic",
3479	/* szRCMod */
3480	"VBoxDDGC.gc",
3481	/* szR0Mod */
3482	"VBoxDDR0.r0",
3483	/* pszDescription */
3484	"BusLogic BT-958 SCSI host adapter.\n",
3485	/* fFlags */
3486	PDM_DEVREG_FLAGS_DEFAULT_BITS \| PDM_DEVREG_FLAGS_RC \| PDM_DEVREG_FLAGS_R0 \|
3487	PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION \| PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION \|
3488	PDM_DEVREG_FLAGS_FIRST_RESET_NOTIFICATION,
3489	/* fClass */
3490	PDM_DEVREG_CLASS_STORAGE,
3491	/* cMaxInstances */
3492	~0U,
3493	/* cbInstance */
3494	sizeof(BUSLOGIC),
3495	/* pfnConstruct */
3496	buslogicConstruct,
3497	/* pfnDestruct */
3498	buslogicDestruct,
3499	/* pfnRelocate */
3500	buslogicRelocate,
3501	/* pfnIOCtl */
3502	NULL,
3503	/* pfnPowerOn */
3504	NULL,
3505	/* pfnReset */
3506	buslogicReset,
3507	/* pfnSuspend */
3508	buslogicSuspend,
3509	/* pfnResume */
3510	buslogicResume,
3511	/* pfnAttach */
3512	buslogicAttach,
3513	/* pfnDetach */
3514	buslogicDetach,
3515	/* pfnQueryInterface. */
3516	NULL,
3517	/* pfnInitComplete */
3518	NULL,
3519	/* pfnPowerOff */
3520	buslogicPowerOff,
3521	/* pfnSoftReset */
3522	NULL,
3523	/* u32VersionEnd */
3524	PDM_DEVREG_VERSION
3525	};
3526
3527	#endif /* IN_RING3 */
3528	#endif /* !VBOX_DEVICE_STRUCT_TESTCASE */

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source: vbox/trunk/src/VBox/Devices/Storage/DevBusLogic.cpp@ 43642

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