VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d.cpp@ 98693

Last change on this file since 98693 was 98693, checked in by vboxsync, 2 years ago

Devices/Graphics: Copying with correct offset for destination rectangle, bugref:10341
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1/* $Id: DevVGA-SVGA3d.cpp 98693 2023-02-22 17:33:07Z vboxsync $ */
2/** @file
3 * DevSVGA3d - VMWare SVGA device, 3D parts - Common core code.
4 */
5
6/*
7 * Copyright (C) 2013-2023 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.215389.xyz.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 */
27
28
29/*********************************************************************************************************************************
30* Header Files *
31*********************************************************************************************************************************/
32#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
33#include <VBox/vmm/pdmdev.h>
34#include <iprt/errcore.h>
35#include <VBox/log.h>
36
37#include <iprt/assert.h>
38#include <iprt/mem.h>
39
40#include <VBox/vmm/pgm.h> /* required by DevVGA.h */
41#include <VBoxVideo.h> /* required by DevVGA.h */
42
43/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
44#include "DevVGA.h"
45
46#include "DevVGA-SVGA.h"
47#include "DevVGA-SVGA3d.h"
48#define VMSVGA3D_INCL_STRUCTURE_DESCRIPTORS
49#include "DevVGA-SVGA3d-internal.h"
50#include "DevVGA-SVGA-internal.h"
51
52
53static int vmsvga3dSurfaceAllocMipLevels(PVMSVGA3DSURFACE pSurface)
54{
55 /* Allocate buffer to hold the surface data until we can move it into a D3D object */
56 for (uint32_t i = 0; i < pSurface->cLevels * pSurface->surfaceDesc.numArrayElements; ++i)
57 {
58 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
59 AssertReturn(pMipmapLevel->pSurfaceData == NULL, VERR_INVALID_STATE);
60 pMipmapLevel->pSurfaceData = RTMemAllocZ(pMipmapLevel->cbSurface);
61 AssertReturn(pMipmapLevel->pSurfaceData, VERR_NO_MEMORY);
62 }
63 return VINF_SUCCESS;
64}
65
66
67static void vmsvga3dSurfaceFreeMipLevels(PVMSVGA3DSURFACE pSurface)
68{
69 for (uint32_t i = 0; i < pSurface->cLevels * pSurface->surfaceDesc.numArrayElements; ++i)
70 {
71 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
72 RTMemFreeZ(pMipmapLevel->pSurfaceData, pMipmapLevel->cbSurface);
73 pMipmapLevel->pSurfaceData = NULL;
74 }
75}
76
77
78/**
79 * Implements the SVGA_3D_CMD_SURFACE_DEFINE_V2 and SVGA_3D_CMD_SURFACE_DEFINE
80 * commands (fifo).
81 *
82 * @returns VBox status code (currently ignored).
83 * @param pThisCC The VGA/VMSVGA state for ring-3.
84 * @param sid The ID of the surface to (re-)define.
85 * @param surfaceFlags .
86 * @param format .
87 * @param multisampleCount .
88 * @param autogenFilter .
89 * @param numMipLevels .
90 * @param pMipLevel0Size .
91 * @param arraySize Number of elements in a texture array.
92 * @param fAllocMipLevels .
93 */
94int vmsvga3dSurfaceDefine(PVGASTATECC pThisCC, uint32_t sid, SVGA3dSurfaceAllFlags surfaceFlags, SVGA3dSurfaceFormat format,
95 uint32_t multisampleCount, SVGA3dTextureFilter autogenFilter,
96 uint32_t numMipLevels, SVGA3dSize const *pMipLevel0Size, uint32_t arraySize, bool fAllocMipLevels)
97{
98 PVMSVGA3DSURFACE pSurface;
99 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
100 AssertReturn(pState, VERR_INVALID_STATE);
101
102 LogFunc(("sid=%u surfaceFlags=%#x format=%s (%#x) multiSampleCount=%d autogenFilter=%d, numMipLevels=%d size=(%dx%dx%d)\n",
103 sid, surfaceFlags, vmsvgaLookupEnum((int)format, &g_SVGA3dSurfaceFormat2String), format, multisampleCount, autogenFilter,
104 numMipLevels, pMipLevel0Size->width, pMipLevel0Size->height, pMipLevel0Size->depth));
105
106 ASSERT_GUEST_RETURN(sid < SVGA3D_MAX_SURFACE_IDS, VERR_INVALID_PARAMETER);
107 ASSERT_GUEST_RETURN(numMipLevels >= 1 && numMipLevels <= SVGA3D_MAX_MIP_LEVELS, VERR_INVALID_PARAMETER);
108 ASSERT_GUEST_RETURN(arraySize <= SVGA3D_MAX_SURFACE_ARRAYSIZE, VERR_INVALID_PARAMETER);
109
110 if (sid >= pState->cSurfaces)
111 {
112 /* Grow the array. */
113 uint32_t cNew = RT_ALIGN(sid + 15, 16);
114 void *pvNew = RTMemRealloc(pState->papSurfaces, sizeof(pState->papSurfaces[0]) * cNew);
115 AssertReturn(pvNew, VERR_NO_MEMORY);
116 pState->papSurfaces = (PVMSVGA3DSURFACE *)pvNew;
117 while (pState->cSurfaces < cNew)
118 {
119 pSurface = (PVMSVGA3DSURFACE)RTMemAllocZ(sizeof(*pSurface));
120 AssertReturn(pSurface, VERR_NO_MEMORY);
121 pSurface->id = SVGA3D_INVALID_ID;
122 pState->papSurfaces[pState->cSurfaces++] = pSurface;
123 }
124 }
125 pSurface = pState->papSurfaces[sid];
126
127 /* If one already exists with this id, then destroy it now. */
128 if (pSurface->id != SVGA3D_INVALID_ID)
129 vmsvga3dSurfaceDestroy(pThisCC, sid);
130
131 RT_ZERO(*pSurface);
132 // pSurface->pBackendSurface = NULL;
133 pSurface->id = SVGA3D_INVALID_ID; /* Keep this value until the surface init completes */
134 pSurface->idAssociatedContext = SVGA3D_INVALID_ID;
135
136 if (arraySize)
137 pSurface->surfaceDesc.numArrayElements = arraySize; /* Also for an array of cubemaps where arraySize = 6 * numCubes. */
138 else if (surfaceFlags & SVGA3D_SURFACE_CUBEMAP)
139 pSurface->surfaceDesc.numArrayElements = SVGA3D_MAX_SURFACE_FACES;
140 else
141 pSurface->surfaceDesc.numArrayElements = 1;
142
143 /** @todo This 'switch' and the surfaceFlags tweaks should not be necessary.
144 * The actual surface type will be figured out when the surface is actually used later.
145 * The backends code must be reviewed for unnecessary dependencies on the surfaceFlags value.
146 */
147 /* The surface type is sort of undefined now, even though the hints and format can help to clear that up.
148 * In some case we'll have to wait until the surface is used to create the D3D object.
149 */
150 switch (format)
151 {
152 case SVGA3D_Z_D32:
153 case SVGA3D_Z_D16:
154 case SVGA3D_Z_D24S8:
155 case SVGA3D_Z_D15S1:
156 case SVGA3D_Z_D24X8:
157 case SVGA3D_Z_DF16:
158 case SVGA3D_Z_DF24:
159 case SVGA3D_Z_D24S8_INT:
160 Assert(surfaceFlags & SVGA3D_SURFACE_HINT_DEPTHSTENCIL);
161 surfaceFlags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
162 break;
163
164 /* Texture compression formats */
165 case SVGA3D_DXT1:
166 case SVGA3D_DXT2:
167 case SVGA3D_DXT3:
168 case SVGA3D_DXT4:
169 case SVGA3D_DXT5:
170 /* Bump-map formats */
171 case SVGA3D_BUMPU8V8:
172 case SVGA3D_BUMPL6V5U5:
173 case SVGA3D_BUMPX8L8V8U8:
174 case SVGA3D_V8U8:
175 case SVGA3D_Q8W8V8U8:
176 case SVGA3D_CxV8U8:
177 case SVGA3D_X8L8V8U8:
178 case SVGA3D_A2W10V10U10:
179 case SVGA3D_V16U16:
180 /* Typical render target formats; we should allow render target buffers to be used as textures. */
181 case SVGA3D_X8R8G8B8:
182 case SVGA3D_A8R8G8B8:
183 case SVGA3D_R5G6B5:
184 case SVGA3D_X1R5G5B5:
185 case SVGA3D_A1R5G5B5:
186 case SVGA3D_A4R4G4B4:
187 Assert(surfaceFlags & (SVGA3D_SURFACE_HINT_TEXTURE | SVGA3D_SURFACE_SCREENTARGET));
188 surfaceFlags |= SVGA3D_SURFACE_HINT_TEXTURE;
189 break;
190
191 case SVGA3D_LUMINANCE8:
192 case SVGA3D_LUMINANCE4_ALPHA4:
193 case SVGA3D_LUMINANCE16:
194 case SVGA3D_LUMINANCE8_ALPHA8:
195 case SVGA3D_ARGB_S10E5: /* 16-bit floating-point ARGB */
196 case SVGA3D_ARGB_S23E8: /* 32-bit floating-point ARGB */
197 case SVGA3D_A2R10G10B10:
198 case SVGA3D_ALPHA8:
199 case SVGA3D_R_S10E5:
200 case SVGA3D_R_S23E8:
201 case SVGA3D_RG_S10E5:
202 case SVGA3D_RG_S23E8:
203 case SVGA3D_G16R16:
204 case SVGA3D_A16B16G16R16:
205 case SVGA3D_UYVY:
206 case SVGA3D_YUY2:
207 case SVGA3D_NV12:
208 case SVGA3D_FORMAT_DEAD2: /* Old SVGA3D_AYUV */
209 case SVGA3D_ATI1:
210 case SVGA3D_ATI2:
211 break;
212
213 /*
214 * Any surface can be used as a buffer object, but SVGA3D_BUFFER is
215 * the most efficient format to use when creating new surfaces
216 * expressly for index or vertex data.
217 */
218 case SVGA3D_BUFFER:
219 break;
220
221 default:
222 break;
223 }
224
225 pSurface->f.surfaceFlags = surfaceFlags;
226 pSurface->format = format;
227 /* cFaces is 6 for a cubemaps and 1 otherwise. */
228 pSurface->cFaces = (uint32_t)((surfaceFlags & SVGA3D_SURFACE_CUBEMAP) ? 6 : 1);
229 pSurface->cLevels = numMipLevels;
230 pSurface->multiSampleCount = multisampleCount;
231 pSurface->autogenFilter = autogenFilter;
232 Assert(autogenFilter != SVGA3D_TEX_FILTER_FLATCUBIC);
233 Assert(autogenFilter != SVGA3D_TEX_FILTER_GAUSSIANCUBIC);
234 pSurface->paMipmapLevels = (PVMSVGA3DMIPMAPLEVEL)RTMemAllocZ(numMipLevels * pSurface->surfaceDesc.numArrayElements * sizeof(VMSVGA3DMIPMAPLEVEL));
235 AssertReturn(pSurface->paMipmapLevels, VERR_NO_MEMORY);
236
237 pSurface->cbBlock = vmsvga3dSurfaceFormatSize(format, &pSurface->cxBlock, &pSurface->cyBlock);
238 AssertReturn(pSurface->cbBlock, VERR_INVALID_PARAMETER);
239
240 /** @todo cbMemRemaining = value of SVGA_REG_MOB_MAX_SIZE */
241 uint32_t cbMemRemaining = SVGA3D_MAX_SURFACE_MEM_SIZE; /* Do not allow more than this for a surface. */
242 SVGA3dSize mipmapSize = *pMipLevel0Size;
243 int rc = VINF_SUCCESS;
244
245 for (uint32_t i = 0; i < numMipLevels; ++i)
246 {
247 for (uint32_t iArray = 0; iArray < pSurface->surfaceDesc.numArrayElements; ++iArray)
248 {
249 uint32_t const iMipmap = vmsvga3dCalcSubresource(i, iArray, numMipLevels);
250 LogFunc(("[%d] array %d mip level %d (%d,%d,%d) cbBlock=%#x block %dx%d\n",
251 iMipmap, iArray, i, mipmapSize.width, mipmapSize.height, mipmapSize.depth,
252 pSurface->cbBlock, pSurface->cxBlock, pSurface->cyBlock));
253
254 uint32_t cBlocksX;
255 uint32_t cBlocksY;
256 if (RT_LIKELY(pSurface->cxBlock == 1 && pSurface->cyBlock == 1))
257 {
258 cBlocksX = mipmapSize.width;
259 cBlocksY = mipmapSize.height;
260 }
261 else
262 {
263 cBlocksX = mipmapSize.width / pSurface->cxBlock;
264 if (mipmapSize.width % pSurface->cxBlock)
265 ++cBlocksX;
266 cBlocksY = mipmapSize.height / pSurface->cyBlock;
267 if (mipmapSize.height % pSurface->cyBlock)
268 ++cBlocksY;
269 }
270
271 AssertBreakStmt(cBlocksX > 0 && cBlocksY > 0 && mipmapSize.depth > 0, rc = VERR_INVALID_PARAMETER);
272
273 const uint32_t cMaxBlocksX = cbMemRemaining / pSurface->cbBlock;
274 AssertBreakStmt(cBlocksX < cMaxBlocksX, rc = VERR_INVALID_PARAMETER);
275
276 const uint32_t cbSurfacePitch = pSurface->cbBlock * cBlocksX;
277 LogFunc(("cbSurfacePitch=0x%x\n", cbSurfacePitch));
278
279 const uint32_t cMaxBlocksY = cbMemRemaining / cbSurfacePitch;
280 AssertBreakStmt(cBlocksY < cMaxBlocksY, rc = VERR_INVALID_PARAMETER);
281
282 const uint32_t cbSurfacePlane = cbSurfacePitch * cBlocksY;
283
284 const uint32_t cMaxDepth = cbMemRemaining / cbSurfacePlane;
285 AssertBreakStmt(mipmapSize.depth < cMaxDepth, rc = VERR_INVALID_PARAMETER);
286
287 const uint32_t cbSurface = cbSurfacePlane * mipmapSize.depth;
288
289 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[iMipmap];
290 pMipmapLevel->mipmapSize = mipmapSize;
291 pMipmapLevel->cBlocksX = cBlocksX;
292 pMipmapLevel->cBlocksY = cBlocksY;
293 pMipmapLevel->cBlocks = cBlocksX * cBlocksY * mipmapSize.depth;
294 pMipmapLevel->cbSurfacePitch = cbSurfacePitch;
295 pMipmapLevel->cbSurfacePlane = cbSurfacePlane;
296 pMipmapLevel->cbSurface = cbSurface;
297 pMipmapLevel->pSurfaceData = NULL;
298
299 cbMemRemaining -= cbSurface;
300 }
301
302 AssertRCBreak(rc);
303
304 mipmapSize.width >>= 1;
305 if (mipmapSize.width == 0) mipmapSize.width = 1;
306 mipmapSize.height >>= 1;
307 if (mipmapSize.height == 0) mipmapSize.height = 1;
308 mipmapSize.depth >>= 1;
309 if (mipmapSize.depth == 0) mipmapSize.depth = 1;
310 }
311
312 AssertLogRelRCReturnStmt(rc, RTMemFree(pSurface->paMipmapLevels), rc);
313
314 /* Compute the size of one array element. */
315 pSurface->surfaceDesc.cbArrayElement = 0;
316 for (uint32_t i = 0; i < pSurface->cLevels; ++i)
317 {
318 PVMSVGA3DMIPMAPLEVEL pMipLevel = &pSurface->paMipmapLevels[i];
319 pSurface->surfaceDesc.cbArrayElement += pMipLevel->cbSurface;
320 }
321
322 if (vmsvga3dIsLegacyBackend(pThisCC))
323 {
324#ifdef VMSVGA3D_DIRECT3D
325 /* pSurface->hSharedObject = NULL; */
326 /* pSurface->pSharedObjectTree = NULL; */
327 /* Translate the format and usage flags to D3D. */
328 pSurface->d3dfmtRequested = vmsvga3dSurfaceFormat2D3D(format);
329 pSurface->formatD3D = D3D9GetActualFormat(pState, pSurface->d3dfmtRequested);
330 pSurface->multiSampleTypeD3D= vmsvga3dMultipeSampleCount2D3D(multisampleCount);
331 pSurface->fUsageD3D = 0;
332 if (surfaceFlags & SVGA3D_SURFACE_HINT_DYNAMIC)
333 pSurface->fUsageD3D |= D3DUSAGE_DYNAMIC;
334 if (surfaceFlags & SVGA3D_SURFACE_HINT_RENDERTARGET)
335 pSurface->fUsageD3D |= D3DUSAGE_RENDERTARGET;
336 if (surfaceFlags & SVGA3D_SURFACE_HINT_DEPTHSTENCIL)
337 pSurface->fUsageD3D |= D3DUSAGE_DEPTHSTENCIL;
338 if (surfaceFlags & SVGA3D_SURFACE_HINT_WRITEONLY)
339 pSurface->fUsageD3D |= D3DUSAGE_WRITEONLY;
340 if (surfaceFlags & SVGA3D_SURFACE_AUTOGENMIPMAPS)
341 pSurface->fUsageD3D |= D3DUSAGE_AUTOGENMIPMAP;
342 pSurface->enmD3DResType = VMSVGA3D_D3DRESTYPE_NONE;
343 /* pSurface->u.pSurface = NULL; */
344 /* pSurface->bounce.pTexture = NULL; */
345 /* pSurface->emulated.pTexture = NULL; */
346#else
347 /* pSurface->oglId.buffer = OPENGL_INVALID_ID; */
348 /* pSurface->fEmulated = false; */
349 /* pSurface->idEmulated = OPENGL_INVALID_ID; */
350 vmsvga3dSurfaceFormat2OGL(pSurface, format);
351#endif
352 }
353
354#ifdef LOG_ENABLED
355 SVGA3dSurfaceAllFlags const f = surfaceFlags;
356 LogFunc(("surface flags:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s 0x%RX64\n",
357 (f & SVGA3D_SURFACE_CUBEMAP) ? " CUBEMAP" : "",
358 (f & SVGA3D_SURFACE_HINT_STATIC) ? " HINT_STATIC" : "",
359 (f & SVGA3D_SURFACE_HINT_DYNAMIC) ? " HINT_DYNAMIC" : "",
360 (f & SVGA3D_SURFACE_HINT_INDEXBUFFER) ? " HINT_INDEXBUFFER" : "",
361 (f & SVGA3D_SURFACE_HINT_VERTEXBUFFER) ? " HINT_VERTEXBUFFER" : "",
362 (f & SVGA3D_SURFACE_HINT_TEXTURE) ? " HINT_TEXTURE" : "",
363 (f & SVGA3D_SURFACE_HINT_RENDERTARGET) ? " HINT_RENDERTARGET" : "",
364 (f & SVGA3D_SURFACE_HINT_DEPTHSTENCIL) ? " HINT_DEPTHSTENCIL" : "",
365 (f & SVGA3D_SURFACE_HINT_WRITEONLY) ? " HINT_WRITEONLY" : "",
366 (f & SVGA3D_SURFACE_DEAD2) ? " DEAD2" : "",
367 (f & SVGA3D_SURFACE_AUTOGENMIPMAPS) ? " AUTOGENMIPMAPS" : "",
368 (f & SVGA3D_SURFACE_DEAD1) ? " DEAD1" : "",
369 (f & SVGA3D_SURFACE_MOB_PITCH) ? " MOB_PITCH" : "",
370 (f & SVGA3D_SURFACE_INACTIVE) ? " INACTIVE" : "",
371 (f & SVGA3D_SURFACE_HINT_RT_LOCKABLE) ? " HINT_RT_LOCKABLE" : "",
372 (f & SVGA3D_SURFACE_VOLUME) ? " VOLUME" : "",
373 (f & SVGA3D_SURFACE_SCREENTARGET) ? " SCREENTARGET" : "",
374 (f & SVGA3D_SURFACE_ALIGN16) ? " ALIGN16" : "",
375 (f & SVGA3D_SURFACE_1D) ? " 1D" : "",
376 (f & SVGA3D_SURFACE_ARRAY) ? " ARRAY" : "",
377 (f & SVGA3D_SURFACE_BIND_VERTEX_BUFFER) ? " BIND_VERTEX_BUFFER" : "",
378 (f & SVGA3D_SURFACE_BIND_INDEX_BUFFER) ? " BIND_INDEX_BUFFER" : "",
379 (f & SVGA3D_SURFACE_BIND_CONSTANT_BUFFER) ? " BIND_CONSTANT_BUFFER" : "",
380 (f & SVGA3D_SURFACE_BIND_SHADER_RESOURCE) ? " BIND_SHADER_RESOURCE" : "",
381 (f & SVGA3D_SURFACE_BIND_RENDER_TARGET) ? " BIND_RENDER_TARGET" : "",
382 (f & SVGA3D_SURFACE_BIND_DEPTH_STENCIL) ? " BIND_DEPTH_STENCIL" : "",
383 (f & SVGA3D_SURFACE_BIND_STREAM_OUTPUT) ? " BIND_STREAM_OUTPUT" : "",
384 (f & SVGA3D_SURFACE_STAGING_UPLOAD) ? " STAGING_UPLOAD" : "",
385 (f & SVGA3D_SURFACE_STAGING_DOWNLOAD) ? " STAGING_DOWNLOAD" : "",
386 (f & SVGA3D_SURFACE_HINT_INDIRECT_UPDATE) ? " HINT_INDIRECT_UPDATE" : "",
387 (f & SVGA3D_SURFACE_TRANSFER_FROM_BUFFER) ? " TRANSFER_FROM_BUFFER" : "",
388 (f & SVGA3D_SURFACE_RESERVED1) ? " RESERVED1" : "",
389 (f & SVGA3D_SURFACE_MULTISAMPLE) ? " MULTISAMPLE" : "",
390 (f & SVGA3D_SURFACE_BIND_UAVIEW) ? " BIND_UAVIEW" : "",
391 (f & SVGA3D_SURFACE_TRANSFER_TO_BUFFER) ? " TRANSFER_TO_BUFFER" : "",
392 (f & SVGA3D_SURFACE_BIND_LOGICOPS) ? " BIND_LOGICOPS" : "",
393 (f & SVGA3D_SURFACE_BIND_RAW_VIEWS) ? " BIND_RAW_VIEWS" : "",
394 (f & SVGA3D_SURFACE_BUFFER_STRUCTURED) ? " BUFFER_STRUCTURED" : "",
395 (f & SVGA3D_SURFACE_DRAWINDIRECT_ARGS) ? " DRAWINDIRECT_ARGS" : "",
396 (f & SVGA3D_SURFACE_RESOURCE_CLAMP) ? " RESOURCE_CLAMP" : "",
397 (f & SVGA3D_SURFACE_FLAG_MAX) ? " FLAG_MAX" : "",
398 f & ~(SVGA3D_SURFACE_FLAG_MAX - 1ULL)
399 ));
400#endif
401
402 Assert(!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface));
403
404 if (fAllocMipLevels)
405 {
406 rc = vmsvga3dSurfaceAllocMipLevels(pSurface);
407 AssertRCReturn(rc, rc);
408 }
409
410 pSurface->id = sid;
411 return VINF_SUCCESS;
412}
413
414
415/**
416 * Implements the SVGA_3D_CMD_SURFACE_DESTROY command (fifo).
417 *
418 * @returns VBox status code (currently ignored).
419 * @param pThisCC The VGA/VMSVGA state for ring-3.
420 * @param sid The ID of the surface to destroy.
421 */
422int vmsvga3dSurfaceDestroy(PVGASTATECC pThisCC, uint32_t sid)
423{
424 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
425 AssertReturn(pState, VERR_NO_MEMORY);
426
427 PVMSVGA3DSURFACE pSurface;
428 int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
429 AssertRCReturn(rc, rc);
430
431 LogFunc(("sid=%u\n", sid));
432
433 /* Check all contexts if this surface is used as a render target or active texture. */
434 for (uint32_t cid = 0; cid < pState->cContexts; cid++)
435 {
436 PVMSVGA3DCONTEXT pContext = pState->papContexts[cid];
437 if (pContext->id == cid)
438 {
439 for (uint32_t i = 0; i < RT_ELEMENTS(pContext->aSidActiveTextures); ++i)
440 if (pContext->aSidActiveTextures[i] == sid)
441 pContext->aSidActiveTextures[i] = SVGA3D_INVALID_ID;
442 for (uint32_t i = 0; i < RT_ELEMENTS(pContext->state.aRenderTargets); ++i)
443 if (pContext->state.aRenderTargets[i] == sid)
444 pContext->state.aRenderTargets[i] = SVGA3D_INVALID_ID;
445 }
446 }
447
448 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
449 if (pSvgaR3State->pFuncs3D)
450 pSvgaR3State->pFuncs3D->pfnSurfaceDestroy(pThisCC, true, pSurface);
451
452 if (pSurface->paMipmapLevels)
453 {
454 vmsvga3dSurfaceFreeMipLevels(pSurface);
455 RTMemFree(pSurface->paMipmapLevels);
456 }
457
458 memset(pSurface, 0, sizeof(*pSurface));
459 pSurface->id = SVGA3D_INVALID_ID;
460
461 return VINF_SUCCESS;
462}
463
464
465/**
466 * Implements the SVGA_3D_CMD_SURFACE_STRETCHBLT command (fifo).
467 *
468 * @returns VBox status code (currently ignored).
469 * @param pThis The shared VGA/VMSVGA state.
470 * @param pThisCC The VGA/VMSVGA state for ring-3.
471 * @param pDstSfcImg
472 * @param pDstBox
473 * @param pSrcSfcImg
474 * @param pSrcBox
475 * @param enmMode
476 */
477int vmsvga3dSurfaceStretchBlt(PVGASTATE pThis, PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pDstSfcImg, SVGA3dBox const *pDstBox,
478 SVGA3dSurfaceImageId const *pSrcSfcImg, SVGA3dBox const *pSrcBox, SVGA3dStretchBltMode enmMode)
479{
480 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
481 AssertReturn(pState, VERR_NO_MEMORY);
482
483 int rc;
484
485 uint32_t const sidSrc = pSrcSfcImg->sid;
486 PVMSVGA3DSURFACE pSrcSurface;
487 rc = vmsvga3dSurfaceFromSid(pState, sidSrc, &pSrcSurface);
488 AssertRCReturn(rc, rc);
489
490 uint32_t const sidDst = pDstSfcImg->sid;
491 PVMSVGA3DSURFACE pDstSurface;
492 rc = vmsvga3dSurfaceFromSid(pState, sidDst, &pDstSurface);
493 AssertRCReturn(rc, rc);
494
495 AssertReturn(pSrcSfcImg->face < pSrcSurface->cFaces, VERR_INVALID_PARAMETER);
496 AssertReturn(pSrcSfcImg->mipmap < pSrcSurface->cLevels, VERR_INVALID_PARAMETER);
497 AssertReturn(pDstSfcImg->face < pDstSurface->cFaces, VERR_INVALID_PARAMETER);
498 AssertReturn(pDstSfcImg->mipmap < pDstSurface->cLevels, VERR_INVALID_PARAMETER);
499
500 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
501 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
502
503 PVMSVGA3DCONTEXT pContext;
504#ifdef VMSVGA3D_OPENGL
505 LogFunc(("src sid=%u (%d,%d)(%d,%d) dest sid=%u (%d,%d)(%d,%d) mode=%x\n",
506 sidSrc, pSrcBox->x, pSrcBox->y, pSrcBox->x + pSrcBox->w, pSrcBox->y + pSrcBox->h,
507 sidDst, pDstBox->x, pDstBox->y, pDstBox->x + pDstBox->w, pDstBox->y + pDstBox->h, enmMode));
508 pContext = &pState->SharedCtx;
509 VMSVGA3D_SET_CURRENT_CONTEXT(pState, pContext);
510#else
511 LogFunc(("src sid=%u cid=%u (%d,%d)(%d,%d) dest sid=%u cid=%u (%d,%d)(%d,%d) mode=%x\n",
512 sidSrc, pSrcSurface->idAssociatedContext, pSrcBox->x, pSrcBox->y, pSrcBox->x + pSrcBox->w, pSrcBox->y + pSrcBox->h,
513 sidDst, pDstSurface->idAssociatedContext, pDstBox->x, pDstBox->y, pDstBox->x + pDstBox->w, pDstBox->y + pDstBox->h, enmMode));
514
515 uint32_t cid = pDstSurface->idAssociatedContext;
516 if (cid == SVGA3D_INVALID_ID)
517 cid = pSrcSurface->idAssociatedContext;
518
519 /* At least one of surfaces must be in hardware. */
520 AssertReturn(cid != SVGA3D_INVALID_ID, VERR_INVALID_PARAMETER);
521
522 rc = vmsvga3dContextFromCid(pState, cid, &pContext);
523 AssertRCReturn(rc, rc);
524#endif
525
526 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSrcSurface))
527 {
528 /* Unknown surface type; turn it into a texture, which can be used for other purposes too. */
529 LogFunc(("unknown src sid=%u type=%d format=%d -> create texture\n", sidSrc, pSrcSurface->f.s.surface1Flags, pSrcSurface->format));
530 rc = pSvgaR3State->pFuncs3D->pfnCreateTexture(pThisCC, pContext, pContext->id, pSrcSurface);
531 AssertRCReturn(rc, rc);
532 }
533
534 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pDstSurface))
535 {
536 /* Unknown surface type; turn it into a texture, which can be used for other purposes too. */
537 LogFunc(("unknown dest sid=%u type=%d format=%d -> create texture\n", sidDst, pDstSurface->f.s.surface1Flags, pDstSurface->format));
538 rc = pSvgaR3State->pFuncs3D->pfnCreateTexture(pThisCC, pContext, pContext->id, pDstSurface);
539 AssertRCReturn(rc, rc);
540 }
541
542 PVMSVGA3DMIPMAPLEVEL pSrcMipmapLevel;
543 rc = vmsvga3dMipmapLevel(pSrcSurface, pSrcSfcImg->face, pSrcSfcImg->mipmap, &pSrcMipmapLevel);
544 AssertRCReturn(rc, rc);
545
546 PVMSVGA3DMIPMAPLEVEL pDstMipmapLevel;
547 rc = vmsvga3dMipmapLevel(pDstSurface, pDstSfcImg->face, pDstSfcImg->mipmap, &pDstMipmapLevel);
548 AssertRCReturn(rc, rc);
549
550 SVGA3dBox clipSrcBox = *pSrcBox;
551 SVGA3dBox clipDstBox = *pDstBox;
552 vmsvgaR3ClipBox(&pSrcMipmapLevel->mipmapSize, &clipSrcBox);
553 vmsvgaR3ClipBox(&pDstMipmapLevel->mipmapSize, &clipDstBox);
554
555 return pSvgaR3State->pFuncs3D->pfnSurfaceStretchBlt(pThis, pState,
556 pDstSurface, pDstSfcImg->face, pDstSfcImg->mipmap, &clipDstBox,
557 pSrcSurface, pSrcSfcImg->face, pSrcSfcImg->mipmap, &clipSrcBox,
558 enmMode, pContext);
559}
560
561/**
562 * Implements the SVGA_3D_CMD_SURFACE_DMA command (fifo).
563 *
564 * @returns VBox status code (currently ignored).
565 * @param pThis The shared VGA/VMSVGA instance data.
566 * @param pThisCC The VGA/VMSVGA state for ring-3.
567 * @param guest .
568 * @param host .
569 * @param transfer .
570 * @param cCopyBoxes .
571 * @param paBoxes .
572 */
573int vmsvga3dSurfaceDMA(PVGASTATE pThis, PVGASTATECC pThisCC, SVGAGuestImage guest, SVGA3dSurfaceImageId host,
574 SVGA3dTransferType transfer, uint32_t cCopyBoxes, SVGA3dCopyBox *paBoxes)
575{
576 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
577 AssertReturn(pState, VERR_NO_MEMORY);
578
579 PVMSVGA3DSURFACE pSurface;
580 int rc = vmsvga3dSurfaceFromSid(pState, host.sid, &pSurface);
581 AssertRCReturn(rc, rc);
582
583 LogFunc(("%sguestptr gmr=%x offset=%x pitch=%x host sid=%u face=%d mipmap=%d transfer=%s cCopyBoxes=%d\n",
584 (pSurface->f.surfaceFlags & SVGA3D_SURFACE_HINT_TEXTURE) ? "TEXTURE " : "",
585 guest.ptr.gmrId, guest.ptr.offset, guest.pitch,
586 host.sid, host.face, host.mipmap, (transfer == SVGA3D_WRITE_HOST_VRAM) ? "READ" : "WRITE", cCopyBoxes));
587
588 PVMSVGA3DMIPMAPLEVEL pMipLevel;
589 rc = vmsvga3dMipmapLevel(pSurface, host.face, host.mipmap, &pMipLevel);
590 AssertRCReturn(rc, rc);
591
592 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
593 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
594
595 PVMSVGA3DCONTEXT pContext = NULL;
596 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
597 {
598 /*
599 * Not realized in host hardware/library yet, we have to work with
600 * the copy of the data we've got in VMSVGA3DMIMAPLEVEL::pSurfaceData.
601 */
602 if (!pMipLevel->pSurfaceData)
603 {
604 rc = vmsvga3dSurfaceAllocMipLevels(pSurface);
605 AssertRCReturn(rc, rc);
606 }
607 }
608 else if (vmsvga3dIsLegacyBackend(pThisCC))
609 {
610#ifdef VMSVGA3D_DIRECT3D
611 /* Flush the drawing pipeline for this surface as it could be used in a shared context. */
612 vmsvga3dSurfaceFlush(pSurface);
613#else /* VMSVGA3D_OPENGL */
614 pContext = &pState->SharedCtx;
615 VMSVGA3D_SET_CURRENT_CONTEXT(pState, pContext);
616#endif
617 }
618
619 /* SVGA_3D_CMD_SURFACE_DMA:
620 * "define the 'source' in each copyBox as the guest image and the
621 * 'destination' as the host image, regardless of transfer direction."
622 */
623 for (uint32_t i = 0; i < cCopyBoxes; ++i)
624 {
625 Log(("Copy box (%s) %d (%d,%d,%d)(%d,%d,%d) dest (%d,%d)\n",
626 VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface) ? "hw" : "mem",
627 i, paBoxes[i].srcx, paBoxes[i].srcy, paBoxes[i].srcz, paBoxes[i].w, paBoxes[i].h, paBoxes[i].d, paBoxes[i].x, paBoxes[i].y));
628
629 /* Apparently we're supposed to clip it (gmr test sample) */
630
631 /* The copybox's "dest" is coords in the host surface. Verify them against the surface's mipmap size. */
632 SVGA3dBox hostBox;
633 hostBox.x = paBoxes[i].x;
634 hostBox.y = paBoxes[i].y;
635 hostBox.z = paBoxes[i].z;
636 hostBox.w = paBoxes[i].w;
637 hostBox.h = paBoxes[i].h;
638 hostBox.d = paBoxes[i].d;
639 vmsvgaR3ClipBox(&pMipLevel->mipmapSize, &hostBox);
640
641 if ( !hostBox.w
642 || !hostBox.h
643 || !hostBox.d)
644 {
645 Log(("Skip empty box\n"));
646 continue;
647 }
648 RT_UNTRUSTED_VALIDATED_FENCE();
649
650 /* Adjust the guest, i.e. "src", point.
651 * Do not try to verify them here because vmsvgaR3GmrTransfer takes care of this.
652 */
653 uint32_t const srcx = paBoxes[i].srcx + (hostBox.x - paBoxes[i].x);
654 uint32_t const srcy = paBoxes[i].srcy + (hostBox.y - paBoxes[i].y);
655 uint32_t const srcz = paBoxes[i].srcz + (hostBox.z - paBoxes[i].z);
656
657 /* Calculate offsets of the image blocks for the transfer. */
658 uint32_t u32HostBlockX;
659 uint32_t u32HostBlockY;
660 uint32_t u32GuestBlockX;
661 uint32_t u32GuestBlockY;
662 uint32_t cBlocksX;
663 uint32_t cBlocksY;
664 if (RT_LIKELY(pSurface->cxBlock == 1 && pSurface->cyBlock == 1))
665 {
666 u32HostBlockX = hostBox.x;
667 u32HostBlockY = hostBox.y;
668
669 u32GuestBlockX = srcx;
670 u32GuestBlockY = srcy;
671
672 cBlocksX = hostBox.w;
673 cBlocksY = hostBox.h;
674 }
675 else
676 {
677 /* Pixels to blocks. */
678 u32HostBlockX = hostBox.x / pSurface->cxBlock;
679 u32HostBlockY = hostBox.y / pSurface->cyBlock;
680 Assert(u32HostBlockX * pSurface->cxBlock == hostBox.x);
681 Assert(u32HostBlockY * pSurface->cyBlock == hostBox.y);
682
683 u32GuestBlockX = srcx / pSurface->cxBlock;
684 u32GuestBlockY = srcy / pSurface->cyBlock;
685 Assert(u32GuestBlockX * pSurface->cxBlock == srcx);
686 Assert(u32GuestBlockY * pSurface->cyBlock == srcy);
687
688 cBlocksX = (hostBox.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
689 cBlocksY = (hostBox.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
690 }
691
692 uint32_t cbGuestPitch = guest.pitch;
693 if (cbGuestPitch == 0)
694 {
695 /* Host must "assume image is tightly packed". Our surfaces are. */
696 cbGuestPitch = pMipLevel->cbSurfacePitch;
697 }
698 else
699 {
700 /* vmsvgaR3GmrTransfer will verify the value, just check it is sane. */
701 AssertReturn(cbGuestPitch <= SVGA3D_MAX_SURFACE_MEM_SIZE, VERR_INVALID_PARAMETER);
702 RT_UNTRUSTED_VALIDATED_FENCE();
703 }
704
705 /* srcx, srcy and srcz values are used to calculate the guest offset.
706 * The offset will be verified by vmsvgaR3GmrTransfer, so just check for overflows here.
707 */
708 AssertReturn(srcz < UINT32_MAX / pMipLevel->mipmapSize.height / cbGuestPitch, VERR_INVALID_PARAMETER);
709 AssertReturn(u32GuestBlockY < UINT32_MAX / cbGuestPitch, VERR_INVALID_PARAMETER);
710 AssertReturn(u32GuestBlockX < UINT32_MAX / pSurface->cbBlock, VERR_INVALID_PARAMETER);
711 RT_UNTRUSTED_VALIDATED_FENCE();
712
713 if ( !VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface)
714 || VMSVGA3DSURFACE_NEEDS_DATA(pSurface))
715 {
716 uint64_t uGuestOffset = u32GuestBlockX * pSurface->cbBlock +
717 u32GuestBlockY * cbGuestPitch +
718 srcz * pMipLevel->mipmapSize.height * cbGuestPitch;
719 AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
720
721 /* vmsvga3dSurfaceDefine verifies the surface dimensions and clipBox is within them. */
722 uint32_t uHostOffset = u32HostBlockX * pSurface->cbBlock +
723 u32HostBlockY * pMipLevel->cbSurfacePitch +
724 hostBox.z * pMipLevel->cbSurfacePlane;
725 AssertReturn(uHostOffset < pMipLevel->cbSurface, VERR_INTERNAL_ERROR);
726
727 for (uint32_t z = 0; z < hostBox.d; ++z)
728 {
729 rc = vmsvgaR3GmrTransfer(pThis,
730 pThisCC,
731 transfer,
732 (uint8_t *)pMipLevel->pSurfaceData,
733 pMipLevel->cbSurface,
734 uHostOffset,
735 (int32_t)pMipLevel->cbSurfacePitch,
736 guest.ptr,
737 (uint32_t)uGuestOffset,
738 cbGuestPitch,
739 cBlocksX * pSurface->cbBlock,
740 cBlocksY);
741 AssertRC(rc);
742
743 Log4(("first line [z=%d] (updated at offset 0x%x):\n%.*Rhxd\n",
744 z, uHostOffset, pMipLevel->cbSurfacePitch, pMipLevel->pSurfaceData));
745
746 uHostOffset += pMipLevel->cbSurfacePlane;
747 uGuestOffset += pMipLevel->mipmapSize.height * cbGuestPitch;
748 AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
749 }
750 }
751
752 if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
753 {
754 SVGA3dCopyBox clipBox;
755 clipBox.x = hostBox.x;
756 clipBox.y = hostBox.y;
757 clipBox.z = hostBox.z;
758 clipBox.w = hostBox.w;
759 clipBox.h = hostBox.h;
760 clipBox.d = hostBox.d;
761 clipBox.srcx = srcx;
762 clipBox.srcy = srcy;
763 clipBox.srcz = srcz;
764 rc = pSvgaR3State->pFuncs3D->pfnSurfaceDMACopyBox(pThis, pThisCC, pState, pSurface, pMipLevel, host.face, host.mipmap,
765 guest.ptr, cbGuestPitch, transfer,
766 &clipBox, pContext, rc, i);
767 AssertRC(rc);
768 }
769 }
770
771 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
772 {
773 pMipLevel->fDirty = true;
774 pSurface->fDirty = true;
775 }
776
777 return rc;
778}
779
780static int vmsvga3dQueryWriteResult(PVGASTATE pThis, PVGASTATECC pThisCC, SVGAGuestPtr const *pGuestResult,
781 SVGA3dQueryState enmState, uint32_t u32Result)
782{
783 SVGA3dQueryResult queryResult;
784 queryResult.totalSize = sizeof(queryResult); /* Set by guest before query is ended. */
785 queryResult.state = enmState; /* Set by host or guest. See SVGA3dQueryState. */
786 queryResult.result32 = u32Result;
787
788 int rc = vmsvgaR3GmrTransfer(pThis, pThisCC, SVGA3D_READ_HOST_VRAM,
789 (uint8_t *)&queryResult, sizeof(queryResult), 0, sizeof(queryResult),
790 *pGuestResult, 0, sizeof(queryResult), sizeof(queryResult), 1);
791 AssertRC(rc);
792 return rc;
793}
794
795/* Used with saved state. */
796int vmsvga3dQueryCreate(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type)
797{
798 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
799 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
800
801 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
802 AssertReturn(pState, VERR_NO_MEMORY);
803
804 LogFunc(("cid=%u type=%d\n", cid, type));
805
806 PVMSVGA3DCONTEXT pContext;
807 int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
808 AssertRCReturn(rc, rc);
809
810 if (type == SVGA3D_QUERYTYPE_OCCLUSION)
811 {
812 VMSVGA3DQUERY *p = &pContext->occlusion;
813 if (!VMSVGA3DQUERY_EXISTS(p))
814 {
815 rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryCreate(pThisCC, pContext);
816 AssertRCReturn(rc, rc);
817 }
818
819 return VINF_SUCCESS;
820 }
821
822 /* Nothing else for VGPU9. */
823 AssertFailedReturn(VERR_NOT_IMPLEMENTED);
824}
825
826int vmsvga3dQueryBegin(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type)
827{
828 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
829 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
830
831 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
832 AssertReturn(pState, VERR_NO_MEMORY);
833
834 LogFunc(("cid=%u type=%d\n", cid, type));
835
836 PVMSVGA3DCONTEXT pContext;
837 int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
838 AssertRCReturn(rc, rc);
839
840 if (type == SVGA3D_QUERYTYPE_OCCLUSION)
841 {
842 VMSVGA3DQUERY *p = &pContext->occlusion;
843 if (!VMSVGA3DQUERY_EXISTS(p))
844 {
845 /* Lazy creation of the query object. */
846 rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryCreate(pThisCC, pContext);
847 AssertRCReturn(rc, rc);
848 }
849
850 rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryBegin(pThisCC, pContext);
851 AssertRCReturn(rc, rc);
852
853 p->enmQueryState = VMSVGA3DQUERYSTATE_BUILDING;
854 p->u32QueryResult = 0;
855
856 return VINF_SUCCESS;
857 }
858
859 /* Nothing else for VGPU9. */
860 AssertFailedReturn(VERR_NOT_IMPLEMENTED);
861}
862
863int vmsvga3dQueryEnd(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type)
864{
865 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
866 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
867
868 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
869 AssertReturn(pState, VERR_NO_MEMORY);
870
871 LogFunc(("cid=%u type=%d\n", cid, type));
872
873 PVMSVGA3DCONTEXT pContext;
874 int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
875 AssertRCReturn(rc, rc);
876
877 if (type == SVGA3D_QUERYTYPE_OCCLUSION)
878 {
879 VMSVGA3DQUERY *p = &pContext->occlusion;
880 Assert(p->enmQueryState == VMSVGA3DQUERYSTATE_BUILDING);
881 AssertMsgReturn(VMSVGA3DQUERY_EXISTS(p), ("Query is NULL\n"), VERR_INTERNAL_ERROR);
882
883 rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryEnd(pThisCC, pContext);
884 AssertRCReturn(rc, rc);
885
886 p->enmQueryState = VMSVGA3DQUERYSTATE_ISSUED;
887 return VINF_SUCCESS;
888 }
889
890 /* Nothing else for VGPU9. */
891 AssertFailedReturn(VERR_NOT_IMPLEMENTED);
892}
893
894int vmsvga3dQueryWait(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type, PVGASTATE pThis, SVGAGuestPtr const *pGuestResult)
895{
896 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
897 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
898
899 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
900 AssertReturn(pState, VERR_NO_MEMORY);
901
902 LogFunc(("cid=%u type=%d guestResult GMR%d:0x%x\n", cid, type, pGuestResult->gmrId, pGuestResult->offset));
903
904 PVMSVGA3DCONTEXT pContext;
905 int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
906 AssertRCReturn(rc, rc);
907
908 if (type == SVGA3D_QUERYTYPE_OCCLUSION)
909 {
910 VMSVGA3DQUERY *p = &pContext->occlusion;
911 if (VMSVGA3DQUERY_EXISTS(p))
912 {
913 if (p->enmQueryState == VMSVGA3DQUERYSTATE_ISSUED)
914 {
915 /* Only if not already in SIGNALED state,
916 * i.e. not a second read from the guest or after restoring saved state.
917 */
918 uint32_t u32Pixels = 0;
919 rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryGetData(pThisCC, pContext, &u32Pixels);
920 if (RT_SUCCESS(rc))
921 {
922 p->enmQueryState = VMSVGA3DQUERYSTATE_SIGNALED;
923 p->u32QueryResult += u32Pixels; /* += because it might contain partial result from saved state. */
924 }
925 }
926
927 if (RT_SUCCESS(rc))
928 {
929 /* pGuestResult can be NULL when saving the state. */
930 if (pGuestResult)
931 {
932 /* Return data to the guest. */
933 vmsvga3dQueryWriteResult(pThis, pThisCC, pGuestResult, SVGA3D_QUERYSTATE_SUCCEEDED, p->u32QueryResult);
934 }
935 return VINF_SUCCESS;
936 }
937 }
938 else
939 {
940 AssertMsgFailed(("GetData Query is NULL\n"));
941 }
942
943 rc = VERR_INTERNAL_ERROR;
944 }
945 else
946 {
947 rc = VERR_NOT_IMPLEMENTED;
948 }
949
950 if (pGuestResult)
951 vmsvga3dQueryWriteResult(pThis, pThisCC, pGuestResult, SVGA3D_QUERYSTATE_FAILED, 0);
952 AssertFailedReturn(rc);
953}
954
955int vmsvga3dSurfaceBlitToScreen(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t idDstScreen, SVGASignedRect destRect,
956 SVGA3dSurfaceImageId srcImage, SVGASignedRect srcRect, uint32_t cRects, SVGASignedRect *pRect)
957{
958 /* Requires SVGA_FIFO_CAP_SCREEN_OBJECT support */
959 LogFunc(("dest=%d (%d,%d)(%d,%d) sid=%u (face=%d, mipmap=%d) (%d,%d)(%d,%d) cRects=%d\n",
960 idDstScreen, destRect.left, destRect.top, destRect.right, destRect.bottom, srcImage.sid, srcImage.face, srcImage.mipmap,
961 srcRect.left, srcRect.top, srcRect.right, srcRect.bottom, cRects));
962 for (uint32_t i = 0; i < cRects; i++)
963 {
964 LogFunc(("clipping rect %d (%d,%d)(%d,%d)\n", i, pRect[i].left, pRect[i].top, pRect[i].right, pRect[i].bottom));
965 }
966
967 VMSVGASCREENOBJECT *pScreen = vmsvgaR3GetScreenObject(pThisCC, idDstScreen);
968 AssertReturn(pScreen, VERR_INTERNAL_ERROR);
969
970 /* vmwgfx driver does not always initialize srcImage.mipmap and srcImage.face. They are assumed to be zero. */
971 SVGA3dSurfaceImageId src;
972 src.sid = srcImage.sid;
973 src.mipmap = 0;
974 src.face = 0;
975
976 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
977 if (pScreen->pHwScreen)
978 {
979 /* Use the backend accelerated method, if available. */
980 if (pSvgaR3State->pFuncs3D)
981 {
982 int rc = pSvgaR3State->pFuncs3D->pfnSurfaceBlitToScreen(pThisCC, pScreen, destRect, src, srcRect, cRects, pRect);
983 if (rc == VINF_SUCCESS)
984 {
985 return VINF_SUCCESS;
986 }
987 }
988 }
989
990 if (pSvgaR3State->pFuncsMap)
991 return vmsvga3dScreenUpdate(pThisCC, idDstScreen, destRect, src, srcRect, cRects, pRect);
992
993 /** @todo scaling */
994 AssertReturn(destRect.right - destRect.left == srcRect.right - srcRect.left && destRect.bottom - destRect.top == srcRect.bottom - srcRect.top, VERR_INVALID_PARAMETER);
995
996 SVGA3dCopyBox box;
997 SVGAGuestImage dest;
998
999 box.srcz = 0;
1000 box.z = 0;
1001 box.d = 1;
1002
1003 dest.ptr.gmrId = SVGA_GMR_FRAMEBUFFER;
1004 dest.ptr.offset = pScreen->offVRAM;
1005 dest.pitch = pScreen->cbPitch;
1006
1007 if (cRects == 0)
1008 {
1009 /* easy case; no clipping */
1010
1011 /* SVGA_3D_CMD_SURFACE_DMA:
1012 * 'define the "source" in each copyBox as the guest image and the
1013 * "destination" as the host image, regardless of transfer direction.'
1014 *
1015 * Since the BlitToScreen operation transfers from a host surface to the guest VRAM,
1016 * it must set the copyBox "source" to the guest destination coords and
1017 * the copyBox "destination" to the host surface source coords.
1018 */
1019 /* Host image. */
1020 box.x = srcRect.left;
1021 box.y = srcRect.top;
1022 box.w = srcRect.right - srcRect.left;
1023 box.h = srcRect.bottom - srcRect.top;
1024 /* Guest image. */
1025 box.srcx = destRect.left;
1026 box.srcy = destRect.top;
1027
1028 int rc = vmsvga3dSurfaceDMA(pThis, pThisCC, dest, src, SVGA3D_READ_HOST_VRAM, 1, &box);
1029 AssertRCReturn(rc, rc);
1030
1031 /* Update the guest image, which is at box.src. */
1032 vmsvgaR3UpdateScreen(pThisCC, pScreen, box.srcx, box.srcy, box.w, box.h);
1033 }
1034 else
1035 {
1036 /** @todo merge into one SurfaceDMA call */
1037 for (uint32_t i = 0; i < cRects; i++)
1038 {
1039 /* "The clip rectangle coordinates are measured
1040 * relative to the top-left corner of destRect."
1041 * Therefore they are relative to the top-left corner of srcRect as well.
1042 */
1043
1044 /* Host image. See 'SVGA_3D_CMD_SURFACE_DMA:' comment in the 'if' branch. */
1045 box.x = srcRect.left + pRect[i].left;
1046 box.y = srcRect.top + pRect[i].top;
1047 box.w = pRect[i].right - pRect[i].left;
1048 box.h = pRect[i].bottom - pRect[i].top;
1049 /* Guest image. The target screen memory is currently in the guest VRAM. */
1050 box.srcx = destRect.left + pRect[i].left;
1051 box.srcy = destRect.top + pRect[i].top;
1052
1053 int rc = vmsvga3dSurfaceDMA(pThis, pThisCC, dest, src, SVGA3D_READ_HOST_VRAM, 1, &box);
1054 AssertRCReturn(rc, rc);
1055
1056 /* Update the guest image, which is at box.src. */
1057 vmsvgaR3UpdateScreen(pThisCC, pScreen, box.srcx, box.srcy, box.w, box.h);
1058 }
1059 }
1060
1061 return VINF_SUCCESS;
1062}
1063
1064int vmsvga3dScreenUpdate(PVGASTATECC pThisCC, uint32_t idDstScreen, SVGASignedRect const &dstRect,
1065 SVGA3dSurfaceImageId const &srcImage, SVGASignedRect const &srcRect,
1066 uint32_t cDstClipRects, SVGASignedRect *paDstClipRect)
1067{
1068 //DEBUG_BREAKPOINT_TEST();
1069 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1070
1071#ifdef LOG_ENABLED
1072 LogFunc(("[%u] %d,%d %d,%d (%dx%d) -> %d,%d %d,%d (%dx%d), %u clip rects\n",
1073 idDstScreen, srcRect.left, srcRect.top, srcRect.right, srcRect.bottom,
1074 srcRect.right - srcRect.left, srcRect.bottom - srcRect.top,
1075 dstRect.left, dstRect.top, dstRect.right, dstRect.bottom,
1076 dstRect.right - dstRect.left, dstRect.bottom - dstRect.top, cDstClipRects));
1077 for (uint32_t i = 0; i < cDstClipRects; i++)
1078 {
1079 LogFunc((" [%u] %d,%d %d,%d (%dx%d)\n",
1080 i, paDstClipRect[i].left, paDstClipRect[i].top, paDstClipRect[i].right, paDstClipRect[i].bottom,
1081 paDstClipRect[i].right - paDstClipRect[i].left, paDstClipRect[i].bottom - paDstClipRect[i].top));
1082 }
1083#endif
1084
1085 PVMSVGA3DSURFACE pSurface;
1086 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, srcImage.sid, &pSurface);
1087 AssertRCReturn(rc, rc);
1088
1089 /* Update the screen from a surface. */
1090 ASSERT_GUEST_RETURN(idDstScreen < RT_ELEMENTS(pSvgaR3State->aScreens), VERR_INVALID_PARAMETER);
1091 RT_UNTRUSTED_VALIDATED_FENCE();
1092
1093 VMSVGASCREENOBJECT *pScreen = &pSvgaR3State->aScreens[idDstScreen];
1094
1095 if ( srcRect.right <= srcRect.left
1096 || srcRect.bottom <= srcRect.top)
1097 return VINF_SUCCESS; /* Empty src rect. */
1098
1099 if ( dstRect.right <= dstRect.left
1100 || dstRect.bottom <= dstRect.top)
1101 return VINF_SUCCESS; /* Empty dst rect. */
1102 RT_UNTRUSTED_VALIDATED_FENCE();
1103
1104 ASSERT_GUEST_RETURN( srcRect.right - srcRect.left == dstRect.right - dstRect.left
1105 && srcRect.bottom - srcRect.top == dstRect.bottom - dstRect.top,
1106 VERR_INVALID_PARAMETER); /* Stretch is not supported. */
1107
1108 /* Destination box should be within the screen rectangle. */
1109 SVGA3dBox dstBox;
1110 dstBox.x = dstRect.left;
1111 dstBox.y = dstRect.top;
1112 dstBox.z = 0;
1113 dstBox.w = dstRect.right - dstRect.left;
1114 dstBox.h = dstRect.bottom - dstRect.top;
1115 dstBox.d = 1;
1116
1117 SVGA3dSize dstBound;
1118 dstBound.width = pScreen->cWidth;
1119 dstBound.height = pScreen->cHeight;
1120 dstBound.depth = 1;
1121
1122 vmsvgaR3ClipBox(&dstBound, &dstBox);
1123 ASSERT_GUEST_RETURN(dstBox.w > 0 && dstBox.h > 0, VERR_INVALID_PARAMETER);
1124 RT_UNTRUSTED_VALIDATED_FENCE();
1125
1126 /* All dst clip rects will be clipped by the dst box because
1127 * "The clip rectangle coordinates are measured relative to the top-left corner of destRect."
1128 * Therefore they are relative to the top-left corner of srcRect as well.
1129 */
1130 dstBound.width = dstBox.w;
1131 dstBound.height = dstBox.h;
1132 dstBound.depth = 1;
1133
1134 SVGA3dBox srcBox; /* SurfaceMap will clip the box as necessary (srcMap.box). */
1135 srcBox.x = srcRect.left;
1136 srcBox.y = srcRect.top;
1137 srcBox.z = 0;
1138 srcBox.w = srcRect.right - srcRect.left;
1139 srcBox.h = srcRect.bottom - srcRect.top;
1140 srcBox.d = 1;
1141
1142 VMSVGA3D_MAPPED_SURFACE srcMap;
1143 rc = vmsvga3dSurfaceMap(pThisCC, &srcImage, &srcBox, VMSVGA3D_SURFACE_MAP_READ, &srcMap);
1144 if (RT_SUCCESS(rc))
1145 {
1146 uint8_t const *pu8Src = (uint8_t *)srcMap.pvData;
1147
1148 uint32_t const cbDst = pScreen->cHeight * pScreen->cbPitch;
1149 uint32_t cbScreenPixel = RT_ALIGN(pScreen->cBpp, 8) / 8;
1150 uint8_t *pu8Dst;
1151 if (pScreen->pvScreenBitmap)
1152 pu8Dst = (uint8_t *)pScreen->pvScreenBitmap;
1153 else
1154 pu8Dst = (uint8_t *)pThisCC->pbVRam + pScreen->offVRAM;
1155
1156 SVGASignedRect dstClipRect;
1157 if (cDstClipRects == 0)
1158 {
1159 /* Entire source rect "relative to the top-left corner of destRect." */
1160 dstClipRect.left = 0;
1161 dstClipRect.top = 0;
1162 dstClipRect.right = dstBox.w;
1163 dstClipRect.bottom = dstBox.h;
1164
1165 cDstClipRects = 1;
1166 paDstClipRect = &dstClipRect;
1167 }
1168
1169 for (uint32_t i = 0; i < cDstClipRects; i++)
1170 {
1171 SVGASignedRect const *pDstClipRect = &paDstClipRect[i];
1172
1173 SVGA3dBox box;
1174 box.x = pDstClipRect->left;
1175 box.y = pDstClipRect->top;
1176 box.z = 0;
1177 box.w = pDstClipRect->right - pDstClipRect->left;
1178 box.h = pDstClipRect->bottom - pDstClipRect->top;
1179 box.d = 1;
1180
1181 vmsvgaR3ClipBox(&dstBound, &box);
1182 ASSERT_GUEST_CONTINUE(box.w > 0 && box.h > 0);
1183
1184 /* 'pu8Src' points to the mapped 'srcRect'. Take the clipping box into account. */
1185 uint8_t const *pu8SrcBox = pu8Src
1186 + ((box.x + pSurface->cxBlock - 1) / pSurface->cxBlock) * pSurface->cxBlock * pSurface->cbBlock
1187 + ((box.y + pSurface->cyBlock - 1) / pSurface->cyBlock) * pSurface->cyBlock * srcMap.cbRowPitch;
1188
1189 /* The 'box' is in coordinates relative to the top-left dstRect or srcRect corner.
1190 * The 'dstBoxAbs' and 'srcBoxAbs' are absolute coordinates of 'box' within screen object or texture face (respectively).
1191 */
1192 SVGA3dBox srcBoxAbs = box, dstBoxAbs = box;
1193
1194 srcBoxAbs.x += srcBox.x;
1195 srcBoxAbs.y += srcBox.y;
1196
1197 dstBoxAbs.x += dstBox.x;
1198 dstBoxAbs.y += dstBox.y;
1199
1200 uint32_t offDst = pScreen->cbPitch * dstBoxAbs.y + cbScreenPixel * dstBoxAbs.x;
1201
1202 VMSGA3D_BOX_DIMENSIONS srcDims;
1203 rc = vmsvga3dGetBoxDimensions(pThisCC, &srcImage, &srcBoxAbs, &srcDims);
1204 if (RT_SUCCESS(rc))
1205 {
1206 AssertContinue(srcDims.cyBlocks > 0);
1207
1208 ASSERT_GUEST_BREAK( offDst <= cbDst
1209 && pScreen->cbPitch * (srcDims.cyBlocks - 1) + srcDims.cbRow <= cbDst - offDst);
1210 RT_UNTRUSTED_VALIDATED_FENCE();
1211
1212 uint8_t *pu8DstBox = pu8Dst + offDst;
1213
1214 if ( pSurface->format == SVGA3D_R8G8B8A8_UNORM
1215 || pSurface->format == SVGA3D_R8G8B8A8_UNORM_SRGB)
1216 {
1217 for (uint32_t iRow = 0; iRow < srcDims.cyBlocks; ++iRow)
1218 {
1219 for (uint32_t x = 0; x < box.w * 4; x += 4) /* 'x' is a byte index. */
1220 {
1221 pu8DstBox[x ] = pu8SrcBox[x + 2];
1222 pu8DstBox[x + 1] = pu8SrcBox[x + 1];
1223 pu8DstBox[x + 2] = pu8SrcBox[x ];
1224 pu8DstBox[x + 3] = pu8SrcBox[x + 3];
1225 }
1226
1227 pu8SrcBox += srcMap.cbRowPitch;
1228 pu8DstBox += pScreen->cbPitch;
1229 }
1230 }
1231 else
1232 {
1233 for (uint32_t iRow = 0; iRow < srcDims.cyBlocks; ++iRow)
1234 {
1235 memcpy(pu8DstBox, pu8SrcBox, srcDims.cbRow);
1236
1237 pu8SrcBox += srcMap.cbRowPitch;
1238 pu8DstBox += pScreen->cbPitch;
1239 }
1240 }
1241 }
1242 }
1243
1244 vmsvga3dSurfaceUnmap(pThisCC, &srcImage, &srcMap, /* fWritten = */ false);
1245
1246 vmsvgaR3UpdateScreen(pThisCC, pScreen, dstBox.x, dstBox.y, dstBox.w, dstBox.h);
1247 }
1248
1249 return rc;
1250}
1251
1252int vmsvga3dCommandPresent(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t sid, uint32_t cRects, SVGA3dCopyRect *pRect)
1253{
1254 /* Deprecated according to svga3d_reg.h. */
1255 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1256 AssertReturn(pState, VERR_NO_MEMORY);
1257
1258 PVMSVGA3DSURFACE pSurface;
1259 int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
1260 AssertRCReturn(rc, rc);
1261
1262 /** @todo Detect screen from coords? Or split rect to screens? */
1263 VMSVGASCREENOBJECT *pScreen = vmsvgaR3GetScreenObject(pThisCC, 0);
1264 AssertReturn(pScreen, VERR_INTERNAL_ERROR);
1265
1266 /* If there are no recangles specified, just grab a screenful. */
1267 SVGA3dCopyRect DummyRect;
1268 if (cRects != 0)
1269 { /* likely */ }
1270 else
1271 {
1272 /** @todo Find the usecase for this or check what the original device does.
1273 * The original code was doing some scaling based on the surface
1274 * size... */
1275 AssertMsgFailed(("No rects to present. Who is doing that and what do they actually expect?\n"));
1276 DummyRect.x = DummyRect.srcx = 0;
1277 DummyRect.y = DummyRect.srcy = 0;
1278 DummyRect.w = pScreen->cWidth;
1279 DummyRect.h = pScreen->cHeight;
1280 cRects = 1;
1281 pRect = &DummyRect;
1282 }
1283
1284 uint32_t i;
1285 for (i = 0; i < cRects; ++i)
1286 {
1287 uint32_t idDstScreen = 0; /** @todo Use virtual coords: SVGA_ID_INVALID. */
1288 SVGASignedRect destRect;
1289 destRect.left = pRect[i].x;
1290 destRect.top = pRect[i].y;
1291 destRect.right = pRect[i].x + pRect[i].w;
1292 destRect.bottom = pRect[i].y + pRect[i].h;
1293
1294 SVGA3dSurfaceImageId src;
1295 src.sid = sid;
1296 src.face = 0;
1297 src.mipmap = 0;
1298
1299 SVGASignedRect srcRect;
1300 srcRect.left = pRect[i].srcx;
1301 srcRect.top = pRect[i].srcy;
1302 srcRect.right = pRect[i].srcx + pRect[i].w;
1303 srcRect.bottom = pRect[i].srcy + pRect[i].h;
1304
1305 /* Entire rect. */
1306 rc = vmsvga3dSurfaceBlitToScreen(pThis, pThisCC, idDstScreen, destRect, src, srcRect, 0, NULL);
1307 AssertRCReturn(rc, rc);
1308 }
1309
1310 return VINF_SUCCESS;
1311}
1312
1313int vmsvga3dDefineScreen(PVGASTATE pThis, PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1314{
1315 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1316 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1317
1318 if (pScreen->pHwScreen)
1319 {
1320 pSvgaR3State->pFuncs3D->pfnDestroyScreen(pThisCC, pScreen);
1321 }
1322
1323 int rc = pSvgaR3State->pFuncs3D->pfnDefineScreen(pThis, pThisCC, pScreen);
1324 if (RT_SUCCESS(rc))
1325 {
1326 LogRelMax(1, ("VMSVGA: using accelerated graphics output\n"));
1327 }
1328 return rc;
1329}
1330
1331int vmsvga3dDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1332{
1333 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1334 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1335
1336 return pSvgaR3State->pFuncs3D->pfnDestroyScreen(pThisCC, pScreen);
1337}
1338
1339int vmsvga3dSurfaceInvalidate(PVGASTATECC pThisCC, uint32_t sid, uint32_t face, uint32_t mipmap)
1340{
1341 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1342 AssertReturn(pState, VERR_INVALID_STATE);
1343
1344 PVMSVGA3DSURFACE pSurface;
1345 int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
1346 AssertRCReturn(rc, rc);
1347
1348 if (face == SVGA_ID_INVALID && mipmap == SVGA_ID_INVALID)
1349 {
1350 /* This is a notification that "All images can be lost", i.e. the backend surface is not needed anymore. */
1351 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1352 if (pSvgaR3State->pFuncs3D)
1353 pSvgaR3State->pFuncs3D->pfnSurfaceDestroy(pThisCC, false, pSurface);
1354
1355 for (uint32_t i = 0; i < pSurface->cLevels * pSurface->surfaceDesc.numArrayElements; ++i)
1356 {
1357 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
1358 pMipmapLevel->fDirty = true;
1359 }
1360 }
1361 else
1362 {
1363 PVMSVGA3DMIPMAPLEVEL pMipmapLevel;
1364 rc = vmsvga3dMipmapLevel(pSurface, face, mipmap, &pMipmapLevel);
1365 AssertRCReturn(rc, rc);
1366
1367 /* Invalidate views, etc. */
1368 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1369 if (pSvgaR3State->pFuncs3D)
1370 pSvgaR3State->pFuncs3D->pfnSurfaceInvalidateImage(pThisCC, pSurface, face, mipmap);
1371
1372 pMipmapLevel->fDirty = true;
1373 }
1374 pSurface->fDirty = true;
1375
1376 return rc;
1377}
1378
1379
1380/*
1381 *
1382 * 3D
1383 *
1384 */
1385
1386int vmsvga3dQueryCaps(PVGASTATECC pThisCC, SVGA3dDevCapIndex idx3dCaps, uint32_t *pu32Val)
1387{
1388 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1389 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1390 return pSvgaR3State->pFuncs3D->pfnQueryCaps(pThisCC, idx3dCaps, pu32Val);
1391}
1392
1393int vmsvga3dChangeMode(PVGASTATECC pThisCC)
1394{
1395 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1396 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1397 return pSvgaR3State->pFuncs3D->pfnChangeMode(pThisCC);
1398}
1399
1400int vmsvga3dSurfaceCopy(PVGASTATECC pThisCC, SVGA3dSurfaceImageId dest, SVGA3dSurfaceImageId src, uint32_t cCopyBoxes, SVGA3dCopyBox *pBox)
1401{
1402 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1403 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1404 return pSvgaR3State->pFuncs3D->pfnSurfaceCopy(pThisCC, dest, src, cCopyBoxes, pBox);
1405}
1406
1407void vmsvga3dUpdateHostScreenViewport(PVGASTATECC pThisCC, uint32_t idScreen, VMSVGAVIEWPORT const *pOldViewport)
1408{
1409 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1410 AssertReturnVoid(pSvgaR3State->pFuncs3D);
1411 pSvgaR3State->pFuncs3D->pfnUpdateHostScreenViewport(pThisCC, idScreen, pOldViewport);
1412}
1413
1414/**
1415 * Updates the heap buffers for all surfaces or one specific one.
1416 *
1417 * @param pThisCC The VGA/VMSVGA state for ring-3.
1418 * @param sid The surface ID, UINT32_MAX if all.
1419 * @thread VMSVGAFIFO
1420 */
1421void vmsvga3dUpdateHeapBuffersForSurfaces(PVGASTATECC pThisCC, uint32_t sid)
1422{
1423 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1424 AssertReturnVoid(pSvgaR3State->pFuncs3D);
1425
1426 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1427 AssertReturnVoid(pState);
1428
1429 if (sid == UINT32_MAX)
1430 {
1431 uint32_t cSurfaces = pState->cSurfaces;
1432 for (sid = 0; sid < cSurfaces; sid++)
1433 {
1434 PVMSVGA3DSURFACE pSurface = pState->papSurfaces[sid];
1435 if (pSurface && pSurface->id == sid)
1436 pSvgaR3State->pFuncs3D->pfnSurfaceUpdateHeapBuffers(pThisCC, pSurface);
1437 }
1438 }
1439 else if (sid < pState->cSurfaces)
1440 {
1441 PVMSVGA3DSURFACE pSurface = pState->papSurfaces[sid];
1442 if (pSurface && pSurface->id == sid)
1443 pSvgaR3State->pFuncs3D->pfnSurfaceUpdateHeapBuffers(pThisCC, pSurface);
1444 }
1445}
1446
1447
1448/*
1449 *
1450 * VGPU9
1451 *
1452 */
1453
1454int vmsvga3dContextDefine(PVGASTATECC pThisCC, uint32_t cid)
1455{
1456 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1457 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1458 return pSvgaR3State->pFuncsVGPU9->pfnContextDefine(pThisCC, cid);
1459}
1460
1461int vmsvga3dContextDestroy(PVGASTATECC pThisCC, uint32_t cid)
1462{
1463 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1464 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1465 return pSvgaR3State->pFuncsVGPU9->pfnContextDestroy(pThisCC, cid);
1466}
1467
1468int vmsvga3dSetTransform(PVGASTATECC pThisCC, uint32_t cid, SVGA3dTransformType type, float matrix[16])
1469{
1470 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1471 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1472 return pSvgaR3State->pFuncsVGPU9->pfnSetTransform(pThisCC, cid, type, matrix);
1473}
1474
1475int vmsvga3dSetZRange(PVGASTATECC pThisCC, uint32_t cid, SVGA3dZRange zRange)
1476{
1477 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1478 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1479 return pSvgaR3State->pFuncsVGPU9->pfnSetZRange(pThisCC, cid, zRange);
1480}
1481
1482int vmsvga3dSetRenderState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cRenderStates, SVGA3dRenderState *pRenderState)
1483{
1484 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1485 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1486 return pSvgaR3State->pFuncsVGPU9->pfnSetRenderState(pThisCC, cid, cRenderStates, pRenderState);
1487}
1488
1489int vmsvga3dSetRenderTarget(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRenderTargetType type, SVGA3dSurfaceImageId target)
1490{
1491 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1492 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1493 return pSvgaR3State->pFuncsVGPU9->pfnSetRenderTarget(pThisCC, cid, type, target);
1494}
1495
1496int vmsvga3dSetTextureState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cTextureStates, SVGA3dTextureState *pTextureState)
1497{
1498 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1499 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1500 return pSvgaR3State->pFuncsVGPU9->pfnSetTextureState(pThisCC, cid, cTextureStates, pTextureState);
1501}
1502
1503int vmsvga3dSetMaterial(PVGASTATECC pThisCC, uint32_t cid, SVGA3dFace face, SVGA3dMaterial *pMaterial)
1504{
1505 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1506 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1507 return pSvgaR3State->pFuncsVGPU9->pfnSetMaterial(pThisCC, cid, face, pMaterial);
1508}
1509
1510int vmsvga3dSetLightData(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, SVGA3dLightData *pData)
1511{
1512 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1513 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1514 return pSvgaR3State->pFuncsVGPU9->pfnSetLightData(pThisCC, cid, index, pData);
1515}
1516
1517int vmsvga3dSetLightEnabled(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, uint32_t enabled)
1518{
1519 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1520 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1521 return pSvgaR3State->pFuncsVGPU9->pfnSetLightEnabled(pThisCC, cid, index, enabled);
1522}
1523
1524int vmsvga3dSetViewPort(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
1525{
1526 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1527 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1528 return pSvgaR3State->pFuncsVGPU9->pfnSetViewPort(pThisCC, cid, pRect);
1529}
1530
1531int vmsvga3dSetClipPlane(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, float plane[4])
1532{
1533 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1534 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1535 return pSvgaR3State->pFuncsVGPU9->pfnSetClipPlane(pThisCC, cid, index, plane);
1536}
1537
1538int vmsvga3dCommandClear(PVGASTATECC pThisCC, uint32_t cid, SVGA3dClearFlag clearFlag, uint32_t color, float depth, uint32_t stencil, uint32_t cRects, SVGA3dRect *pRect)
1539{
1540 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1541 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1542 return pSvgaR3State->pFuncsVGPU9->pfnCommandClear(pThisCC, cid, clearFlag, color, depth, stencil, cRects, pRect);
1543}
1544
1545int vmsvga3dDrawPrimitives(PVGASTATECC pThisCC, uint32_t cid, uint32_t numVertexDecls, SVGA3dVertexDecl *pVertexDecl, uint32_t numRanges, SVGA3dPrimitiveRange *pNumRange, uint32_t cVertexDivisor, SVGA3dVertexDivisor *pVertexDivisor)
1546{
1547 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1548 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1549 return pSvgaR3State->pFuncsVGPU9->pfnDrawPrimitives(pThisCC, cid, numVertexDecls, pVertexDecl, numRanges, pNumRange, cVertexDivisor, pVertexDivisor);
1550}
1551
1552int vmsvga3dSetScissorRect(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
1553{
1554 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1555 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1556 return pSvgaR3State->pFuncsVGPU9->pfnSetScissorRect(pThisCC, cid, pRect);
1557}
1558
1559int vmsvga3dGenerateMipmaps(PVGASTATECC pThisCC, uint32_t sid, SVGA3dTextureFilter filter)
1560{
1561 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1562 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1563 return pSvgaR3State->pFuncsVGPU9->pfnGenerateMipmaps(pThisCC, sid, filter);
1564}
1565
1566int vmsvga3dShaderDefine(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type, uint32_t cbData, uint32_t *pShaderData)
1567{
1568 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1569 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1570 return pSvgaR3State->pFuncsVGPU9->pfnShaderDefine(pThisCC, cid, shid, type, cbData, pShaderData);
1571}
1572
1573int vmsvga3dShaderDestroy(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type)
1574{
1575 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1576 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1577 return pSvgaR3State->pFuncsVGPU9->pfnShaderDestroy(pThisCC, cid, shid, type);
1578}
1579
1580int vmsvga3dShaderSet(PVGASTATECC pThisCC, struct VMSVGA3DCONTEXT *pContext, uint32_t cid, SVGA3dShaderType type, uint32_t shid)
1581{
1582 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1583 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1584 return pSvgaR3State->pFuncsVGPU9->pfnShaderSet(pThisCC, pContext, cid, type, shid);
1585}
1586
1587int vmsvga3dShaderSetConst(PVGASTATECC pThisCC, uint32_t cid, uint32_t reg, SVGA3dShaderType type, SVGA3dShaderConstType ctype, uint32_t cRegisters, uint32_t *pValues)
1588{
1589 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1590 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1591 return pSvgaR3State->pFuncsVGPU9->pfnShaderSetConst(pThisCC, cid, reg, type, ctype, cRegisters, pValues);
1592}
1593
1594
1595/*
1596 *
1597 * Map
1598 *
1599 */
1600
1601void vmsvga3dSurfaceMapInit(VMSVGA3D_MAPPED_SURFACE *pMap, VMSVGA3D_SURFACE_MAP enmMapType, SVGA3dBox const *pBox,
1602 PVMSVGA3DSURFACE pSurface, void *pvData, uint32_t cbRowPitch, uint32_t cbDepthPitch)
1603{
1604 uint32_t const cxBlocks = (pBox->w + pSurface->cxBlock - 1) / pSurface->cxBlock;
1605 uint32_t const cyBlocks = (pBox->h + pSurface->cyBlock - 1) / pSurface->cyBlock;
1606
1607 pMap->enmMapType = enmMapType;
1608 pMap->format = pSurface->format;
1609 pMap->box = *pBox;
1610 pMap->cbBlock = pSurface->cbBlock;
1611 pMap->cbRow = cxBlocks * pSurface->cbBlock;
1612 pMap->cbRowPitch = cbRowPitch;
1613 pMap->cRows = cyBlocks;
1614 pMap->cbDepthPitch = cbDepthPitch;
1615 pMap->pvData = (uint8_t *)pvData
1616 + (pBox->x / pSurface->cxBlock) * pSurface->cbBlock
1617 + (pBox->y / pSurface->cyBlock) * cbRowPitch
1618 + pBox->z * cbDepthPitch;
1619}
1620
1621
1622int vmsvga3dSurfaceMap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImage, SVGA3dBox const *pBox,
1623 VMSVGA3D_SURFACE_MAP enmMapType, VMSVGA3D_MAPPED_SURFACE *pMap)
1624{
1625 PVMSVGA3DSURFACE pSurface;
1626 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pImage->sid, &pSurface);
1627 AssertRCReturn(rc, rc);
1628
1629 if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
1630 {
1631 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1632 AssertReturn(pSvgaR3State->pFuncsMap, VERR_NOT_IMPLEMENTED);
1633 return pSvgaR3State->pFuncsMap->pfnSurfaceMap(pThisCC, pImage, pBox, enmMapType, pMap);
1634 }
1635
1636 PVMSVGA3DMIPMAPLEVEL pMipLevel;
1637 rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
1638 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
1639
1640 if (!pMipLevel->pSurfaceData)
1641 {
1642 rc = vmsvga3dSurfaceAllocMipLevels(pSurface);
1643 AssertRCReturn(rc, rc);
1644 }
1645
1646 SVGA3dBox clipBox;
1647 if (pBox)
1648 {
1649 clipBox = *pBox;
1650 vmsvgaR3ClipBox(&pMipLevel->mipmapSize, &clipBox);
1651 ASSERT_GUEST_RETURN(clipBox.w && clipBox.h && clipBox.d, VERR_INVALID_PARAMETER);
1652 }
1653 else
1654 {
1655 clipBox.x = 0;
1656 clipBox.y = 0;
1657 clipBox.z = 0;
1658 clipBox.w = pMipLevel->mipmapSize.width;
1659 clipBox.h = pMipLevel->mipmapSize.height;
1660 clipBox.d = pMipLevel->mipmapSize.depth;
1661 }
1662
1663 /// @todo Zero the box?
1664 //if (enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD)
1665 // RT_BZERO(.);
1666
1667 vmsvga3dSurfaceMapInit(pMap, enmMapType, &clipBox, pSurface,
1668 pMipLevel->pSurfaceData, pMipLevel->cbSurfacePitch, pMipLevel->cbSurfacePlane);
1669
1670 LogFunc(("SysMem: sid = %u, pvData %p\n", pImage->sid, pMap->pvData));
1671 return VINF_SUCCESS;
1672}
1673
1674int vmsvga3dSurfaceUnmap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImage, VMSVGA3D_MAPPED_SURFACE *pMap, bool fWritten)
1675{
1676 PVMSVGA3DSURFACE pSurface;
1677 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pImage->sid, &pSurface);
1678 AssertRCReturn(rc, rc);
1679
1680 if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
1681 {
1682 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1683 AssertReturn(pSvgaR3State->pFuncsMap, VERR_NOT_IMPLEMENTED);
1684 return pSvgaR3State->pFuncsMap->pfnSurfaceUnmap(pThisCC, pImage, pMap, fWritten);
1685 }
1686
1687 PVMSVGA3DMIPMAPLEVEL pMipLevel;
1688 rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
1689 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
1690
1691 if ( fWritten
1692 && ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
1693 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
1694 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
1695 {
1696 pMipLevel->fDirty = true;
1697 pSurface->fDirty = true;
1698 }
1699
1700 return VINF_SUCCESS;
1701}
1702
1703
1704int vmsvga3dCalcSurfaceMipmapAndFace(PVGASTATECC pThisCC, uint32_t sid, uint32_t iSubresource, uint32_t *piMipmap, uint32_t *piFace)
1705{
1706 PVMSVGA3DSURFACE pSurface;
1707 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
1708 AssertRCReturn(rc, rc);
1709
1710 vmsvga3dCalcMipmapAndFace(pSurface->cLevels, iSubresource, piMipmap, piFace);
1711 return VINF_SUCCESS;
1712}
1713
1714
1715uint32_t vmsvga3dCalcSubresourceOffset(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImage)
1716{
1717 PVMSVGA3DSURFACE pSurface;
1718 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pImage->sid, &pSurface);
1719 AssertRCReturn(rc, 0);
1720
1721 ASSERT_GUEST_RETURN(pImage->face < pSurface->surfaceDesc.numArrayElements, 0);
1722
1723 uint32_t offMipLevel = 0;
1724 for (uint32_t i = 0; i < pImage->mipmap; ++i)
1725 {
1726 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
1727 offMipLevel += pMipmapLevel->cbSurface;
1728 }
1729
1730 uint32_t offSubresource = pSurface->surfaceDesc.cbArrayElement * pImage->face + offMipLevel;
1731 /** @todo Multisample? */
1732 return offSubresource;
1733}
1734
1735
1736uint32_t vmsvga3dGetArrayElements(PVGASTATECC pThisCC, SVGA3dSurfaceId sid)
1737{
1738 PVMSVGA3DSURFACE pSurface;
1739 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
1740 AssertRCReturn(rc, 0);
1741
1742 return pSurface->surfaceDesc.numArrayElements;
1743}
1744
1745
1746uint32_t vmsvga3dGetSubresourceCount(PVGASTATECC pThisCC, SVGA3dSurfaceId sid)
1747{
1748 PVMSVGA3DSURFACE pSurface;
1749 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
1750 AssertRCReturn(rc, 0);
1751
1752 return pSurface->surfaceDesc.numArrayElements * pSurface->cLevels;
1753}
1754
1755
1756/*
1757 * Calculates memory layout of a surface box for memcpy:
1758 */
1759int vmsvga3dGetBoxDimensions(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImage, SVGA3dBox const *pBox,
1760 VMSGA3D_BOX_DIMENSIONS *pResult)
1761{
1762 PVMSVGA3DSURFACE pSurface;
1763 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pImage->sid, &pSurface);
1764 AssertRCReturn(rc, rc);
1765
1766 PVMSVGA3DMIPMAPLEVEL pMipLevel;
1767 rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
1768 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
1769
1770 /* Clip the box. */
1771 SVGA3dBox clipBox;
1772 if (pBox)
1773 {
1774 clipBox = *pBox;
1775 vmsvgaR3ClipBox(&pMipLevel->mipmapSize, &clipBox);
1776 ASSERT_GUEST_RETURN(clipBox.w && clipBox.h && clipBox.d, VERR_INVALID_PARAMETER);
1777 }
1778 else
1779 {
1780 clipBox.x = 0;
1781 clipBox.y = 0;
1782 clipBox.z = 0;
1783 clipBox.w = pMipLevel->mipmapSize.width;
1784 clipBox.h = pMipLevel->mipmapSize.height;
1785 clipBox.d = pMipLevel->mipmapSize.depth;
1786 }
1787
1788 uint32_t const cBlocksX = (clipBox.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
1789 uint32_t const cBlocksY = (clipBox.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
1790
1791 pResult->offSubresource = vmsvga3dCalcSubresourceOffset(pThisCC, pImage);
1792 pResult->offBox = (clipBox.x / pSurface->cxBlock) * pSurface->cbBlock
1793 + (clipBox.y / pSurface->cyBlock) * pMipLevel->cbSurfacePitch
1794 + clipBox.z * pMipLevel->cbSurfacePlane;
1795 pResult->cbRow = cBlocksX * pSurface->cbBlock;
1796 pResult->cbPitch = pMipLevel->cbSurfacePitch;
1797 pResult->cyBlocks = cBlocksY;
1798 pResult->cbDepthPitch = pMipLevel->cbSurfacePlane;
1799
1800 return VINF_SUCCESS;
1801}
1802
1803
1804/*
1805 * Whether a legacy 3D backend is used.
1806 * The new DX context can be built together with the legacy D3D9 or OpenGL backend.
1807 * The actual backend is selected at the VM startup.
1808 */
1809bool vmsvga3dIsLegacyBackend(PVGASTATECC pThisCC)
1810{
1811 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1812 return pSvgaR3State->pFuncsDX == NULL;
1813}
1814
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