rawpci.h@ 36485

Last change on this file since 36485 was 36485, checked in by vboxsync, 14 years ago
PCI: sync of interrupts rework
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 18.2 KB

Line
1	/** @file
2	* Raw PCI Devices (aka PCI pass-through). (VMM)
3	*/
4
5	/*
6	* Copyright (C) 2010-2011 Oracle Corporation
7	*
8	* This file is part of VirtualBox Open Source Edition (OSE), as
9	* available from http://www.215389.xyz. This file is free software;
10	* you can redistribute it and/or modify it under the terms of the GNU
11	* General Public License (GPL) as published by the Free Software
12	* Foundation, in version 2 as it comes in the "COPYING" file of the
13	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15	*
16	* The contents of this file may alternatively be used under the terms
17	* of the Common Development and Distribution License Version 1.0
18	* (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19	* VirtualBox OSE distribution, in which case the provisions of the
20	* CDDL are applicable instead of those of the GPL.
21	*
22	* You may elect to license modified versions of this file under the
23	* terms and conditions of either the GPL or the CDDL or both.
24	*/
25
26	#ifndef ___VBox_rawpci_h
27	#define ___VBox_rawpci_h
28
29	#include <VBox/types.h>
30	#include <VBox/sup.h>
31
32	RT_C_DECLS_BEGIN
33
34	/**
35	* Handle for the raw PCI device.
36	*/
37	typedef uint32_t PCIRAWDEVHANDLE;
38
39	/**
40	* Handle for the ISR.
41	*/
42	typedef uint32_t PCIRAWISRHANDLE;
43
44	/**
45	* Physical memory action enumeration.
46	*/
47	typedef enum PCIRAWMEMINFOACTION
48	{
49	/** Pages mapped. */
50	PCIRAW_MEMINFO_MAP,
51	/** Pages unmapped. */
52	PCIRAW_MEMINFO_UNMAP,
53	/** The usual 32-bit type blow up. */
54	PCIRAW_MEMINFO_32BIT_HACK = 0x7fffffff
55	} PCIRAWMEMINFOACTION;
56
57	/**
58	* Per-VM capability flag bits.
59	*/
60	typedef enum PCIRAWVMFLAGS
61	{
62	/** If we can use IOMMU in this VM. */
63	PCIRAW_VMFLAGS_HAS_IOMMU = (1 << 0),
64	PCIRAW_VMFLAGS_32BIT_HACK = 0x7fffffff
65	} PCIRAWVMFLAGS;
66
67	/* Forward declaration. */
68	struct RAWPCIPERVM;
69
70	/**
71	* Callback to notify raw PCI subsystem about mapping/unmapping of
72	* host pages to the guest. Typical usecase is to register physical
73	* RAM pages with IOMMU, so that it could allow DMA for PCI devices
74	* directly from the guest RAM.
75	* Region shall be one or more contigous (both host and guest) pages
76	* of physical memory.
77	*
78	* @returns VBox status code.
79	*
80	* @param pVM VM pointer.
81	* @param HostStart Physical address of region start on the host.
82	* @param GuestStart Physical address of region start on the guest.
83	* @param cMemSize Region size in bytes.
84	* @param Action Action performed (i.e. if page was mapped or unmapped).
85	*/
86	typedef DECLCALLBACK(int) FNRAWPCICONTIGPHYSMEMINFO(struct RAWPCIPERVM* pVmData, RTHCPHYS HostStart, RTGCPHYS GuestStart, uint64_t cMemSize, PCIRAWMEMINFOACTION Action);
87	typedef FNRAWPCICONTIGPHYSMEMINFO *PFNRAWPCICONTIGPHYSMEMINFO;
88
89	/** Data being part of the VM structure. */
90	typedef struct RAWPCIPERVM
91	{
92	/** Shall only be interpreted by the host PCI driver. */
93	RTR0PTR pDriverData;
94	/** Callback called when mapping of host pages to the guest changes. */
95	PFNRAWPCICONTIGPHYSMEMINFO pfnContigMemInfo;
96	/** Flags describing VM capabilities (such as IOMMU presence). */
97	uint32_t fVmCaps;
98	} RAWPCIPERVM;
99	typedef RAWPCIPERVM *PRAWPCIPERVM;
100
101	/** Parameters buffer for PCIRAWR0_DO_OPEN_DEVICE call */
102	typedef struct
103	{
104	/* in */
105	uint32_t PciAddress;
106	uint32_t fFlags;
107	/* out */
108	PCIRAWDEVHANDLE Device;
109	uint32_t fDevFlags;
110	} PCIRAWREQOPENDEVICE;
111
112	/** Parameters buffer for PCIRAWR0_DO_CLOSE_DEVICE call */
113	typedef struct
114	{
115	/* in */
116	uint32_t fFlags;
117	} PCIRAWREQCLOSEDEVICE;
118
119	/** Parameters buffer for PCIRAWR0_DO_GET_REGION_INFO call */
120	typedef struct
121	{
122	/* in */
123	int32_t iRegion;
124	/* out */
125	RTGCPHYS RegionStart;
126	uint64_t u64RegionSize;
127	bool fPresent;
128	uint32_t fFlags;
129	} PCIRAWREQGETREGIONINFO;
130
131	/** Parameters buffer for PCIRAWR0_DO_MAP_REGION call. */
132	typedef struct
133	{
134	/* in */
135	RTGCPHYS StartAddress;
136	uint64_t iRegionSize;
137	int32_t iRegion;
138	uint32_t fFlags;
139	/* out */
140	RTR3PTR pvAddressR3;
141	RTR0PTR pvAddressR0;
142	} PCIRAWREQMAPREGION;
143
144	/** Parameters buffer for PCIRAWR0_DO_UNMAP_REGION call. */
145	typedef struct
146	{
147	/* in */
148	RTGCPHYS StartAddress;
149	uint64_t iRegionSize;
150	RTR3PTR pvAddressR3;
151	RTR0PTR pvAddressR0;
152	int32_t iRegion;
153	} PCIRAWREQUNMAPREGION;
154
155	/** Parameters buffer for PCIRAWR0_DO_PIO_WRITE call. */
156	typedef struct
157	{
158	/* in */
159	uint16_t iPort;
160	uint16_t cb;
161	uint32_t iValue;
162	} PCIRAWREQPIOWRITE;
163
164	/** Parameters buffer for PCIRAWR0_DO_PIO_READ call. */
165	typedef struct
166	{
167	/* in */
168	uint16_t iPort;
169	uint16_t cb;
170	/* out */
171	uint32_t iValue;
172	} PCIRAWREQPIOREAD;
173
174	/** Memory operand. */
175	typedef struct
176	{
177	union
178	{
179	uint8_t u8;
180	uint16_t u16;
181	uint32_t u32;
182	uint64_t u64;
183	} u;
184	uint8_t cb;
185	} PCIRAWMEMLOC;
186
187	/** Parameters buffer for PCIRAWR0_DO_MMIO_WRITE call. */
188	typedef struct
189	{
190	/* in */
191	RTR0PTR Address;
192	PCIRAWMEMLOC Value;
193	} PCIRAWREQMMIOWRITE;
194
195	/** Parameters buffer for PCIRAWR0_DO_MMIO_READ call. */
196	typedef struct
197	{
198	/* in */
199	RTR0PTR Address;
200	/* inout (Value.cb is in) */
201	PCIRAWMEMLOC Value;
202	} PCIRAWREQMMIOREAD;
203
204	/* Parameters buffer for PCIRAWR0_DO_PCICFG_WRITE call. */
205	typedef struct
206	{
207	/* in */
208	uint32_t iOffset;
209	PCIRAWMEMLOC Value;
210	} PCIRAWREQPCICFGWRITE;
211
212	/** Parameters buffer for PCIRAWR0_DO_PCICFG_READ call. */
213	typedef struct
214	{
215	/* in */
216	uint32_t iOffset;
217	/* inout (Value.cb is in) */
218	PCIRAWMEMLOC Value;
219	} PCIRAWREQPCICFGREAD;
220
221	/** Parameters buffer for PCIRAWR0_DO_REGISTER_R0_IRQ_HANDLER call. */
222	typedef struct
223	{
224	/* in */
225	int32_t iGuestIrq;
226	RTR0PTR pfnHandler;
227	RTR0PTR pfnHandlerContext;
228	/* out */
229	int32_t iHostIrq;
230	} PCIRAWREQREGISTERR0IRQHANDLER;
231
232	/** Parameters buffer for PCIRAWR0_DO_UNREGISTER_R0_IRQ_HANDLER call. */
233	typedef struct
234	{
235	/* in */
236	int32_t iHostIrq;
237	} PCIRAWREQUNREGISTERR0IRQHANDLER;
238
239	/** Parameters buffer for PCIRAWR0_DO_POWER_STATE_CHANGE call. */
240	typedef struct PCIRAWREQPOWERSTATECHANGE
241	{
242	/* in */
243	uint32_t iState;
244	/* in/out */
245	uint64_t u64Param;
246	} PCIRAWREQPOWERSTATECHANGE;
247
248	/**
249	* Request buffer use for communication with the driver.
250	*/
251	typedef struct PCIRAWSENDREQ
252	{
253	/** The request header. */
254	SUPVMMR0REQHDR Hdr;
255	/** Alternative to passing the taking the session from the VM handle.
256	* Either use this member or use the VM handle, don't do both.
257	*/
258	PSUPDRVSESSION pSession;
259	/** Request type. */
260	int32_t iRequest;
261	/** Host device request targetted to. */
262	PCIRAWDEVHANDLE TargetDevice;
263	/** Call parameters. */
264	union
265	{
266	PCIRAWREQOPENDEVICE aOpenDevice;
267	PCIRAWREQCLOSEDEVICE aCloseDevice;
268	PCIRAWREQGETREGIONINFO aGetRegionInfo;
269	PCIRAWREQMAPREGION aMapRegion;
270	PCIRAWREQUNMAPREGION aUnmapRegion;
271	PCIRAWREQPIOWRITE aPioWrite;
272	PCIRAWREQPIOREAD aPioRead;
273	PCIRAWREQMMIOWRITE aMmioWrite;
274	PCIRAWREQMMIOREAD aMmioRead;
275	PCIRAWREQPCICFGWRITE aPciCfgWrite;
276	PCIRAWREQPCICFGREAD aPciCfgRead;
277	PCIRAWREQREGISTERR0IRQHANDLER aRegisterR0IrqHandler;
278	PCIRAWREQUNREGISTERR0IRQHANDLER aUnregisterR0IrqHandler;
279	PCIRAWREQPOWERSTATECHANGE aPowerStateChange;
280	} u;
281	} PCIRAWSENDREQ;
282	typedef PCIRAWSENDREQ *PPCIRAWSENDREQ;
283
284	/**
285	* Operations performed by the driver.
286	*/
287	typedef enum PCIRAWR0OPERATION
288	{
289	/* Open device. */
290	PCIRAWR0_DO_OPEN_DEVICE,
291	/* Close device. */
292	PCIRAWR0_DO_CLOSE_DEVICE,
293	/* Get PCI region info. */
294	PCIRAWR0_DO_GET_REGION_INFO,
295	/* Map PCI region into VM address space. */
296	PCIRAWR0_DO_MAP_REGION,
297	/* Unmap PCI region from VM address space. */
298	PCIRAWR0_DO_UNMAP_REGION,
299	/* Perform PIO write. */
300	PCIRAWR0_DO_PIO_WRITE,
301	/* Perform PIO read. */
302	PCIRAWR0_DO_PIO_READ,
303	/* Perform MMIO write. */
304	PCIRAWR0_DO_MMIO_WRITE,
305	/* Perform MMIO read. */
306	PCIRAWR0_DO_MMIO_READ,
307	/* Perform PCI config write. */
308	PCIRAWR0_DO_PCICFG_WRITE,
309	/* Perform PCI config read. */
310	PCIRAWR0_DO_PCICFG_READ,
311	/* Register device IRQ R0 handler. */
312	PCIRAWR0_DO_REGISTER_R0_IRQ_HANDLER,
313	/* Unregister device IRQ R0 handler. */
314	PCIRAWR0_DO_UNREGISTER_R0_IRQ_HANDLER,
315	/* Notify driver about guest power state change. */
316	PCIRAWR0_DO_POWER_STATE_CHANGE,
317	/** The usual 32-bit type blow up. */
318	PCIRAWR0_DO_32BIT_HACK = 0x7fffffff
319	} PCIRAWR0OPERATION;
320
321	/**
322	* Power state enumeration.
323	*/
324	typedef enum PCIRAWPOWERSTATE
325	{
326	/* Power on. */
327	PCIRAW_POWER_ON,
328	/* Power off. */
329	PCIRAW_POWER_OFF,
330	/* Suspend. */
331	PCIRAW_POWER_SUSPEND,
332	/* Resume. */
333	PCIRAW_POWER_RESUME,
334	/** The usual 32-bit type blow up. */
335	PCIRAW_POWER_32BIT_HACK = 0x7fffffff
336	} PCIRAWPOWERSTATE;
337
338
339	/** Forward declarations. */
340	typedef struct RAWPCIFACTORY *PRAWPCIFACTORY;
341	typedef struct RAWPCIDEVPORT *PRAWPCIDEVPORT;
342
343	/**
344	* Interrupt service routine callback.
345	*
346	* @param pvContext Opaque user data passed to the handler.
347	* @param iIrq Interrupt number.
348	*/
349	typedef DECLCALLBACK(void) FNRAWPCIISR(void *pvContext, int32_t iIrq);
350	typedef FNRAWPCIISR *PFNRAWPCIISR;
351
352	/**
353	* This is the port on the device interface, i.e. the driver side which the
354	* host device is connected to.
355	*
356	* This is only used for the in-kernel PCI device connections.
357	*/
358	typedef struct RAWPCIDEVPORT
359	{
360	/** Structure version number. (RAWPCIDEVPORT_VERSION) */
361	uint32_t u32Version;
362
363	/**
364	* Init device.
365	*
366	* @param pPort Pointer to this structure.
367	* @param fFlags Initialization flags.
368	*/
369	DECLR0CALLBACKMEMBER(int, pfnInit,(PRAWPCIDEVPORT pPort,
370	uint32_t fFlags));
371
372
373	/**
374	* Deinit device.
375	*
376	* @param pPort Pointer to this structure.
377	* @param fFlags Initialization flags.
378	*/
379	DECLR0CALLBACKMEMBER(int, pfnDeinit,(PRAWPCIDEVPORT pPort,
380	uint32_t fFlags));
381
382
383	/**
384	* Destroy device.
385	*
386	* @param pPort Pointer to this structure.
387	*/
388	DECLR0CALLBACKMEMBER(int, pfnDestroy,(PRAWPCIDEVPORT pPort));
389
390	/**
391	* Get PCI region info.
392	*
393	* @param pPort Pointer to this structure.
394	*/
395	DECLR0CALLBACKMEMBER(int, pfnGetRegionInfo,(PRAWPCIDEVPORT pPort,
396	int32_t iRegion,
397	RTHCPHYS *pRegionStart,
398	uint64_t *pu64RegionSize,
399	bool *pfPresent,
400	uint32_t *pfFlags));
401
402
403	/**
404	* Map PCI region.
405	*
406	* @param pPort Pointer to this structure.
407	*/
408	DECLR0CALLBACKMEMBER(int, pfnMapRegion,(PRAWPCIDEVPORT pPort,
409	int32_t iRegion,
410	RTHCPHYS RegionStart,
411	uint64_t u64RegionSize,
412	int32_t fFlags,
413	RTR0PTR *pRegionBaseR0));
414
415	/**
416	* Unmap PCI region.
417	*
418	* @param pPort Pointer to this structure.
419	*/
420	DECLR0CALLBACKMEMBER(int, pfnUnmapRegion,(PRAWPCIDEVPORT pPort,
421	int32_t iRegion,
422	RTHCPHYS RegionStart,
423	uint64_t u64RegionSize,
424	RTR0PTR RegionBase));
425
426	/**
427	* Read device PCI register.
428	*
429	* @param pPort Pointer to this structure.
430	* @param Register PCI register.
431	* @param pValue Read value (with desired read width).
432	*/
433	DECLR0CALLBACKMEMBER(int, pfnPciCfgRead,(PRAWPCIDEVPORT pPort,
434	uint32_t Register,
435	PCIRAWMEMLOC *pValue));
436
437
438	/**
439	* Write device PCI register.
440	*
441	* @param pPort Pointer to this structure.
442	* @param Register PCI register.
443	* @param pValue Write value (with desired write width).
444	*/
445	DECLR0CALLBACKMEMBER(int, pfnPciCfgWrite,(PRAWPCIDEVPORT pPort,
446	uint32_t Register,
447	PCIRAWMEMLOC *pValue));
448
449	/**
450	* Request to register interrupt handler.
451	*
452	* @param pPort Pointer to this structure.
453	* @param pfnHandler Pointer to the handler.
454	* @param pIrqContext Context passed to the handler.
455	* @param phIsr Handle for the ISR, .
456	*/
457	DECLR0CALLBACKMEMBER(int, pfnRegisterIrqHandler,(PRAWPCIDEVPORT pPort,
458	PFNRAWPCIISR pfnHandler,
459	void* pIrqContext,
460	PCIRAWISRHANDLE *phIsr));
461
462	/**
463	* Request to unregister interrupt handler.
464	*
465	* @param pPort Pointer to this structure.
466	* @param hIsr Handle of ISR to unregister (retured by earlier pfnRegisterIrqHandler).
467	*/
468	DECLR0CALLBACKMEMBER(int, pfnUnregisterIrqHandler,(PRAWPCIDEVPORT pPort,
469	PCIRAWISRHANDLE hIsr));
470
471	/**
472	* Power state change notification.
473	*
474	* @param pPort Pointer to this structure.
475	* @param aState New power state.
476	* @param pu64Param State-specific in/out parameter.
477	*/
478	DECLR0CALLBACKMEMBER(int, pfnPowerStateChange,(PRAWPCIDEVPORT pPort,
479	PCIRAWPOWERSTATE aState,
480	uint64_t *pu64Param));
481
482	/** Structure version number. (RAWPCIDEVPORT_VERSION) */
483	uint32_t u32VersionEnd;
484	} RAWPCIDEVPORT;
485	/** Version number for the RAWPCIDEVPORT::u32Version and RAWPCIIFPORT::u32VersionEnd fields. */
486	#define RAWPCIDEVPORT_VERSION UINT32_C(0xAFBDCC02)
487
488	/**
489	* The component factory interface for create a raw PCI interfaces.
490	*/
491	typedef struct RAWPCIFACTORY
492	{
493	/**
494	* Release this factory.
495	*
496	* SUPR0ComponentQueryFactory (SUPDRVFACTORY::pfnQueryFactoryInterface to be precise)
497	* will retain a reference to the factory and the caller has to call this method to
498	* release it once the pfnCreateAndConnect call(s) has been done.
499	*
500	* @param pIfFactory Pointer to this structure.
501	*/
502	DECLR0CALLBACKMEMBER(void, pfnRelease,(PRAWPCIFACTORY pFactory));
503
504	/**
505	* Create an instance for the specfied host PCI card and connects it
506	* to the driver.
507	*
508	*
509	* @returns VBox status code.
510	*
511	* @param pIfFactory Pointer to this structure.
512	* @param u32HostAddress Address of PCI device on the host.
513	* @param fFlags Creation flags.
514	* @param pVmCtx Context of VM where device is created.
515	* @param ppDevPort Where to store the pointer to the device port
516	* on success.
517	*
518	*/
519	DECLR0CALLBACKMEMBER(int, pfnCreateAndConnect,(PRAWPCIFACTORY pFactory,
520	uint32_t u32HostAddress,
521	uint32_t fFlags,
522	PRAWPCIPERVM pVmCtx,
523	PRAWPCIDEVPORT *ppDevPort,
524	uint32_t *pfDevFlags));
525
526
527	/**
528	* Initialize per-VM data related to PCI passthrough.
529	*
530	* @returns VBox status code.
531	*
532	* @param pIfFactory Pointer to this structure.
533	* @param pVM Pointer to VM structure to initialize.
534	* @param pPciData Pointer to PCI data.
535	*/
536	DECLR0CALLBACKMEMBER(int, pfnInitVm,(PRAWPCIFACTORY pFactory,
537	PVM pVM,
538	PRAWPCIPERVM pPciData));
539
540	/**
541	* Deinitialize per-VM data related to PCI passthrough.
542	*
543	* @returns VBox status code.
544	*
545	* @param pIfFactory Pointer to this structure.
546	* @param pVM Pointer to VM structure to deinitialize.
547	* @param pPciData Pointer to PCI data.
548	*/
549	DECLR0CALLBACKMEMBER(void, pfnDeinitVm,(PRAWPCIFACTORY pFactory,
550	PVM pVM,
551	PRAWPCIPERVM pPciData));
552	} RAWPCIFACTORY;
553
554	#define RAWPCIFACTORY_UUID_STR "ea089839-4171-476f-adfb-9e7ab1cbd0fb"
555
556	/**
557	* Flags passed to pfnPciDeviceConstructStart(), to notify driver
558	* about options to be used to open device.
559	*/
560	typedef enum PCIRAWDRIVERFLAGS
561	{
562	/** If runtime shall try to detach host driver. */
563	PCIRAWDRIVERRFLAG_DETACH_HOST_DRIVER = (1 << 0),
564	/** The usual 32-bit type blow up. */
565	PCIRAWDRIVERRFLAG_32BIT_HACK = 0x7fffffff
566	} PCIRAWDRIVERFLAGS;
567
568	/**
569	* Flags used to describe PCI region, matches to PCIADDRESSSPACE
570	* in pci.h.
571	*/
572	typedef enum PCIRAWADDRESSSPACE
573	{
574	/** Memory. */
575	PCIRAW_ADDRESS_SPACE_MEM = 0x00,
576	/** I/O space. */
577	PCIRAW_ADDRESS_SPACE_IO = 0x01,
578	/** 32-bit BAR. */
579	PCIRAW_ADDRESS_SPACE_BAR32 = 0x00,
580	/** 64-bit BAR. */
581	PCIRAW_ADDRESS_SPACE_BAR64 = 0x04,
582	/** Prefetch memory. */
583	PCIRAW_ADDRESS_SPACE_MEM_PREFETCH = 0x08,
584	/** The usual 32-bit type blow up. */
585	PCIRAW_ADDRESS_SPACE_32BIT_HACK = 0x7fffffff
586	} PCIRAWADDRESSSPACE;
587
588	RT_C_DECLS_END
589
590	#endif

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source: vbox/trunk/include/VBox/rawpci.h@ 36485

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